f71805f.c 24 KB

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  1. /*
  2. * f71805f.c - driver for the Fintek F71805F/FG Super-I/O chip integrated
  3. * hardware monitoring features
  4. * Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
  5. *
  6. * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
  7. * complete hardware monitoring features: voltage, fan and temperature
  8. * sensors, and manual and automatic fan speed control.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23. */
  24. #include <linux/module.h>
  25. #include <linux/init.h>
  26. #include <linux/slab.h>
  27. #include <linux/jiffies.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/hwmon.h>
  30. #include <linux/hwmon-sysfs.h>
  31. #include <linux/err.h>
  32. #include <linux/mutex.h>
  33. #include <asm/io.h>
  34. static struct platform_device *pdev;
  35. #define DRVNAME "f71805f"
  36. /*
  37. * Super-I/O constants and functions
  38. */
  39. #define F71805F_LD_HWM 0x04
  40. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  41. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  42. #define SIO_REG_DEVREV 0x22 /* Device revision */
  43. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  44. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  45. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  46. #define SIO_FINTEK_ID 0x1934
  47. #define SIO_F71805F_ID 0x0406
  48. static inline int
  49. superio_inb(int base, int reg)
  50. {
  51. outb(reg, base);
  52. return inb(base + 1);
  53. }
  54. static int
  55. superio_inw(int base, int reg)
  56. {
  57. int val;
  58. outb(reg++, base);
  59. val = inb(base + 1) << 8;
  60. outb(reg, base);
  61. val |= inb(base + 1);
  62. return val;
  63. }
  64. static inline void
  65. superio_select(int base, int ld)
  66. {
  67. outb(SIO_REG_LDSEL, base);
  68. outb(ld, base + 1);
  69. }
  70. static inline void
  71. superio_enter(int base)
  72. {
  73. outb(0x87, base);
  74. outb(0x87, base);
  75. }
  76. static inline void
  77. superio_exit(int base)
  78. {
  79. outb(0xaa, base);
  80. }
  81. /*
  82. * ISA constants
  83. */
  84. #define REGION_LENGTH 2
  85. #define ADDR_REG_OFFSET 0
  86. #define DATA_REG_OFFSET 1
  87. static struct resource f71805f_resource __initdata = {
  88. .flags = IORESOURCE_IO,
  89. };
  90. /*
  91. * Registers
  92. */
  93. /* in nr from 0 to 8 (8-bit values) */
  94. #define F71805F_REG_IN(nr) (0x10 + (nr))
  95. #define F71805F_REG_IN_HIGH(nr) (0x40 + 2 * (nr))
  96. #define F71805F_REG_IN_LOW(nr) (0x41 + 2 * (nr))
  97. /* fan nr from 0 to 2 (12-bit values, two registers) */
  98. #define F71805F_REG_FAN(nr) (0x20 + 2 * (nr))
  99. #define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr))
  100. #define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr))
  101. /* temp nr from 0 to 2 (8-bit values) */
  102. #define F71805F_REG_TEMP(nr) (0x1B + (nr))
  103. #define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
  104. #define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
  105. #define F71805F_REG_TEMP_MODE 0x01
  106. #define F71805F_REG_START 0x00
  107. /* status nr from 0 to 2 */
  108. #define F71805F_REG_STATUS(nr) (0x36 + (nr))
  109. /*
  110. * Data structures and manipulation thereof
  111. */
  112. struct f71805f_data {
  113. unsigned short addr;
  114. const char *name;
  115. struct mutex lock;
  116. struct class_device *class_dev;
  117. struct mutex update_lock;
  118. char valid; /* !=0 if following fields are valid */
  119. unsigned long last_updated; /* In jiffies */
  120. unsigned long last_limits; /* In jiffies */
  121. /* Register values */
  122. u8 in[9];
  123. u8 in_high[9];
  124. u8 in_low[9];
  125. u16 fan[3];
  126. u16 fan_low[3];
  127. u8 fan_enabled; /* Read once at init time */
  128. u8 temp[3];
  129. u8 temp_high[3];
  130. u8 temp_hyst[3];
  131. u8 temp_mode;
  132. u8 alarms[3];
  133. };
  134. static inline long in_from_reg(u8 reg)
  135. {
  136. return (reg * 8);
  137. }
  138. /* The 2 least significant bits are not used */
  139. static inline u8 in_to_reg(long val)
  140. {
  141. if (val <= 0)
  142. return 0;
  143. if (val >= 2016)
  144. return 0xfc;
  145. return (((val + 16) / 32) << 2);
  146. }
  147. /* in0 is downscaled by a factor 2 internally */
  148. static inline long in0_from_reg(u8 reg)
  149. {
  150. return (reg * 16);
  151. }
  152. static inline u8 in0_to_reg(long val)
  153. {
  154. if (val <= 0)
  155. return 0;
  156. if (val >= 4032)
  157. return 0xfc;
  158. return (((val + 32) / 64) << 2);
  159. }
  160. /* The 4 most significant bits are not used */
  161. static inline long fan_from_reg(u16 reg)
  162. {
  163. reg &= 0xfff;
  164. if (!reg || reg == 0xfff)
  165. return 0;
  166. return (1500000 / reg);
  167. }
  168. static inline u16 fan_to_reg(long rpm)
  169. {
  170. /* If the low limit is set below what the chip can measure,
  171. store the largest possible 12-bit value in the registers,
  172. so that no alarm will ever trigger. */
  173. if (rpm < 367)
  174. return 0xfff;
  175. return (1500000 / rpm);
  176. }
  177. static inline long temp_from_reg(u8 reg)
  178. {
  179. return (reg * 1000);
  180. }
  181. static inline u8 temp_to_reg(long val)
  182. {
  183. if (val < 0)
  184. val = 0;
  185. else if (val > 1000 * 0xff)
  186. val = 0xff;
  187. return ((val + 500) / 1000);
  188. }
  189. /*
  190. * Device I/O access
  191. */
  192. static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
  193. {
  194. u8 val;
  195. mutex_lock(&data->lock);
  196. outb(reg, data->addr + ADDR_REG_OFFSET);
  197. val = inb(data->addr + DATA_REG_OFFSET);
  198. mutex_unlock(&data->lock);
  199. return val;
  200. }
  201. static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
  202. {
  203. mutex_lock(&data->lock);
  204. outb(reg, data->addr + ADDR_REG_OFFSET);
  205. outb(val, data->addr + DATA_REG_OFFSET);
  206. mutex_unlock(&data->lock);
  207. }
  208. /* It is important to read the MSB first, because doing so latches the
  209. value of the LSB, so we are sure both bytes belong to the same value. */
  210. static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
  211. {
  212. u16 val;
  213. mutex_lock(&data->lock);
  214. outb(reg, data->addr + ADDR_REG_OFFSET);
  215. val = inb(data->addr + DATA_REG_OFFSET) << 8;
  216. outb(++reg, data->addr + ADDR_REG_OFFSET);
  217. val |= inb(data->addr + DATA_REG_OFFSET);
  218. mutex_unlock(&data->lock);
  219. return val;
  220. }
  221. static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
  222. {
  223. mutex_lock(&data->lock);
  224. outb(reg, data->addr + ADDR_REG_OFFSET);
  225. outb(val >> 8, data->addr + DATA_REG_OFFSET);
  226. outb(++reg, data->addr + ADDR_REG_OFFSET);
  227. outb(val & 0xff, data->addr + DATA_REG_OFFSET);
  228. mutex_unlock(&data->lock);
  229. }
  230. static struct f71805f_data *f71805f_update_device(struct device *dev)
  231. {
  232. struct f71805f_data *data = dev_get_drvdata(dev);
  233. int nr;
  234. mutex_lock(&data->update_lock);
  235. /* Limit registers cache is refreshed after 60 seconds */
  236. if (time_after(jiffies, data->last_updated + 60 * HZ)
  237. || !data->valid) {
  238. for (nr = 0; nr < 9; nr++) {
  239. data->in_high[nr] = f71805f_read8(data,
  240. F71805F_REG_IN_HIGH(nr));
  241. data->in_low[nr] = f71805f_read8(data,
  242. F71805F_REG_IN_LOW(nr));
  243. }
  244. for (nr = 0; nr < 3; nr++) {
  245. if (data->fan_enabled & (1 << nr))
  246. data->fan_low[nr] = f71805f_read16(data,
  247. F71805F_REG_FAN_LOW(nr));
  248. }
  249. for (nr = 0; nr < 3; nr++) {
  250. data->temp_high[nr] = f71805f_read8(data,
  251. F71805F_REG_TEMP_HIGH(nr));
  252. data->temp_hyst[nr] = f71805f_read8(data,
  253. F71805F_REG_TEMP_HYST(nr));
  254. }
  255. data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
  256. data->last_limits = jiffies;
  257. }
  258. /* Measurement registers cache is refreshed after 1 second */
  259. if (time_after(jiffies, data->last_updated + HZ)
  260. || !data->valid) {
  261. for (nr = 0; nr < 9; nr++) {
  262. data->in[nr] = f71805f_read8(data,
  263. F71805F_REG_IN(nr));
  264. }
  265. for (nr = 0; nr < 3; nr++) {
  266. if (data->fan_enabled & (1 << nr))
  267. data->fan[nr] = f71805f_read16(data,
  268. F71805F_REG_FAN(nr));
  269. }
  270. for (nr = 0; nr < 3; nr++) {
  271. data->temp[nr] = f71805f_read8(data,
  272. F71805F_REG_TEMP(nr));
  273. }
  274. for (nr = 0; nr < 3; nr++) {
  275. data->alarms[nr] = f71805f_read8(data,
  276. F71805F_REG_STATUS(nr));
  277. }
  278. data->last_updated = jiffies;
  279. data->valid = 1;
  280. }
  281. mutex_unlock(&data->update_lock);
  282. return data;
  283. }
  284. /*
  285. * Sysfs interface
  286. */
  287. static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
  288. char *buf)
  289. {
  290. struct f71805f_data *data = f71805f_update_device(dev);
  291. return sprintf(buf, "%ld\n", in0_from_reg(data->in[0]));
  292. }
  293. static ssize_t show_in0_max(struct device *dev, struct device_attribute
  294. *devattr, char *buf)
  295. {
  296. struct f71805f_data *data = f71805f_update_device(dev);
  297. return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[0]));
  298. }
  299. static ssize_t show_in0_min(struct device *dev, struct device_attribute
  300. *devattr, char *buf)
  301. {
  302. struct f71805f_data *data = f71805f_update_device(dev);
  303. return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[0]));
  304. }
  305. static ssize_t set_in0_max(struct device *dev, struct device_attribute
  306. *devattr, const char *buf, size_t count)
  307. {
  308. struct f71805f_data *data = dev_get_drvdata(dev);
  309. long val = simple_strtol(buf, NULL, 10);
  310. mutex_lock(&data->update_lock);
  311. data->in_high[0] = in0_to_reg(val);
  312. f71805f_write8(data, F71805F_REG_IN_HIGH(0), data->in_high[0]);
  313. mutex_unlock(&data->update_lock);
  314. return count;
  315. }
  316. static ssize_t set_in0_min(struct device *dev, struct device_attribute
  317. *devattr, const char *buf, size_t count)
  318. {
  319. struct f71805f_data *data = dev_get_drvdata(dev);
  320. long val = simple_strtol(buf, NULL, 10);
  321. mutex_lock(&data->update_lock);
  322. data->in_low[0] = in0_to_reg(val);
  323. f71805f_write8(data, F71805F_REG_IN_LOW(0), data->in_low[0]);
  324. mutex_unlock(&data->update_lock);
  325. return count;
  326. }
  327. static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
  328. char *buf)
  329. {
  330. struct f71805f_data *data = f71805f_update_device(dev);
  331. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  332. int nr = attr->index;
  333. return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
  334. }
  335. static ssize_t show_in_max(struct device *dev, struct device_attribute
  336. *devattr, char *buf)
  337. {
  338. struct f71805f_data *data = f71805f_update_device(dev);
  339. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  340. int nr = attr->index;
  341. return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
  342. }
  343. static ssize_t show_in_min(struct device *dev, struct device_attribute
  344. *devattr, char *buf)
  345. {
  346. struct f71805f_data *data = f71805f_update_device(dev);
  347. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  348. int nr = attr->index;
  349. return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
  350. }
  351. static ssize_t set_in_max(struct device *dev, struct device_attribute
  352. *devattr, const char *buf, size_t count)
  353. {
  354. struct f71805f_data *data = dev_get_drvdata(dev);
  355. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  356. int nr = attr->index;
  357. long val = simple_strtol(buf, NULL, 10);
  358. mutex_lock(&data->update_lock);
  359. data->in_high[nr] = in_to_reg(val);
  360. f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
  361. mutex_unlock(&data->update_lock);
  362. return count;
  363. }
  364. static ssize_t set_in_min(struct device *dev, struct device_attribute
  365. *devattr, const char *buf, size_t count)
  366. {
  367. struct f71805f_data *data = dev_get_drvdata(dev);
  368. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  369. int nr = attr->index;
  370. long val = simple_strtol(buf, NULL, 10);
  371. mutex_lock(&data->update_lock);
  372. data->in_low[nr] = in_to_reg(val);
  373. f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
  374. mutex_unlock(&data->update_lock);
  375. return count;
  376. }
  377. static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
  378. char *buf)
  379. {
  380. struct f71805f_data *data = f71805f_update_device(dev);
  381. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  382. int nr = attr->index;
  383. return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
  384. }
  385. static ssize_t show_fan_min(struct device *dev, struct device_attribute
  386. *devattr, char *buf)
  387. {
  388. struct f71805f_data *data = f71805f_update_device(dev);
  389. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  390. int nr = attr->index;
  391. return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
  392. }
  393. static ssize_t set_fan_min(struct device *dev, struct device_attribute
  394. *devattr, const char *buf, size_t count)
  395. {
  396. struct f71805f_data *data = dev_get_drvdata(dev);
  397. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  398. int nr = attr->index;
  399. long val = simple_strtol(buf, NULL, 10);
  400. mutex_lock(&data->update_lock);
  401. data->fan_low[nr] = fan_to_reg(val);
  402. f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
  403. mutex_unlock(&data->update_lock);
  404. return count;
  405. }
  406. static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
  407. char *buf)
  408. {
  409. struct f71805f_data *data = f71805f_update_device(dev);
  410. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  411. int nr = attr->index;
  412. return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
  413. }
  414. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  415. *devattr, char *buf)
  416. {
  417. struct f71805f_data *data = f71805f_update_device(dev);
  418. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  419. int nr = attr->index;
  420. return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
  421. }
  422. static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
  423. *devattr, char *buf)
  424. {
  425. struct f71805f_data *data = f71805f_update_device(dev);
  426. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  427. int nr = attr->index;
  428. return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
  429. }
  430. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  431. *devattr, char *buf)
  432. {
  433. struct f71805f_data *data = f71805f_update_device(dev);
  434. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  435. int nr = attr->index;
  436. /* 3 is diode, 4 is thermistor */
  437. return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
  438. }
  439. static ssize_t set_temp_max(struct device *dev, struct device_attribute
  440. *devattr, const char *buf, size_t count)
  441. {
  442. struct f71805f_data *data = dev_get_drvdata(dev);
  443. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  444. int nr = attr->index;
  445. long val = simple_strtol(buf, NULL, 10);
  446. mutex_lock(&data->update_lock);
  447. data->temp_high[nr] = temp_to_reg(val);
  448. f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
  449. mutex_unlock(&data->update_lock);
  450. return count;
  451. }
  452. static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
  453. *devattr, const char *buf, size_t count)
  454. {
  455. struct f71805f_data *data = dev_get_drvdata(dev);
  456. struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
  457. int nr = attr->index;
  458. long val = simple_strtol(buf, NULL, 10);
  459. mutex_lock(&data->update_lock);
  460. data->temp_hyst[nr] = temp_to_reg(val);
  461. f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
  462. mutex_unlock(&data->update_lock);
  463. return count;
  464. }
  465. static ssize_t show_alarms_in(struct device *dev, struct device_attribute
  466. *devattr, char *buf)
  467. {
  468. struct f71805f_data *data = f71805f_update_device(dev);
  469. return sprintf(buf, "%d\n", data->alarms[0] |
  470. ((data->alarms[1] & 0x01) << 8));
  471. }
  472. static ssize_t show_alarms_fan(struct device *dev, struct device_attribute
  473. *devattr, char *buf)
  474. {
  475. struct f71805f_data *data = f71805f_update_device(dev);
  476. return sprintf(buf, "%d\n", data->alarms[2] & 0x07);
  477. }
  478. static ssize_t show_alarms_temp(struct device *dev, struct device_attribute
  479. *devattr, char *buf)
  480. {
  481. struct f71805f_data *data = f71805f_update_device(dev);
  482. return sprintf(buf, "%d\n", (data->alarms[1] >> 3) & 0x07);
  483. }
  484. static ssize_t show_name(struct device *dev, struct device_attribute
  485. *devattr, char *buf)
  486. {
  487. struct f71805f_data *data = dev_get_drvdata(dev);
  488. return sprintf(buf, "%s\n", data->name);
  489. }
  490. static struct device_attribute f71805f_dev_attr[] = {
  491. __ATTR(in0_input, S_IRUGO, show_in0, NULL),
  492. __ATTR(in0_max, S_IRUGO| S_IWUSR, show_in0_max, set_in0_max),
  493. __ATTR(in0_min, S_IRUGO| S_IWUSR, show_in0_min, set_in0_min),
  494. __ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL),
  495. __ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL),
  496. __ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL),
  497. __ATTR(name, S_IRUGO, show_name, NULL),
  498. };
  499. static struct sensor_device_attribute f71805f_sensor_attr[] = {
  500. SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
  501. SENSOR_ATTR(in1_max, S_IRUGO | S_IWUSR,
  502. show_in_max, set_in_max, 1),
  503. SENSOR_ATTR(in1_min, S_IRUGO | S_IWUSR,
  504. show_in_min, set_in_min, 1),
  505. SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
  506. SENSOR_ATTR(in2_max, S_IRUGO | S_IWUSR,
  507. show_in_max, set_in_max, 2),
  508. SENSOR_ATTR(in2_min, S_IRUGO | S_IWUSR,
  509. show_in_min, set_in_min, 2),
  510. SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
  511. SENSOR_ATTR(in3_max, S_IRUGO | S_IWUSR,
  512. show_in_max, set_in_max, 3),
  513. SENSOR_ATTR(in3_min, S_IRUGO | S_IWUSR,
  514. show_in_min, set_in_min, 3),
  515. SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
  516. SENSOR_ATTR(in4_max, S_IRUGO | S_IWUSR,
  517. show_in_max, set_in_max, 4),
  518. SENSOR_ATTR(in4_min, S_IRUGO | S_IWUSR,
  519. show_in_min, set_in_min, 4),
  520. SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
  521. SENSOR_ATTR(in5_max, S_IRUGO | S_IWUSR,
  522. show_in_max, set_in_max, 5),
  523. SENSOR_ATTR(in5_min, S_IRUGO | S_IWUSR,
  524. show_in_min, set_in_min, 5),
  525. SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
  526. SENSOR_ATTR(in6_max, S_IRUGO | S_IWUSR,
  527. show_in_max, set_in_max, 6),
  528. SENSOR_ATTR(in6_min, S_IRUGO | S_IWUSR,
  529. show_in_min, set_in_min, 6),
  530. SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
  531. SENSOR_ATTR(in7_max, S_IRUGO | S_IWUSR,
  532. show_in_max, set_in_max, 7),
  533. SENSOR_ATTR(in7_min, S_IRUGO | S_IWUSR,
  534. show_in_min, set_in_min, 7),
  535. SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
  536. SENSOR_ATTR(in8_max, S_IRUGO | S_IWUSR,
  537. show_in_max, set_in_max, 8),
  538. SENSOR_ATTR(in8_min, S_IRUGO | S_IWUSR,
  539. show_in_min, set_in_min, 8),
  540. SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0),
  541. SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR,
  542. show_temp_max, set_temp_max, 0),
  543. SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
  544. show_temp_hyst, set_temp_hyst, 0),
  545. SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
  546. SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1),
  547. SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR,
  548. show_temp_max, set_temp_max, 1),
  549. SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
  550. show_temp_hyst, set_temp_hyst, 1),
  551. SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
  552. SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2),
  553. SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR,
  554. show_temp_max, set_temp_max, 2),
  555. SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
  556. show_temp_hyst, set_temp_hyst, 2),
  557. SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
  558. };
  559. static struct sensor_device_attribute f71805f_fan_attr[] = {
  560. SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
  561. SENSOR_ATTR(fan1_min, S_IRUGO | S_IWUSR,
  562. show_fan_min, set_fan_min, 0),
  563. SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
  564. SENSOR_ATTR(fan2_min, S_IRUGO | S_IWUSR,
  565. show_fan_min, set_fan_min, 1),
  566. SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
  567. SENSOR_ATTR(fan3_min, S_IRUGO | S_IWUSR,
  568. show_fan_min, set_fan_min, 2),
  569. };
  570. /*
  571. * Device registration and initialization
  572. */
  573. static void __devinit f71805f_init_device(struct f71805f_data *data)
  574. {
  575. u8 reg;
  576. int i;
  577. reg = f71805f_read8(data, F71805F_REG_START);
  578. if ((reg & 0x41) != 0x01) {
  579. printk(KERN_DEBUG DRVNAME ": Starting monitoring "
  580. "operations\n");
  581. f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
  582. }
  583. /* Fan monitoring can be disabled. If it is, we won't be polling
  584. the register values, and won't create the related sysfs files. */
  585. for (i = 0; i < 3; i++) {
  586. reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(i));
  587. if (!(reg & 0x80))
  588. data->fan_enabled |= (1 << i);
  589. }
  590. }
  591. static int __devinit f71805f_probe(struct platform_device *pdev)
  592. {
  593. struct f71805f_data *data;
  594. struct resource *res;
  595. int i, err;
  596. if (!(data = kzalloc(sizeof(struct f71805f_data), GFP_KERNEL))) {
  597. err = -ENOMEM;
  598. printk(KERN_ERR DRVNAME ": Out of memory\n");
  599. goto exit;
  600. }
  601. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  602. data->addr = res->start;
  603. mutex_init(&data->lock);
  604. data->name = "f71805f";
  605. mutex_init(&data->update_lock);
  606. platform_set_drvdata(pdev, data);
  607. data->class_dev = hwmon_device_register(&pdev->dev);
  608. if (IS_ERR(data->class_dev)) {
  609. err = PTR_ERR(data->class_dev);
  610. dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
  611. goto exit_free;
  612. }
  613. /* Initialize the F71805F chip */
  614. f71805f_init_device(data);
  615. /* Register sysfs interface files */
  616. for (i = 0; i < ARRAY_SIZE(f71805f_dev_attr); i++) {
  617. err = device_create_file(&pdev->dev, &f71805f_dev_attr[i]);
  618. if (err)
  619. goto exit_class;
  620. }
  621. for (i = 0; i < ARRAY_SIZE(f71805f_sensor_attr); i++) {
  622. err = device_create_file(&pdev->dev,
  623. &f71805f_sensor_attr[i].dev_attr);
  624. if (err)
  625. goto exit_class;
  626. }
  627. for (i = 0; i < ARRAY_SIZE(f71805f_fan_attr); i++) {
  628. if (!(data->fan_enabled & (1 << (i / 2))))
  629. continue;
  630. err = device_create_file(&pdev->dev,
  631. &f71805f_fan_attr[i].dev_attr);
  632. if (err)
  633. goto exit_class;
  634. }
  635. return 0;
  636. exit_class:
  637. dev_err(&pdev->dev, "Sysfs interface creation failed\n");
  638. hwmon_device_unregister(data->class_dev);
  639. exit_free:
  640. kfree(data);
  641. exit:
  642. return err;
  643. }
  644. static int __devexit f71805f_remove(struct platform_device *pdev)
  645. {
  646. struct f71805f_data *data = platform_get_drvdata(pdev);
  647. platform_set_drvdata(pdev, NULL);
  648. hwmon_device_unregister(data->class_dev);
  649. kfree(data);
  650. return 0;
  651. }
  652. static struct platform_driver f71805f_driver = {
  653. .driver = {
  654. .owner = THIS_MODULE,
  655. .name = DRVNAME,
  656. },
  657. .probe = f71805f_probe,
  658. .remove = __devexit_p(f71805f_remove),
  659. };
  660. static int __init f71805f_device_add(unsigned short address)
  661. {
  662. int err;
  663. pdev = platform_device_alloc(DRVNAME, address);
  664. if (!pdev) {
  665. err = -ENOMEM;
  666. printk(KERN_ERR DRVNAME ": Device allocation failed\n");
  667. goto exit;
  668. }
  669. f71805f_resource.start = address;
  670. f71805f_resource.end = address + REGION_LENGTH - 1;
  671. f71805f_resource.name = pdev->name;
  672. err = platform_device_add_resources(pdev, &f71805f_resource, 1);
  673. if (err) {
  674. printk(KERN_ERR DRVNAME ": Device resource addition failed "
  675. "(%d)\n", err);
  676. goto exit_device_put;
  677. }
  678. err = platform_device_add(pdev);
  679. if (err) {
  680. printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
  681. err);
  682. goto exit_device_put;
  683. }
  684. return 0;
  685. exit_device_put:
  686. platform_device_put(pdev);
  687. exit:
  688. return err;
  689. }
  690. static int __init f71805f_find(int sioaddr, unsigned short *address)
  691. {
  692. int err = -ENODEV;
  693. u16 devid;
  694. superio_enter(sioaddr);
  695. devid = superio_inw(sioaddr, SIO_REG_MANID);
  696. if (devid != SIO_FINTEK_ID)
  697. goto exit;
  698. devid = superio_inw(sioaddr, SIO_REG_DEVID);
  699. if (devid != SIO_F71805F_ID) {
  700. printk(KERN_INFO DRVNAME ": Unsupported Fintek device, "
  701. "skipping\n");
  702. goto exit;
  703. }
  704. superio_select(sioaddr, F71805F_LD_HWM);
  705. if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
  706. printk(KERN_WARNING DRVNAME ": Device not activated, "
  707. "skipping\n");
  708. goto exit;
  709. }
  710. *address = superio_inw(sioaddr, SIO_REG_ADDR);
  711. if (*address == 0) {
  712. printk(KERN_WARNING DRVNAME ": Base address not set, "
  713. "skipping\n");
  714. goto exit;
  715. }
  716. err = 0;
  717. printk(KERN_INFO DRVNAME ": Found F71805F chip at %#x, revision %u\n",
  718. *address, superio_inb(sioaddr, SIO_REG_DEVREV));
  719. exit:
  720. superio_exit(sioaddr);
  721. return err;
  722. }
  723. static int __init f71805f_init(void)
  724. {
  725. int err;
  726. unsigned short address;
  727. if (f71805f_find(0x2e, &address)
  728. && f71805f_find(0x4e, &address))
  729. return -ENODEV;
  730. err = platform_driver_register(&f71805f_driver);
  731. if (err)
  732. goto exit;
  733. /* Sets global pdev as a side effect */
  734. err = f71805f_device_add(address);
  735. if (err)
  736. goto exit_driver;
  737. return 0;
  738. exit_driver:
  739. platform_driver_unregister(&f71805f_driver);
  740. exit:
  741. return err;
  742. }
  743. static void __exit f71805f_exit(void)
  744. {
  745. platform_device_unregister(pdev);
  746. platform_driver_unregister(&f71805f_driver);
  747. }
  748. MODULE_AUTHOR("Jean Delvare <khali@linux-fr>");
  749. MODULE_LICENSE("GPL");
  750. MODULE_DESCRIPTION("F71805F hardware monitoring driver");
  751. module_init(f71805f_init);
  752. module_exit(f71805f_exit);