soc.c 21 KB

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  1. /* soc.c: Sparc SUNW,soc (Serial Optical Channel) Fibre Channel Sbus adapter support.
  2. *
  3. * Copyright (C) 1996,1997,1999 Jakub Jelinek (jj@ultra.linux.cz)
  4. * Copyright (C) 1997,1998 Jirka Hanika (geo@ff.cuni.cz)
  5. *
  6. * Sources:
  7. * Fibre Channel Physical & Signaling Interface (FC-PH), dpANS, 1994
  8. * dpANS Fibre Channel Protocol for SCSI (X3.269-199X), Rev. 012, 1995
  9. *
  10. * Supported hardware:
  11. * Tested on SOC sbus card bought with SS1000 in Linux running on SS5 and Ultra1.
  12. * For SOC sbus cards, you have to make sure your FCode is 1.52 or later.
  13. * If you have older FCode, you should try to upgrade or get SOC microcode from Sun
  14. * (the microcode is present in Solaris soc driver as well). In that case you need
  15. * to #define HAVE_SOC_UCODE and format the microcode into soc_asm.c. For the exact
  16. * format mail me and I will tell you. I cannot offer you the actual microcode though,
  17. * unless Sun confirms they don't mind.
  18. */
  19. static char *version =
  20. "soc.c:v1.3 9/Feb/99 Jakub Jelinek (jj@ultra.linux.cz), Jirka Hanika (geo@ff.cuni.cz)\n";
  21. #include <linux/module.h>
  22. #include <linux/kernel.h>
  23. #include <linux/sched.h>
  24. #include <linux/types.h>
  25. #include <linux/fcntl.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/ptrace.h>
  28. #include <linux/ioport.h>
  29. #include <linux/in.h>
  30. #include <linux/slab.h>
  31. #include <linux/string.h>
  32. #include <linux/init.h>
  33. #include <linux/bitops.h>
  34. #include <asm/io.h>
  35. #include <asm/dma.h>
  36. #include <linux/errno.h>
  37. #include <asm/byteorder.h>
  38. #include <asm/openprom.h>
  39. #include <asm/oplib.h>
  40. #include <asm/pgtable.h>
  41. #include <asm/irq.h>
  42. /* #define SOCDEBUG */
  43. /* #define HAVE_SOC_UCODE */
  44. #include "fcp_impl.h"
  45. #include "soc.h"
  46. #ifdef HAVE_SOC_UCODE
  47. #include "soc_asm.h"
  48. #endif
  49. #define soc_printk printk ("soc%d: ", s->soc_no); printk
  50. #ifdef SOCDEBUG
  51. #define SOD(x) soc_printk x;
  52. #else
  53. #define SOD(x)
  54. #endif
  55. #define for_each_soc(s) for (s = socs; s; s = s->next)
  56. struct soc *socs = NULL;
  57. static inline void soc_disable(struct soc *s)
  58. {
  59. sbus_writel(0, s->regs + IMASK);
  60. sbus_writel(SOC_CMD_SOFT_RESET, s->regs + CMD);
  61. }
  62. static inline void soc_enable(struct soc *s)
  63. {
  64. SOD(("enable %08x\n", s->cfg))
  65. sbus_writel(0, s->regs + SAE);
  66. sbus_writel(s->cfg, s->regs + CFG);
  67. sbus_writel(SOC_CMD_RSP_QALL, s->regs + CMD);
  68. SOC_SETIMASK(s, SOC_IMASK_RSP_QALL | SOC_IMASK_SAE);
  69. SOD(("imask %08lx %08lx\n", s->imask, sbus_readl(s->regs + IMAK)));
  70. }
  71. static void soc_reset(fc_channel *fc)
  72. {
  73. soc_port *port = (soc_port *)fc;
  74. struct soc *s = port->s;
  75. /* FIXME */
  76. soc_disable(s);
  77. s->req[0].seqno = 1;
  78. s->req[1].seqno = 1;
  79. s->rsp[0].seqno = 1;
  80. s->rsp[1].seqno = 1;
  81. s->req[0].in = 0;
  82. s->req[1].in = 0;
  83. s->rsp[0].in = 0;
  84. s->rsp[1].in = 0;
  85. s->req[0].out = 0;
  86. s->req[1].out = 0;
  87. s->rsp[0].out = 0;
  88. s->rsp[1].out = 0;
  89. /* FIXME */
  90. soc_enable(s);
  91. }
  92. static inline void soc_solicited (struct soc *s)
  93. {
  94. fc_hdr fchdr;
  95. soc_rsp __iomem *hwrsp;
  96. soc_cq_rsp *sw_cq;
  97. int token;
  98. int status;
  99. fc_channel *fc;
  100. sw_cq = &s->rsp[SOC_SOLICITED_RSP_Q];
  101. if (sw_cq->pool == NULL)
  102. sw_cq->pool = (soc_req __iomem *)
  103. (s->xram + xram_get_32low ((xram_p)&sw_cq->hw_cq->address));
  104. sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
  105. SOD (("soc_solicited, %d pkts arrived\n", (sw_cq->in-sw_cq->out) & sw_cq->last))
  106. for (;;) {
  107. hwrsp = (soc_rsp __iomem *)sw_cq->pool + sw_cq->out;
  108. token = xram_get_32low ((xram_p)&hwrsp->shdr.token);
  109. status = xram_get_32low ((xram_p)&hwrsp->status);
  110. fc = (fc_channel *)(&s->port[(token >> 11) & 1]);
  111. if (status == SOC_OK) {
  112. fcp_receive_solicited(fc, token >> 12,
  113. token & ((1 << 11) - 1),
  114. FC_STATUS_OK, NULL);
  115. } else {
  116. xram_copy_from(&fchdr, (xram_p)&hwrsp->fchdr, sizeof(fchdr));
  117. /* We have intentionally defined FC_STATUS_* constants
  118. * to match SOC_* constants, otherwise we'd have to
  119. * translate status.
  120. */
  121. fcp_receive_solicited(fc, token >> 12,
  122. token & ((1 << 11) - 1),
  123. status, &fchdr);
  124. }
  125. if (++sw_cq->out > sw_cq->last) {
  126. sw_cq->seqno++;
  127. sw_cq->out = 0;
  128. }
  129. if (sw_cq->out == sw_cq->in) {
  130. sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
  131. if (sw_cq->out == sw_cq->in) {
  132. /* Tell the hardware about it */
  133. sbus_writel((sw_cq->out << 24) |
  134. (SOC_CMD_RSP_QALL &
  135. ~(SOC_CMD_RSP_Q0 << SOC_SOLICITED_RSP_Q)),
  136. s->regs + CMD);
  137. /* Read it, so that we're sure it has been updated */
  138. sbus_readl(s->regs + CMD);
  139. sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
  140. if (sw_cq->out == sw_cq->in)
  141. break;
  142. }
  143. }
  144. }
  145. }
  146. static inline void soc_request (struct soc *s, u32 cmd)
  147. {
  148. SOC_SETIMASK(s, s->imask & ~(cmd & SOC_CMD_REQ_QALL));
  149. SOD(("imask %08lx %08lx\n", s->imask, sbus_readl(s->regs + IMASK)));
  150. SOD(("Queues available %08x OUT %X %X\n", cmd,
  151. xram_get_8((xram_p)&s->req[0].hw_cq->out),
  152. xram_get_8((xram_p)&s->req[0].hw_cq->out)))
  153. if (s->port[s->curr_port].fc.state != FC_STATE_OFFLINE) {
  154. fcp_queue_empty ((fc_channel *)&(s->port[s->curr_port]));
  155. if (((s->req[1].in + 1) & s->req[1].last) != (s->req[1].out))
  156. fcp_queue_empty ((fc_channel *)&(s->port[1 - s->curr_port]));
  157. } else {
  158. fcp_queue_empty ((fc_channel *)&(s->port[1 - s->curr_port]));
  159. }
  160. if (s->port[1 - s->curr_port].fc.state != FC_STATE_OFFLINE)
  161. s->curr_port ^= 1;
  162. }
  163. static inline void soc_unsolicited (struct soc *s)
  164. {
  165. soc_rsp __iomem *hwrsp, *hwrspc;
  166. soc_cq_rsp *sw_cq;
  167. int count;
  168. int status;
  169. int flags;
  170. fc_channel *fc;
  171. sw_cq = &s->rsp[SOC_UNSOLICITED_RSP_Q];
  172. if (sw_cq->pool == NULL)
  173. sw_cq->pool = (soc_req __iomem *)
  174. (s->xram + (xram_get_32low ((xram_p)&sw_cq->hw_cq->address)));
  175. sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
  176. SOD (("soc_unsolicited, %d packets arrived\n", (sw_cq->in - sw_cq->out) & sw_cq->last))
  177. while (sw_cq->in != sw_cq->out) {
  178. /* ...real work per entry here... */
  179. hwrsp = (soc_rsp __iomem *)sw_cq->pool + sw_cq->out;
  180. hwrspc = NULL;
  181. flags = xram_get_16 ((xram_p)&hwrsp->shdr.flags);
  182. count = xram_get_8 ((xram_p)&hwrsp->count);
  183. fc = (fc_channel *)&s->port[flags & SOC_PORT_B];
  184. SOD(("FC %08lx fcp_state_change %08lx\n",
  185. (long)fc, (long)fc->fcp_state_change))
  186. if (count != 1) {
  187. /* Ugh, continuation entries */
  188. u8 in;
  189. if (count != 2) {
  190. printk("%s: Too many continuations entries %d\n",
  191. fc->name, count);
  192. goto update_out;
  193. }
  194. in = sw_cq->in;
  195. if (in < sw_cq->out) in += sw_cq->last + 1;
  196. if (in < sw_cq->out + 2) {
  197. /* Ask the hardware if they haven't arrived yet. */
  198. sbus_writel((sw_cq->out << 24) |
  199. (SOC_CMD_RSP_QALL &
  200. ~(SOC_CMD_RSP_Q0 << SOC_UNSOLICITED_RSP_Q)),
  201. s->regs + CMD);
  202. /* Read it, so that we're sure it has been updated */
  203. sbus_readl(s->regs + CMD);
  204. sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
  205. in = sw_cq->in;
  206. if (in < sw_cq->out)
  207. in += sw_cq->last + 1;
  208. if (in < sw_cq->out + 2) /* Nothing came, let us wait */
  209. return;
  210. }
  211. if (sw_cq->out == sw_cq->last)
  212. hwrspc = (soc_rsp __iomem *)sw_cq->pool;
  213. else
  214. hwrspc = hwrsp + 1;
  215. }
  216. switch (flags & ~SOC_PORT_B) {
  217. case SOC_STATUS:
  218. status = xram_get_32low ((xram_p)&hwrsp->status);
  219. switch (status) {
  220. case SOC_ONLINE:
  221. SOD(("State change to ONLINE\n"));
  222. fcp_state_change(fc, FC_STATE_ONLINE);
  223. break;
  224. case SOC_OFFLINE:
  225. SOD(("State change to OFFLINE\n"));
  226. fcp_state_change(fc, FC_STATE_OFFLINE);
  227. break;
  228. default:
  229. printk ("%s: Unknown STATUS no %d\n",
  230. fc->name, status);
  231. break;
  232. }
  233. break;
  234. case (SOC_UNSOLICITED|SOC_FC_HDR):
  235. {
  236. int r_ctl = xram_get_8 ((xram_p)&hwrsp->fchdr);
  237. unsigned len;
  238. char buf[64];
  239. if ((r_ctl & 0xf0) == R_CTL_EXTENDED_SVC) {
  240. len = xram_get_32 ((xram_p)&hwrsp->shdr.bytecnt);
  241. if (len < 4 || !hwrspc) {
  242. printk ("%s: Invalid R_CTL %02x "
  243. "continuation entries\n",
  244. fc->name, r_ctl);
  245. } else {
  246. if (len > 60)
  247. len = 60;
  248. xram_copy_from (buf, (xram_p)hwrspc,
  249. (len + 3) & ~3);
  250. if (*(u32 *)buf == LS_DISPLAY) {
  251. int i;
  252. for (i = 4; i < len; i++)
  253. if (buf[i] == '\n')
  254. buf[i] = ' ';
  255. buf[len] = 0;
  256. printk ("%s message: %s\n",
  257. fc->name, buf + 4);
  258. } else {
  259. printk ("%s: Unknown LS_CMD "
  260. "%02x\n", fc->name,
  261. buf[0]);
  262. }
  263. }
  264. } else {
  265. printk ("%s: Unsolicited R_CTL %02x "
  266. "not handled\n", fc->name, r_ctl);
  267. }
  268. }
  269. break;
  270. default:
  271. printk ("%s: Unexpected flags %08x\n", fc->name, flags);
  272. break;
  273. };
  274. update_out:
  275. if (++sw_cq->out > sw_cq->last) {
  276. sw_cq->seqno++;
  277. sw_cq->out = 0;
  278. }
  279. if (hwrspc) {
  280. if (++sw_cq->out > sw_cq->last) {
  281. sw_cq->seqno++;
  282. sw_cq->out = 0;
  283. }
  284. }
  285. if (sw_cq->out == sw_cq->in) {
  286. sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
  287. if (sw_cq->out == sw_cq->in) {
  288. /* Tell the hardware about it */
  289. sbus_writel((sw_cq->out << 24) |
  290. (SOC_CMD_RSP_QALL &
  291. ~(SOC_CMD_RSP_Q0 << SOC_UNSOLICITED_RSP_Q)),
  292. s->regs + CMD);
  293. /* Read it, so that we're sure it has been updated */
  294. sbus_readl(s->regs + CMD);
  295. sw_cq->in = xram_get_8 ((xram_p)&sw_cq->hw_cq->in);
  296. }
  297. }
  298. }
  299. }
  300. static irqreturn_t soc_intr(int irq, void *dev_id, struct pt_regs *regs)
  301. {
  302. u32 cmd;
  303. unsigned long flags;
  304. register struct soc *s = (struct soc *)dev_id;
  305. spin_lock_irqsave(&s->lock, flags);
  306. cmd = sbus_readl(s->regs + CMD);
  307. for (; (cmd = SOC_INTR (s, cmd)); cmd = sbus_readl(s->regs + CMD)) {
  308. if (cmd & SOC_CMD_RSP_Q1) soc_unsolicited (s);
  309. if (cmd & SOC_CMD_RSP_Q0) soc_solicited (s);
  310. if (cmd & SOC_CMD_REQ_QALL) soc_request (s, cmd);
  311. }
  312. spin_unlock_irqrestore(&s->lock, flags);
  313. return IRQ_HANDLED;
  314. }
  315. #define TOKEN(proto, port, token) (((proto)<<12)|(token)|(port))
  316. static int soc_hw_enque (fc_channel *fc, fcp_cmnd *fcmd)
  317. {
  318. soc_port *port = (soc_port *)fc;
  319. struct soc *s = port->s;
  320. int qno;
  321. soc_cq_req *sw_cq;
  322. int cq_next_in;
  323. soc_req *request;
  324. fc_hdr *fch;
  325. int i;
  326. if (fcmd->proto == TYPE_SCSI_FCP)
  327. qno = 1;
  328. else
  329. qno = 0;
  330. SOD(("Putting a FCP packet type %d into hw queue %d\n", fcmd->proto, qno))
  331. if (s->imask & (SOC_IMASK_REQ_Q0 << qno)) {
  332. SOD(("EIO %08x\n", s->imask))
  333. return -EIO;
  334. }
  335. sw_cq = s->req + qno;
  336. cq_next_in = (sw_cq->in + 1) & sw_cq->last;
  337. if (cq_next_in == sw_cq->out &&
  338. cq_next_in == (sw_cq->out = xram_get_8((xram_p)&sw_cq->hw_cq->out))) {
  339. SOD(("%d IN %d OUT %d LAST %d\n", qno, sw_cq->in, sw_cq->out, sw_cq->last))
  340. SOC_SETIMASK(s, s->imask | (SOC_IMASK_REQ_Q0 << qno));
  341. SOD(("imask %08lx %08lx\n", s->imask, sbus_readl(s->regs + IMASK)));
  342. /* If queue is full, just say NO */
  343. return -EBUSY;
  344. }
  345. request = sw_cq->pool + sw_cq->in;
  346. fch = &request->fchdr;
  347. switch (fcmd->proto) {
  348. case TYPE_SCSI_FCP:
  349. request->shdr.token = TOKEN(TYPE_SCSI_FCP, port->mask, fcmd->token);
  350. request->data[0].base = fc->dma_scsi_cmd + fcmd->token * sizeof(fcp_cmd);
  351. request->data[0].count = sizeof(fcp_cmd);
  352. request->data[1].base = fc->dma_scsi_rsp + fcmd->token * fc->rsp_size;
  353. request->data[1].count = fc->rsp_size;
  354. if (fcmd->data) {
  355. request->shdr.segcnt = 3;
  356. i = fc->scsi_cmd_pool[fcmd->token].fcp_data_len;
  357. request->shdr.bytecnt = i;
  358. request->data[2].base = fcmd->data;
  359. request->data[2].count = i;
  360. request->type =
  361. (fc->scsi_cmd_pool[fcmd->token].fcp_cntl & FCP_CNTL_WRITE) ?
  362. SOC_CQTYPE_IO_WRITE : SOC_CQTYPE_IO_READ;
  363. } else {
  364. request->shdr.segcnt = 2;
  365. request->shdr.bytecnt = 0;
  366. request->data[2].base = 0;
  367. request->data[2].count = 0;
  368. request->type = SOC_CQTYPE_SIMPLE;
  369. }
  370. FILL_FCHDR_RCTL_DID(fch, R_CTL_COMMAND, fc->did);
  371. FILL_FCHDR_SID(fch, fc->sid);
  372. FILL_FCHDR_TYPE_FCTL(fch, TYPE_SCSI_FCP,
  373. F_CTL_FIRST_SEQ | F_CTL_SEQ_INITIATIVE);
  374. FILL_FCHDR_SEQ_DF_SEQ(fch, 0, 0, 0);
  375. FILL_FCHDR_OXRX(fch, 0xffff, 0xffff);
  376. fch->param = 0;
  377. request->shdr.flags = port->flags;
  378. request->shdr.class = 2;
  379. break;
  380. case PROTO_OFFLINE:
  381. memset (request, 0, sizeof(*request));
  382. request->shdr.token = TOKEN(PROTO_OFFLINE, port->mask, fcmd->token);
  383. request->type = SOC_CQTYPE_OFFLINE;
  384. FILL_FCHDR_RCTL_DID(fch, R_CTL_COMMAND, fc->did);
  385. FILL_FCHDR_SID(fch, fc->sid);
  386. FILL_FCHDR_TYPE_FCTL(fch, TYPE_SCSI_FCP,
  387. F_CTL_FIRST_SEQ | F_CTL_SEQ_INITIATIVE);
  388. FILL_FCHDR_SEQ_DF_SEQ(fch, 0, 0, 0);
  389. FILL_FCHDR_OXRX(fch, 0xffff, 0xffff);
  390. request->shdr.flags = port->flags;
  391. break;
  392. case PROTO_REPORT_AL_MAP:
  393. /* SOC only supports Point-to-Point topology, no FC-AL, sorry... */
  394. return -ENOSYS;
  395. default:
  396. request->shdr.token = TOKEN(fcmd->proto, port->mask, fcmd->token);
  397. request->shdr.class = 2;
  398. request->shdr.flags = port->flags;
  399. memcpy (fch, &fcmd->fch, sizeof(fc_hdr));
  400. request->data[0].count = fcmd->cmdlen;
  401. request->data[1].count = fcmd->rsplen;
  402. request->type = fcmd->class;
  403. switch (fcmd->class) {
  404. case FC_CLASS_OUTBOUND:
  405. request->data[0].base = fcmd->cmd;
  406. request->data[0].count = fcmd->cmdlen;
  407. request->type = SOC_CQTYPE_OUTBOUND;
  408. request->shdr.bytecnt = fcmd->cmdlen;
  409. request->shdr.segcnt = 1;
  410. break;
  411. case FC_CLASS_INBOUND:
  412. request->data[0].base = fcmd->rsp;
  413. request->data[0].count = fcmd->rsplen;
  414. request->type = SOC_CQTYPE_INBOUND;
  415. request->shdr.bytecnt = 0;
  416. request->shdr.segcnt = 1;
  417. break;
  418. case FC_CLASS_SIMPLE:
  419. request->data[0].base = fcmd->cmd;
  420. request->data[1].base = fcmd->rsp;
  421. request->data[0].count = fcmd->cmdlen;
  422. request->data[1].count = fcmd->rsplen;
  423. request->type = SOC_CQTYPE_SIMPLE;
  424. request->shdr.bytecnt = fcmd->cmdlen;
  425. request->shdr.segcnt = 2;
  426. break;
  427. case FC_CLASS_IO_READ:
  428. case FC_CLASS_IO_WRITE:
  429. request->data[0].base = fcmd->cmd;
  430. request->data[1].base = fcmd->rsp;
  431. request->data[0].count = fcmd->cmdlen;
  432. request->data[1].count = fcmd->rsplen;
  433. request->type =
  434. (fcmd->class == FC_CLASS_IO_READ) ?
  435. SOC_CQTYPE_IO_READ : SOC_CQTYPE_IO_WRITE;
  436. if (fcmd->data) {
  437. request->data[2].base = fcmd->data;
  438. request->data[2].count = fcmd->datalen;
  439. request->shdr.bytecnt = fcmd->datalen;
  440. request->shdr.segcnt = 3;
  441. } else {
  442. request->shdr.bytecnt = 0;
  443. request->shdr.segcnt = 2;
  444. }
  445. break;
  446. };
  447. break;
  448. };
  449. request->count = 1;
  450. request->flags = 0;
  451. request->seqno = sw_cq->seqno;
  452. /* And now tell the SOC about it */
  453. if (++sw_cq->in > sw_cq->last) {
  454. sw_cq->in = 0;
  455. sw_cq->seqno++;
  456. }
  457. SOD(("Putting %08x into cmd\n",
  458. SOC_CMD_RSP_QALL | (sw_cq->in << 24) | (SOC_CMD_REQ_Q0 << qno)))
  459. sbus_writel(SOC_CMD_RSP_QALL | (sw_cq->in << 24) | (SOC_CMD_REQ_Q0 << qno),
  460. s->regs + CMD);
  461. /* Read so that command is completed. */
  462. sbus_readl(s->regs + CMD);
  463. return 0;
  464. }
  465. static inline void soc_download_fw(struct soc *s)
  466. {
  467. #ifdef HAVE_SOC_UCODE
  468. xram_copy_to (s->xram, soc_ucode, sizeof(soc_ucode));
  469. xram_bzero (s->xram + sizeof(soc_ucode), 32768 - sizeof(soc_ucode));
  470. #endif
  471. }
  472. /* Check for what the best SBUS burst we can use happens
  473. * to be on this machine.
  474. */
  475. static inline void soc_init_bursts(struct soc *s, struct sbus_dev *sdev)
  476. {
  477. int bsizes, bsizes_more;
  478. bsizes = (prom_getintdefault(sdev->prom_node,"burst-sizes",0xff) & 0xff);
  479. bsizes_more = (prom_getintdefault(sdev->bus->prom_node, "burst-sizes", 0xff) & 0xff);
  480. bsizes &= bsizes_more;
  481. if ((bsizes & 0x7f) == 0x7f)
  482. s->cfg = SOC_CFG_BURST_64;
  483. else if ((bsizes & 0x3f) == 0x3f)
  484. s->cfg = SOC_CFG_BURST_32;
  485. else if ((bsizes & 0x1f) == 0x1f)
  486. s->cfg = SOC_CFG_BURST_16;
  487. else
  488. s->cfg = SOC_CFG_BURST_4;
  489. }
  490. static inline void soc_init(struct sbus_dev *sdev, int no)
  491. {
  492. unsigned char tmp[60];
  493. int propl;
  494. struct soc *s;
  495. static int version_printed = 0;
  496. soc_hw_cq cq[8];
  497. int size, i;
  498. int irq;
  499. s = kzalloc (sizeof (struct soc), GFP_KERNEL);
  500. if (s == NULL)
  501. return;
  502. spin_lock_init(&s->lock);
  503. s->soc_no = no;
  504. SOD(("socs %08lx soc_intr %08lx soc_hw_enque %08x\n",
  505. (long)socs, (long)soc_intr, (long)soc_hw_enque))
  506. if (version_printed++ == 0)
  507. printk (version);
  508. s->port[0].fc.module = THIS_MODULE;
  509. s->port[1].fc.module = THIS_MODULE;
  510. s->next = socs;
  511. socs = s;
  512. s->port[0].fc.dev = sdev;
  513. s->port[1].fc.dev = sdev;
  514. s->port[0].s = s;
  515. s->port[1].s = s;
  516. s->port[0].fc.next = &s->port[1].fc;
  517. /* World Wide Name of SOC */
  518. propl = prom_getproperty (sdev->prom_node, "soc-wwn", tmp, sizeof(tmp));
  519. if (propl != sizeof (fc_wwn)) {
  520. s->wwn.naaid = NAAID_IEEE;
  521. s->wwn.lo = 0x12345678;
  522. } else
  523. memcpy (&s->wwn, tmp, sizeof (fc_wwn));
  524. propl = prom_getproperty (sdev->prom_node, "port-wwns", tmp, sizeof(tmp));
  525. if (propl != 2 * sizeof (fc_wwn)) {
  526. s->port[0].fc.wwn_nport.naaid = NAAID_IEEE_EXT;
  527. s->port[0].fc.wwn_nport.hi = s->wwn.hi;
  528. s->port[0].fc.wwn_nport.lo = s->wwn.lo;
  529. s->port[1].fc.wwn_nport.naaid = NAAID_IEEE_EXT;
  530. s->port[1].fc.wwn_nport.nportid = 1;
  531. s->port[1].fc.wwn_nport.hi = s->wwn.hi;
  532. s->port[1].fc.wwn_nport.lo = s->wwn.lo;
  533. } else {
  534. memcpy (&s->port[0].fc.wwn_nport, tmp, sizeof (fc_wwn));
  535. memcpy (&s->port[1].fc.wwn_nport, tmp + sizeof (fc_wwn), sizeof (fc_wwn));
  536. }
  537. memcpy (&s->port[0].fc.wwn_node, &s->wwn, sizeof (fc_wwn));
  538. memcpy (&s->port[1].fc.wwn_node, &s->wwn, sizeof (fc_wwn));
  539. SOD(("Got wwns %08x%08x ports %08x%08x and %08x%08x\n",
  540. *(u32 *)&s->port[0].fc.wwn_nport, s->port[0].fc.wwn_nport.lo,
  541. *(u32 *)&s->port[0].fc.wwn_nport, s->port[0].fc.wwn_nport.lo,
  542. *(u32 *)&s->port[1].fc.wwn_nport, s->port[1].fc.wwn_nport.lo))
  543. s->port[0].fc.sid = 1;
  544. s->port[1].fc.sid = 17;
  545. s->port[0].fc.did = 2;
  546. s->port[1].fc.did = 18;
  547. s->port[0].fc.reset = soc_reset;
  548. s->port[1].fc.reset = soc_reset;
  549. if (sdev->num_registers == 1) {
  550. /* Probably SunFire onboard SOC */
  551. s->xram = sbus_ioremap(&sdev->resource[0], 0,
  552. 0x10000UL, "soc xram");
  553. s->regs = sbus_ioremap(&sdev->resource[0], 0x10000UL,
  554. 0x10UL, "soc regs");
  555. } else {
  556. /* Probably SOC sbus card */
  557. s->xram = sbus_ioremap(&sdev->resource[1], 0,
  558. sdev->reg_addrs[1].reg_size, "soc xram");
  559. s->regs = sbus_ioremap(&sdev->resource[2], 0,
  560. sdev->reg_addrs[2].reg_size, "soc regs");
  561. }
  562. soc_init_bursts(s, sdev);
  563. SOD(("Disabling SOC\n"))
  564. soc_disable (s);
  565. irq = sdev->irqs[0];
  566. if (request_irq (irq, soc_intr, SA_SHIRQ, "SOC", (void *)s)) {
  567. soc_printk ("Cannot order irq %d to go\n", irq);
  568. socs = s->next;
  569. return;
  570. }
  571. SOD(("SOC uses IRQ%s\n", __irq_itoa(irq)))
  572. s->port[0].fc.irq = irq;
  573. s->port[1].fc.irq = irq;
  574. sprintf (s->port[0].fc.name, "soc%d port A", no);
  575. sprintf (s->port[1].fc.name, "soc%d port B", no);
  576. s->port[0].flags = SOC_FC_HDR | SOC_PORT_A;
  577. s->port[1].flags = SOC_FC_HDR | SOC_PORT_B;
  578. s->port[1].mask = (1 << 11);
  579. s->port[0].fc.hw_enque = soc_hw_enque;
  580. s->port[1].fc.hw_enque = soc_hw_enque;
  581. soc_download_fw (s);
  582. SOD(("Downloaded firmware\n"))
  583. /* Now setup xram circular queues */
  584. memset (cq, 0, sizeof(cq));
  585. size = (SOC_CQ_REQ0_SIZE + SOC_CQ_REQ1_SIZE) * sizeof(soc_req);
  586. s->req_cpu = sbus_alloc_consistent(sdev, size, &s->req_dvma);
  587. s->req[0].pool = s->req_cpu;
  588. cq[0].address = s->req_dvma;
  589. s->req[1].pool = s->req[0].pool + SOC_CQ_REQ0_SIZE;
  590. s->req[0].hw_cq = (soc_hw_cq __iomem *)(s->xram + SOC_CQ_REQ_OFFSET);
  591. s->req[1].hw_cq = (soc_hw_cq __iomem *)(s->xram + SOC_CQ_REQ_OFFSET + sizeof(soc_hw_cq));
  592. s->rsp[0].hw_cq = (soc_hw_cq __iomem *)(s->xram + SOC_CQ_RSP_OFFSET);
  593. s->rsp[1].hw_cq = (soc_hw_cq __iomem *)(s->xram + SOC_CQ_RSP_OFFSET + sizeof(soc_hw_cq));
  594. cq[1].address = cq[0].address + (SOC_CQ_REQ0_SIZE * sizeof(soc_req));
  595. cq[4].address = 1;
  596. cq[5].address = 1;
  597. cq[0].last = SOC_CQ_REQ0_SIZE - 1;
  598. cq[1].last = SOC_CQ_REQ1_SIZE - 1;
  599. cq[4].last = SOC_CQ_RSP0_SIZE - 1;
  600. cq[5].last = SOC_CQ_RSP1_SIZE - 1;
  601. for (i = 0; i < 8; i++)
  602. cq[i].seqno = 1;
  603. s->req[0].last = SOC_CQ_REQ0_SIZE - 1;
  604. s->req[1].last = SOC_CQ_REQ1_SIZE - 1;
  605. s->rsp[0].last = SOC_CQ_RSP0_SIZE - 1;
  606. s->rsp[1].last = SOC_CQ_RSP1_SIZE - 1;
  607. s->req[0].seqno = 1;
  608. s->req[1].seqno = 1;
  609. s->rsp[0].seqno = 1;
  610. s->rsp[1].seqno = 1;
  611. xram_copy_to (s->xram + SOC_CQ_REQ_OFFSET, cq, sizeof(cq));
  612. /* Make our sw copy of SOC service parameters */
  613. xram_copy_from (s->serv_params, s->xram + 0x140, sizeof (s->serv_params));
  614. s->port[0].fc.common_svc = (common_svc_parm *)s->serv_params;
  615. s->port[0].fc.class_svcs = (svc_parm *)(s->serv_params + 0x20);
  616. s->port[1].fc.common_svc = (common_svc_parm *)&s->serv_params;
  617. s->port[1].fc.class_svcs = (svc_parm *)(s->serv_params + 0x20);
  618. soc_enable (s);
  619. SOD(("Enabled SOC\n"))
  620. }
  621. static int __init soc_probe(void)
  622. {
  623. struct sbus_bus *sbus;
  624. struct sbus_dev *sdev = NULL;
  625. struct soc *s;
  626. int cards = 0;
  627. for_each_sbus(sbus) {
  628. for_each_sbusdev(sdev, sbus) {
  629. if(!strcmp(sdev->prom_name, "SUNW,soc")) {
  630. soc_init(sdev, cards);
  631. cards++;
  632. }
  633. }
  634. }
  635. if (!cards) return -EIO;
  636. for_each_soc(s)
  637. if (s->next)
  638. s->port[1].fc.next = &s->next->port[0].fc;
  639. fcp_init (&socs->port[0].fc);
  640. return 0;
  641. }
  642. static void __exit soc_cleanup(void)
  643. {
  644. struct soc *s;
  645. int irq;
  646. struct sbus_dev *sdev;
  647. for_each_soc(s) {
  648. irq = s->port[0].fc.irq;
  649. free_irq (irq, s);
  650. fcp_release(&(s->port[0].fc), 2);
  651. sdev = s->port[0].fc.dev;
  652. if (sdev->num_registers == 1) {
  653. sbus_iounmap(s->xram, 0x10000UL);
  654. sbus_iounmap(s->regs, 0x10UL);
  655. } else {
  656. sbus_iounmap(s->xram, sdev->reg_addrs[1].reg_size);
  657. sbus_iounmap(s->regs, sdev->reg_addrs[2].reg_size);
  658. }
  659. sbus_free_consistent(sdev,
  660. (SOC_CQ_REQ0_SIZE+SOC_CQ_REQ1_SIZE)*sizeof(soc_req),
  661. s->req_cpu, s->req_dvma);
  662. }
  663. }
  664. module_init(soc_probe);
  665. module_exit(soc_cleanup);
  666. MODULE_LICENSE("GPL");