edac_mc.c 51 KB

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  1. /*
  2. * edac_mc kernel module
  3. * (C) 2005 Linux Networx (http://lnxi.com)
  4. * This file may be distributed under the terms of the
  5. * GNU General Public License.
  6. *
  7. * Written by Thayne Harbaugh
  8. * Based on work by Dan Hollis <goemon at anime dot net> and others.
  9. * http://www.anime.net/~goemon/linux-ecc/
  10. *
  11. * Modified by Dave Peterson and Doug Thompson
  12. *
  13. */
  14. #include <linux/config.h>
  15. #include <linux/module.h>
  16. #include <linux/proc_fs.h>
  17. #include <linux/kernel.h>
  18. #include <linux/types.h>
  19. #include <linux/smp.h>
  20. #include <linux/init.h>
  21. #include <linux/sysctl.h>
  22. #include <linux/highmem.h>
  23. #include <linux/timer.h>
  24. #include <linux/slab.h>
  25. #include <linux/jiffies.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/list.h>
  28. #include <linux/sysdev.h>
  29. #include <linux/ctype.h>
  30. #include <linux/kthread.h>
  31. #include <asm/uaccess.h>
  32. #include <asm/page.h>
  33. #include <asm/edac.h>
  34. #include "edac_mc.h"
  35. #define EDAC_MC_VERSION "Ver: 2.0.0 " __DATE__
  36. /* For now, disable the EDAC sysfs code. The sysfs interface that EDAC
  37. * presents to user space needs more thought, and is likely to change
  38. * substantially.
  39. */
  40. #define DISABLE_EDAC_SYSFS
  41. #ifdef CONFIG_EDAC_DEBUG
  42. /* Values of 0 to 4 will generate output */
  43. int edac_debug_level = 1;
  44. EXPORT_SYMBOL_GPL(edac_debug_level);
  45. #endif
  46. /* EDAC Controls, setable by module parameter, and sysfs */
  47. static int log_ue = 1;
  48. static int log_ce = 1;
  49. static int panic_on_ue;
  50. static int poll_msec = 1000;
  51. static int check_pci_parity = 0; /* default YES check PCI parity */
  52. static int panic_on_pci_parity; /* default no panic on PCI Parity */
  53. static atomic_t pci_parity_count = ATOMIC_INIT(0);
  54. /* lock to memory controller's control array */
  55. static DECLARE_MUTEX(mem_ctls_mutex);
  56. static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices);
  57. static struct task_struct *edac_thread;
  58. /* Structure of the whitelist and blacklist arrays */
  59. struct edac_pci_device_list {
  60. unsigned int vendor; /* Vendor ID */
  61. unsigned int device; /* Deviice ID */
  62. };
  63. #define MAX_LISTED_PCI_DEVICES 32
  64. /* List of PCI devices (vendor-id:device-id) that should be skipped */
  65. static struct edac_pci_device_list pci_blacklist[MAX_LISTED_PCI_DEVICES];
  66. static int pci_blacklist_count;
  67. /* List of PCI devices (vendor-id:device-id) that should be scanned */
  68. static struct edac_pci_device_list pci_whitelist[MAX_LISTED_PCI_DEVICES];
  69. static int pci_whitelist_count ;
  70. /* START sysfs data and methods */
  71. #ifndef DISABLE_EDAC_SYSFS
  72. static const char *mem_types[] = {
  73. [MEM_EMPTY] = "Empty",
  74. [MEM_RESERVED] = "Reserved",
  75. [MEM_UNKNOWN] = "Unknown",
  76. [MEM_FPM] = "FPM",
  77. [MEM_EDO] = "EDO",
  78. [MEM_BEDO] = "BEDO",
  79. [MEM_SDR] = "Unbuffered-SDR",
  80. [MEM_RDR] = "Registered-SDR",
  81. [MEM_DDR] = "Unbuffered-DDR",
  82. [MEM_RDDR] = "Registered-DDR",
  83. [MEM_RMBS] = "RMBS"
  84. };
  85. static const char *dev_types[] = {
  86. [DEV_UNKNOWN] = "Unknown",
  87. [DEV_X1] = "x1",
  88. [DEV_X2] = "x2",
  89. [DEV_X4] = "x4",
  90. [DEV_X8] = "x8",
  91. [DEV_X16] = "x16",
  92. [DEV_X32] = "x32",
  93. [DEV_X64] = "x64"
  94. };
  95. static const char *edac_caps[] = {
  96. [EDAC_UNKNOWN] = "Unknown",
  97. [EDAC_NONE] = "None",
  98. [EDAC_RESERVED] = "Reserved",
  99. [EDAC_PARITY] = "PARITY",
  100. [EDAC_EC] = "EC",
  101. [EDAC_SECDED] = "SECDED",
  102. [EDAC_S2ECD2ED] = "S2ECD2ED",
  103. [EDAC_S4ECD4ED] = "S4ECD4ED",
  104. [EDAC_S8ECD8ED] = "S8ECD8ED",
  105. [EDAC_S16ECD16ED] = "S16ECD16ED"
  106. };
  107. /* sysfs object: /sys/devices/system/edac */
  108. static struct sysdev_class edac_class = {
  109. set_kset_name("edac"),
  110. };
  111. /* sysfs objects:
  112. * /sys/devices/system/edac/mc
  113. * /sys/devices/system/edac/pci
  114. */
  115. static struct kobject edac_memctrl_kobj;
  116. static struct kobject edac_pci_kobj;
  117. /* We use these to wait for the reference counts on edac_memctrl_kobj and
  118. * edac_pci_kobj to reach 0.
  119. */
  120. static struct completion edac_memctrl_kobj_complete;
  121. static struct completion edac_pci_kobj_complete;
  122. /*
  123. * /sys/devices/system/edac/mc;
  124. * data structures and methods
  125. */
  126. #if 0
  127. static ssize_t memctrl_string_show(void *ptr, char *buffer)
  128. {
  129. char *value = (char*) ptr;
  130. return sprintf(buffer, "%s\n", value);
  131. }
  132. #endif
  133. static ssize_t memctrl_int_show(void *ptr, char *buffer)
  134. {
  135. int *value = (int*) ptr;
  136. return sprintf(buffer, "%d\n", *value);
  137. }
  138. static ssize_t memctrl_int_store(void *ptr, const char *buffer, size_t count)
  139. {
  140. int *value = (int*) ptr;
  141. if (isdigit(*buffer))
  142. *value = simple_strtoul(buffer, NULL, 0);
  143. return count;
  144. }
  145. struct memctrl_dev_attribute {
  146. struct attribute attr;
  147. void *value;
  148. ssize_t (*show)(void *,char *);
  149. ssize_t (*store)(void *, const char *, size_t);
  150. };
  151. /* Set of show/store abstract level functions for memory control object */
  152. static ssize_t memctrl_dev_show(struct kobject *kobj,
  153. struct attribute *attr, char *buffer)
  154. {
  155. struct memctrl_dev_attribute *memctrl_dev;
  156. memctrl_dev = (struct memctrl_dev_attribute*)attr;
  157. if (memctrl_dev->show)
  158. return memctrl_dev->show(memctrl_dev->value, buffer);
  159. return -EIO;
  160. }
  161. static ssize_t memctrl_dev_store(struct kobject *kobj, struct attribute *attr,
  162. const char *buffer, size_t count)
  163. {
  164. struct memctrl_dev_attribute *memctrl_dev;
  165. memctrl_dev = (struct memctrl_dev_attribute*)attr;
  166. if (memctrl_dev->store)
  167. return memctrl_dev->store(memctrl_dev->value, buffer, count);
  168. return -EIO;
  169. }
  170. static struct sysfs_ops memctrlfs_ops = {
  171. .show = memctrl_dev_show,
  172. .store = memctrl_dev_store
  173. };
  174. #define MEMCTRL_ATTR(_name,_mode,_show,_store) \
  175. struct memctrl_dev_attribute attr_##_name = { \
  176. .attr = {.name = __stringify(_name), .mode = _mode }, \
  177. .value = &_name, \
  178. .show = _show, \
  179. .store = _store, \
  180. };
  181. #define MEMCTRL_STRING_ATTR(_name,_data,_mode,_show,_store) \
  182. struct memctrl_dev_attribute attr_##_name = { \
  183. .attr = {.name = __stringify(_name), .mode = _mode }, \
  184. .value = _data, \
  185. .show = _show, \
  186. .store = _store, \
  187. };
  188. /* cwrow<id> attribute f*/
  189. #if 0
  190. MEMCTRL_STRING_ATTR(mc_version,EDAC_MC_VERSION,S_IRUGO,memctrl_string_show,NULL);
  191. #endif
  192. /* csrow<id> control files */
  193. MEMCTRL_ATTR(panic_on_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
  194. MEMCTRL_ATTR(log_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
  195. MEMCTRL_ATTR(log_ce,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
  196. MEMCTRL_ATTR(poll_msec,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
  197. /* Base Attributes of the memory ECC object */
  198. static struct memctrl_dev_attribute *memctrl_attr[] = {
  199. &attr_panic_on_ue,
  200. &attr_log_ue,
  201. &attr_log_ce,
  202. &attr_poll_msec,
  203. NULL,
  204. };
  205. /* Main MC kobject release() function */
  206. static void edac_memctrl_master_release(struct kobject *kobj)
  207. {
  208. debugf1("%s()\n", __func__);
  209. complete(&edac_memctrl_kobj_complete);
  210. }
  211. static struct kobj_type ktype_memctrl = {
  212. .release = edac_memctrl_master_release,
  213. .sysfs_ops = &memctrlfs_ops,
  214. .default_attrs = (struct attribute **) memctrl_attr,
  215. };
  216. #endif /* DISABLE_EDAC_SYSFS */
  217. /* Initialize the main sysfs entries for edac:
  218. * /sys/devices/system/edac
  219. *
  220. * and children
  221. *
  222. * Return: 0 SUCCESS
  223. * !0 FAILURE
  224. */
  225. static int edac_sysfs_memctrl_setup(void)
  226. #ifdef DISABLE_EDAC_SYSFS
  227. {
  228. return 0;
  229. }
  230. #else
  231. {
  232. int err=0;
  233. debugf1("%s()\n", __func__);
  234. /* create the /sys/devices/system/edac directory */
  235. err = sysdev_class_register(&edac_class);
  236. if (!err) {
  237. /* Init the MC's kobject */
  238. memset(&edac_memctrl_kobj, 0, sizeof (edac_memctrl_kobj));
  239. edac_memctrl_kobj.parent = &edac_class.kset.kobj;
  240. edac_memctrl_kobj.ktype = &ktype_memctrl;
  241. /* generate sysfs "..../edac/mc" */
  242. err = kobject_set_name(&edac_memctrl_kobj,"mc");
  243. if (!err) {
  244. /* FIXME: maybe new sysdev_create_subdir() */
  245. err = kobject_register(&edac_memctrl_kobj);
  246. if (err)
  247. debugf1("Failed to register '.../edac/mc'\n");
  248. else
  249. debugf1("Registered '.../edac/mc' kobject\n");
  250. }
  251. } else
  252. debugf1("%s() error=%d\n", __func__, err);
  253. return err;
  254. }
  255. #endif /* DISABLE_EDAC_SYSFS */
  256. /*
  257. * MC teardown:
  258. * the '..../edac/mc' kobject followed by '..../edac' itself
  259. */
  260. static void edac_sysfs_memctrl_teardown(void)
  261. {
  262. #ifndef DISABLE_EDAC_SYSFS
  263. debugf0("MC: " __FILE__ ": %s()\n", __func__);
  264. /* Unregister the MC's kobject and wait for reference count to reach
  265. * 0.
  266. */
  267. init_completion(&edac_memctrl_kobj_complete);
  268. kobject_unregister(&edac_memctrl_kobj);
  269. wait_for_completion(&edac_memctrl_kobj_complete);
  270. /* Unregister the 'edac' object */
  271. sysdev_class_unregister(&edac_class);
  272. #endif /* DISABLE_EDAC_SYSFS */
  273. }
  274. #ifndef DISABLE_EDAC_SYSFS
  275. /*
  276. * /sys/devices/system/edac/pci;
  277. * data structures and methods
  278. */
  279. struct list_control {
  280. struct edac_pci_device_list *list;
  281. int *count;
  282. };
  283. #if 0
  284. /* Output the list as: vendor_id:device:id<,vendor_id:device_id> */
  285. static ssize_t edac_pci_list_string_show(void *ptr, char *buffer)
  286. {
  287. struct list_control *listctl;
  288. struct edac_pci_device_list *list;
  289. char *p = buffer;
  290. int len=0;
  291. int i;
  292. listctl = ptr;
  293. list = listctl->list;
  294. for (i = 0; i < *(listctl->count); i++, list++ ) {
  295. if (len > 0)
  296. len += snprintf(p + len, (PAGE_SIZE-len), ",");
  297. len += snprintf(p + len,
  298. (PAGE_SIZE-len),
  299. "%x:%x",
  300. list->vendor,list->device);
  301. }
  302. len += snprintf(p + len,(PAGE_SIZE-len), "\n");
  303. return (ssize_t) len;
  304. }
  305. /**
  306. *
  307. * Scan string from **s to **e looking for one 'vendor:device' tuple
  308. * where each field is a hex value
  309. *
  310. * return 0 if an entry is NOT found
  311. * return 1 if an entry is found
  312. * fill in *vendor_id and *device_id with values found
  313. *
  314. * In both cases, make sure *s has been moved forward toward *e
  315. */
  316. static int parse_one_device(const char **s,const char **e,
  317. unsigned int *vendor_id, unsigned int *device_id)
  318. {
  319. const char *runner, *p;
  320. /* if null byte, we are done */
  321. if (!**s) {
  322. (*s)++; /* keep *s moving */
  323. return 0;
  324. }
  325. /* skip over newlines & whitespace */
  326. if ((**s == '\n') || isspace(**s)) {
  327. (*s)++;
  328. return 0;
  329. }
  330. if (!isxdigit(**s)) {
  331. (*s)++;
  332. return 0;
  333. }
  334. /* parse vendor_id */
  335. runner = *s;
  336. while (runner < *e) {
  337. /* scan for vendor:device delimiter */
  338. if (*runner == ':') {
  339. *vendor_id = simple_strtol((char*) *s, (char**) &p, 16);
  340. runner = p + 1;
  341. break;
  342. }
  343. runner++;
  344. }
  345. if (!isxdigit(*runner)) {
  346. *s = ++runner;
  347. return 0;
  348. }
  349. /* parse device_id */
  350. if (runner < *e) {
  351. *device_id = simple_strtol((char*)runner, (char**)&p, 16);
  352. runner = p;
  353. }
  354. *s = runner;
  355. return 1;
  356. }
  357. static ssize_t edac_pci_list_string_store(void *ptr, const char *buffer,
  358. size_t count)
  359. {
  360. struct list_control *listctl;
  361. struct edac_pci_device_list *list;
  362. unsigned int vendor_id, device_id;
  363. const char *s, *e;
  364. int *index;
  365. s = (char*)buffer;
  366. e = s + count;
  367. listctl = ptr;
  368. list = listctl->list;
  369. index = listctl->count;
  370. *index = 0;
  371. while (*index < MAX_LISTED_PCI_DEVICES) {
  372. if (parse_one_device(&s,&e,&vendor_id,&device_id)) {
  373. list[ *index ].vendor = vendor_id;
  374. list[ *index ].device = device_id;
  375. (*index)++;
  376. }
  377. /* check for all data consume */
  378. if (s >= e)
  379. break;
  380. }
  381. return count;
  382. }
  383. #endif
  384. static ssize_t edac_pci_int_show(void *ptr, char *buffer)
  385. {
  386. int *value = ptr;
  387. return sprintf(buffer,"%d\n",*value);
  388. }
  389. static ssize_t edac_pci_int_store(void *ptr, const char *buffer, size_t count)
  390. {
  391. int *value = ptr;
  392. if (isdigit(*buffer))
  393. *value = simple_strtoul(buffer,NULL,0);
  394. return count;
  395. }
  396. struct edac_pci_dev_attribute {
  397. struct attribute attr;
  398. void *value;
  399. ssize_t (*show)(void *,char *);
  400. ssize_t (*store)(void *, const char *,size_t);
  401. };
  402. /* Set of show/store abstract level functions for PCI Parity object */
  403. static ssize_t edac_pci_dev_show(struct kobject *kobj, struct attribute *attr,
  404. char *buffer)
  405. {
  406. struct edac_pci_dev_attribute *edac_pci_dev;
  407. edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
  408. if (edac_pci_dev->show)
  409. return edac_pci_dev->show(edac_pci_dev->value, buffer);
  410. return -EIO;
  411. }
  412. static ssize_t edac_pci_dev_store(struct kobject *kobj,
  413. struct attribute *attr, const char *buffer, size_t count)
  414. {
  415. struct edac_pci_dev_attribute *edac_pci_dev;
  416. edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
  417. if (edac_pci_dev->show)
  418. return edac_pci_dev->store(edac_pci_dev->value, buffer, count);
  419. return -EIO;
  420. }
  421. static struct sysfs_ops edac_pci_sysfs_ops = {
  422. .show = edac_pci_dev_show,
  423. .store = edac_pci_dev_store
  424. };
  425. #define EDAC_PCI_ATTR(_name,_mode,_show,_store) \
  426. struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
  427. .attr = {.name = __stringify(_name), .mode = _mode }, \
  428. .value = &_name, \
  429. .show = _show, \
  430. .store = _store, \
  431. };
  432. #define EDAC_PCI_STRING_ATTR(_name,_data,_mode,_show,_store) \
  433. struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
  434. .attr = {.name = __stringify(_name), .mode = _mode }, \
  435. .value = _data, \
  436. .show = _show, \
  437. .store = _store, \
  438. };
  439. #if 0
  440. static struct list_control pci_whitelist_control = {
  441. .list = pci_whitelist,
  442. .count = &pci_whitelist_count
  443. };
  444. static struct list_control pci_blacklist_control = {
  445. .list = pci_blacklist,
  446. .count = &pci_blacklist_count
  447. };
  448. /* whitelist attribute */
  449. EDAC_PCI_STRING_ATTR(pci_parity_whitelist,
  450. &pci_whitelist_control,
  451. S_IRUGO|S_IWUSR,
  452. edac_pci_list_string_show,
  453. edac_pci_list_string_store);
  454. EDAC_PCI_STRING_ATTR(pci_parity_blacklist,
  455. &pci_blacklist_control,
  456. S_IRUGO|S_IWUSR,
  457. edac_pci_list_string_show,
  458. edac_pci_list_string_store);
  459. #endif
  460. /* PCI Parity control files */
  461. EDAC_PCI_ATTR(check_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show,
  462. edac_pci_int_store);
  463. EDAC_PCI_ATTR(panic_on_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show,
  464. edac_pci_int_store);
  465. EDAC_PCI_ATTR(pci_parity_count, S_IRUGO, edac_pci_int_show, NULL);
  466. /* Base Attributes of the memory ECC object */
  467. static struct edac_pci_dev_attribute *edac_pci_attr[] = {
  468. &edac_pci_attr_check_pci_parity,
  469. &edac_pci_attr_panic_on_pci_parity,
  470. &edac_pci_attr_pci_parity_count,
  471. NULL,
  472. };
  473. /* No memory to release */
  474. static void edac_pci_release(struct kobject *kobj)
  475. {
  476. debugf1("%s()\n", __func__);
  477. complete(&edac_pci_kobj_complete);
  478. }
  479. static struct kobj_type ktype_edac_pci = {
  480. .release = edac_pci_release,
  481. .sysfs_ops = &edac_pci_sysfs_ops,
  482. .default_attrs = (struct attribute **) edac_pci_attr,
  483. };
  484. #endif /* DISABLE_EDAC_SYSFS */
  485. /**
  486. * edac_sysfs_pci_setup()
  487. *
  488. */
  489. static int edac_sysfs_pci_setup(void)
  490. #ifdef DISABLE_EDAC_SYSFS
  491. {
  492. return 0;
  493. }
  494. #else
  495. {
  496. int err;
  497. debugf1("%s()\n", __func__);
  498. memset(&edac_pci_kobj, 0, sizeof(edac_pci_kobj));
  499. edac_pci_kobj.parent = &edac_class.kset.kobj;
  500. edac_pci_kobj.ktype = &ktype_edac_pci;
  501. err = kobject_set_name(&edac_pci_kobj, "pci");
  502. if (!err) {
  503. /* Instanstiate the csrow object */
  504. /* FIXME: maybe new sysdev_create_subdir() */
  505. err = kobject_register(&edac_pci_kobj);
  506. if (err)
  507. debugf1("Failed to register '.../edac/pci'\n");
  508. else
  509. debugf1("Registered '.../edac/pci' kobject\n");
  510. }
  511. return err;
  512. }
  513. #endif /* DISABLE_EDAC_SYSFS */
  514. static void edac_sysfs_pci_teardown(void)
  515. {
  516. #ifndef DISABLE_EDAC_SYSFS
  517. debugf0("%s()\n", __func__);
  518. init_completion(&edac_pci_kobj_complete);
  519. kobject_unregister(&edac_pci_kobj);
  520. wait_for_completion(&edac_pci_kobj_complete);
  521. #endif
  522. }
  523. #ifndef DISABLE_EDAC_SYSFS
  524. /* EDAC sysfs CSROW data structures and methods */
  525. /* Set of more detailed csrow<id> attribute show/store functions */
  526. static ssize_t csrow_ch0_dimm_label_show(struct csrow_info *csrow, char *data)
  527. {
  528. ssize_t size = 0;
  529. if (csrow->nr_channels > 0) {
  530. size = snprintf(data, EDAC_MC_LABEL_LEN,"%s\n",
  531. csrow->channels[0].label);
  532. }
  533. return size;
  534. }
  535. static ssize_t csrow_ch1_dimm_label_show(struct csrow_info *csrow, char *data)
  536. {
  537. ssize_t size = 0;
  538. if (csrow->nr_channels > 0) {
  539. size = snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",
  540. csrow->channels[1].label);
  541. }
  542. return size;
  543. }
  544. static ssize_t csrow_ch0_dimm_label_store(struct csrow_info *csrow,
  545. const char *data, size_t size)
  546. {
  547. ssize_t max_size = 0;
  548. if (csrow->nr_channels > 0) {
  549. max_size = min((ssize_t)size,(ssize_t)EDAC_MC_LABEL_LEN-1);
  550. strncpy(csrow->channels[0].label, data, max_size);
  551. csrow->channels[0].label[max_size] = '\0';
  552. }
  553. return size;
  554. }
  555. static ssize_t csrow_ch1_dimm_label_store(struct csrow_info *csrow,
  556. const char *data, size_t size)
  557. {
  558. ssize_t max_size = 0;
  559. if (csrow->nr_channels > 1) {
  560. max_size = min((ssize_t)size,(ssize_t)EDAC_MC_LABEL_LEN-1);
  561. strncpy(csrow->channels[1].label, data, max_size);
  562. csrow->channels[1].label[max_size] = '\0';
  563. }
  564. return max_size;
  565. }
  566. static ssize_t csrow_ue_count_show(struct csrow_info *csrow, char *data)
  567. {
  568. return sprintf(data,"%u\n", csrow->ue_count);
  569. }
  570. static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data)
  571. {
  572. return sprintf(data,"%u\n", csrow->ce_count);
  573. }
  574. static ssize_t csrow_ch0_ce_count_show(struct csrow_info *csrow, char *data)
  575. {
  576. ssize_t size = 0;
  577. if (csrow->nr_channels > 0) {
  578. size = sprintf(data,"%u\n", csrow->channels[0].ce_count);
  579. }
  580. return size;
  581. }
  582. static ssize_t csrow_ch1_ce_count_show(struct csrow_info *csrow, char *data)
  583. {
  584. ssize_t size = 0;
  585. if (csrow->nr_channels > 1) {
  586. size = sprintf(data,"%u\n", csrow->channels[1].ce_count);
  587. }
  588. return size;
  589. }
  590. static ssize_t csrow_size_show(struct csrow_info *csrow, char *data)
  591. {
  592. return sprintf(data,"%u\n", PAGES_TO_MiB(csrow->nr_pages));
  593. }
  594. static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data)
  595. {
  596. return sprintf(data,"%s\n", mem_types[csrow->mtype]);
  597. }
  598. static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data)
  599. {
  600. return sprintf(data,"%s\n", dev_types[csrow->dtype]);
  601. }
  602. static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data)
  603. {
  604. return sprintf(data,"%s\n", edac_caps[csrow->edac_mode]);
  605. }
  606. struct csrowdev_attribute {
  607. struct attribute attr;
  608. ssize_t (*show)(struct csrow_info *,char *);
  609. ssize_t (*store)(struct csrow_info *, const char *,size_t);
  610. };
  611. #define to_csrow(k) container_of(k, struct csrow_info, kobj)
  612. #define to_csrowdev_attr(a) container_of(a, struct csrowdev_attribute, attr)
  613. /* Set of show/store higher level functions for csrow objects */
  614. static ssize_t csrowdev_show(struct kobject *kobj, struct attribute *attr,
  615. char *buffer)
  616. {
  617. struct csrow_info *csrow = to_csrow(kobj);
  618. struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr);
  619. if (csrowdev_attr->show)
  620. return csrowdev_attr->show(csrow, buffer);
  621. return -EIO;
  622. }
  623. static ssize_t csrowdev_store(struct kobject *kobj, struct attribute *attr,
  624. const char *buffer, size_t count)
  625. {
  626. struct csrow_info *csrow = to_csrow(kobj);
  627. struct csrowdev_attribute * csrowdev_attr = to_csrowdev_attr(attr);
  628. if (csrowdev_attr->store)
  629. return csrowdev_attr->store(csrow, buffer, count);
  630. return -EIO;
  631. }
  632. static struct sysfs_ops csrowfs_ops = {
  633. .show = csrowdev_show,
  634. .store = csrowdev_store
  635. };
  636. #define CSROWDEV_ATTR(_name,_mode,_show,_store) \
  637. struct csrowdev_attribute attr_##_name = { \
  638. .attr = {.name = __stringify(_name), .mode = _mode }, \
  639. .show = _show, \
  640. .store = _store, \
  641. };
  642. /* cwrow<id>/attribute files */
  643. CSROWDEV_ATTR(size_mb,S_IRUGO,csrow_size_show,NULL);
  644. CSROWDEV_ATTR(dev_type,S_IRUGO,csrow_dev_type_show,NULL);
  645. CSROWDEV_ATTR(mem_type,S_IRUGO,csrow_mem_type_show,NULL);
  646. CSROWDEV_ATTR(edac_mode,S_IRUGO,csrow_edac_mode_show,NULL);
  647. CSROWDEV_ATTR(ue_count,S_IRUGO,csrow_ue_count_show,NULL);
  648. CSROWDEV_ATTR(ce_count,S_IRUGO,csrow_ce_count_show,NULL);
  649. CSROWDEV_ATTR(ch0_ce_count,S_IRUGO,csrow_ch0_ce_count_show,NULL);
  650. CSROWDEV_ATTR(ch1_ce_count,S_IRUGO,csrow_ch1_ce_count_show,NULL);
  651. /* control/attribute files */
  652. CSROWDEV_ATTR(ch0_dimm_label,S_IRUGO|S_IWUSR,
  653. csrow_ch0_dimm_label_show,
  654. csrow_ch0_dimm_label_store);
  655. CSROWDEV_ATTR(ch1_dimm_label,S_IRUGO|S_IWUSR,
  656. csrow_ch1_dimm_label_show,
  657. csrow_ch1_dimm_label_store);
  658. /* Attributes of the CSROW<id> object */
  659. static struct csrowdev_attribute *csrow_attr[] = {
  660. &attr_dev_type,
  661. &attr_mem_type,
  662. &attr_edac_mode,
  663. &attr_size_mb,
  664. &attr_ue_count,
  665. &attr_ce_count,
  666. &attr_ch0_ce_count,
  667. &attr_ch1_ce_count,
  668. &attr_ch0_dimm_label,
  669. &attr_ch1_dimm_label,
  670. NULL,
  671. };
  672. /* No memory to release */
  673. static void edac_csrow_instance_release(struct kobject *kobj)
  674. {
  675. struct csrow_info *cs;
  676. debugf1("%s()\n", __func__);
  677. cs = container_of(kobj, struct csrow_info, kobj);
  678. complete(&cs->kobj_complete);
  679. }
  680. static struct kobj_type ktype_csrow = {
  681. .release = edac_csrow_instance_release,
  682. .sysfs_ops = &csrowfs_ops,
  683. .default_attrs = (struct attribute **) csrow_attr,
  684. };
  685. /* Create a CSROW object under specifed edac_mc_device */
  686. static int edac_create_csrow_object(struct kobject *edac_mci_kobj,
  687. struct csrow_info *csrow, int index)
  688. {
  689. int err = 0;
  690. debugf0("%s()\n", __func__);
  691. memset(&csrow->kobj, 0, sizeof(csrow->kobj));
  692. /* generate ..../edac/mc/mc<id>/csrow<index> */
  693. csrow->kobj.parent = edac_mci_kobj;
  694. csrow->kobj.ktype = &ktype_csrow;
  695. /* name this instance of csrow<id> */
  696. err = kobject_set_name(&csrow->kobj,"csrow%d",index);
  697. if (!err) {
  698. /* Instanstiate the csrow object */
  699. err = kobject_register(&csrow->kobj);
  700. if (err)
  701. debugf0("Failed to register CSROW%d\n",index);
  702. else
  703. debugf0("Registered CSROW%d\n",index);
  704. }
  705. return err;
  706. }
  707. /* sysfs data structures and methods for the MCI kobjects */
  708. static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci,
  709. const char *data, size_t count)
  710. {
  711. int row, chan;
  712. mci->ue_noinfo_count = 0;
  713. mci->ce_noinfo_count = 0;
  714. mci->ue_count = 0;
  715. mci->ce_count = 0;
  716. for (row = 0; row < mci->nr_csrows; row++) {
  717. struct csrow_info *ri = &mci->csrows[row];
  718. ri->ue_count = 0;
  719. ri->ce_count = 0;
  720. for (chan = 0; chan < ri->nr_channels; chan++)
  721. ri->channels[chan].ce_count = 0;
  722. }
  723. mci->start_time = jiffies;
  724. return count;
  725. }
  726. static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data)
  727. {
  728. return sprintf(data,"%d\n", mci->ue_count);
  729. }
  730. static ssize_t mci_ce_count_show(struct mem_ctl_info *mci, char *data)
  731. {
  732. return sprintf(data,"%d\n", mci->ce_count);
  733. }
  734. static ssize_t mci_ce_noinfo_show(struct mem_ctl_info *mci, char *data)
  735. {
  736. return sprintf(data,"%d\n", mci->ce_noinfo_count);
  737. }
  738. static ssize_t mci_ue_noinfo_show(struct mem_ctl_info *mci, char *data)
  739. {
  740. return sprintf(data,"%d\n", mci->ue_noinfo_count);
  741. }
  742. static ssize_t mci_seconds_show(struct mem_ctl_info *mci, char *data)
  743. {
  744. return sprintf(data,"%ld\n", (jiffies - mci->start_time) / HZ);
  745. }
  746. static ssize_t mci_mod_name_show(struct mem_ctl_info *mci, char *data)
  747. {
  748. return sprintf(data,"%s %s\n", mci->mod_name, mci->mod_ver);
  749. }
  750. static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data)
  751. {
  752. return sprintf(data,"%s\n", mci->ctl_name);
  753. }
  754. static int mci_output_edac_cap(char *buf, unsigned long edac_cap)
  755. {
  756. char *p = buf;
  757. int bit_idx;
  758. for (bit_idx = 0; bit_idx < 8 * sizeof(edac_cap); bit_idx++) {
  759. if ((edac_cap >> bit_idx) & 0x1)
  760. p += sprintf(p, "%s ", edac_caps[bit_idx]);
  761. }
  762. return p - buf;
  763. }
  764. static ssize_t mci_edac_capability_show(struct mem_ctl_info *mci, char *data)
  765. {
  766. char *p = data;
  767. p += mci_output_edac_cap(p,mci->edac_ctl_cap);
  768. p += sprintf(p, "\n");
  769. return p - data;
  770. }
  771. static ssize_t mci_edac_current_capability_show(struct mem_ctl_info *mci,
  772. char *data)
  773. {
  774. char *p = data;
  775. p += mci_output_edac_cap(p,mci->edac_cap);
  776. p += sprintf(p, "\n");
  777. return p - data;
  778. }
  779. static int mci_output_mtype_cap(char *buf, unsigned long mtype_cap)
  780. {
  781. char *p = buf;
  782. int bit_idx;
  783. for (bit_idx = 0; bit_idx < 8 * sizeof(mtype_cap); bit_idx++) {
  784. if ((mtype_cap >> bit_idx) & 0x1)
  785. p += sprintf(p, "%s ", mem_types[bit_idx]);
  786. }
  787. return p - buf;
  788. }
  789. static ssize_t mci_supported_mem_type_show(struct mem_ctl_info *mci,
  790. char *data)
  791. {
  792. char *p = data;
  793. p += mci_output_mtype_cap(p,mci->mtype_cap);
  794. p += sprintf(p, "\n");
  795. return p - data;
  796. }
  797. static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data)
  798. {
  799. int total_pages, csrow_idx;
  800. for (total_pages = csrow_idx = 0; csrow_idx < mci->nr_csrows;
  801. csrow_idx++) {
  802. struct csrow_info *csrow = &mci->csrows[csrow_idx];
  803. if (!csrow->nr_pages)
  804. continue;
  805. total_pages += csrow->nr_pages;
  806. }
  807. return sprintf(data,"%u\n", PAGES_TO_MiB(total_pages));
  808. }
  809. struct mcidev_attribute {
  810. struct attribute attr;
  811. ssize_t (*show)(struct mem_ctl_info *,char *);
  812. ssize_t (*store)(struct mem_ctl_info *, const char *,size_t);
  813. };
  814. #define to_mci(k) container_of(k, struct mem_ctl_info, edac_mci_kobj)
  815. #define to_mcidev_attr(a) container_of(a, struct mcidev_attribute, attr)
  816. static ssize_t mcidev_show(struct kobject *kobj, struct attribute *attr,
  817. char *buffer)
  818. {
  819. struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
  820. struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
  821. if (mcidev_attr->show)
  822. return mcidev_attr->show(mem_ctl_info, buffer);
  823. return -EIO;
  824. }
  825. static ssize_t mcidev_store(struct kobject *kobj, struct attribute *attr,
  826. const char *buffer, size_t count)
  827. {
  828. struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
  829. struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
  830. if (mcidev_attr->store)
  831. return mcidev_attr->store(mem_ctl_info, buffer, count);
  832. return -EIO;
  833. }
  834. static struct sysfs_ops mci_ops = {
  835. .show = mcidev_show,
  836. .store = mcidev_store
  837. };
  838. #define MCIDEV_ATTR(_name,_mode,_show,_store) \
  839. struct mcidev_attribute mci_attr_##_name = { \
  840. .attr = {.name = __stringify(_name), .mode = _mode }, \
  841. .show = _show, \
  842. .store = _store, \
  843. };
  844. /* Control file */
  845. MCIDEV_ATTR(reset_counters,S_IWUSR,NULL,mci_reset_counters_store);
  846. /* Attribute files */
  847. MCIDEV_ATTR(mc_name,S_IRUGO,mci_ctl_name_show,NULL);
  848. MCIDEV_ATTR(module_name,S_IRUGO,mci_mod_name_show,NULL);
  849. MCIDEV_ATTR(edac_capability,S_IRUGO,mci_edac_capability_show,NULL);
  850. MCIDEV_ATTR(size_mb,S_IRUGO,mci_size_mb_show,NULL);
  851. MCIDEV_ATTR(seconds_since_reset,S_IRUGO,mci_seconds_show,NULL);
  852. MCIDEV_ATTR(ue_noinfo_count,S_IRUGO,mci_ue_noinfo_show,NULL);
  853. MCIDEV_ATTR(ce_noinfo_count,S_IRUGO,mci_ce_noinfo_show,NULL);
  854. MCIDEV_ATTR(ue_count,S_IRUGO,mci_ue_count_show,NULL);
  855. MCIDEV_ATTR(ce_count,S_IRUGO,mci_ce_count_show,NULL);
  856. MCIDEV_ATTR(edac_current_capability,S_IRUGO,
  857. mci_edac_current_capability_show,NULL);
  858. MCIDEV_ATTR(supported_mem_type,S_IRUGO,
  859. mci_supported_mem_type_show,NULL);
  860. static struct mcidev_attribute *mci_attr[] = {
  861. &mci_attr_reset_counters,
  862. &mci_attr_module_name,
  863. &mci_attr_mc_name,
  864. &mci_attr_edac_capability,
  865. &mci_attr_edac_current_capability,
  866. &mci_attr_supported_mem_type,
  867. &mci_attr_size_mb,
  868. &mci_attr_seconds_since_reset,
  869. &mci_attr_ue_noinfo_count,
  870. &mci_attr_ce_noinfo_count,
  871. &mci_attr_ue_count,
  872. &mci_attr_ce_count,
  873. NULL
  874. };
  875. /*
  876. * Release of a MC controlling instance
  877. */
  878. static void edac_mci_instance_release(struct kobject *kobj)
  879. {
  880. struct mem_ctl_info *mci;
  881. mci = to_mci(kobj);
  882. debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
  883. complete(&mci->kobj_complete);
  884. }
  885. static struct kobj_type ktype_mci = {
  886. .release = edac_mci_instance_release,
  887. .sysfs_ops = &mci_ops,
  888. .default_attrs = (struct attribute **) mci_attr,
  889. };
  890. #endif /* DISABLE_EDAC_SYSFS */
  891. #define EDAC_DEVICE_SYMLINK "device"
  892. /*
  893. * Create a new Memory Controller kobject instance,
  894. * mc<id> under the 'mc' directory
  895. *
  896. * Return:
  897. * 0 Success
  898. * !0 Failure
  899. */
  900. static int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
  901. #ifdef DISABLE_EDAC_SYSFS
  902. {
  903. return 0;
  904. }
  905. #else
  906. {
  907. int i;
  908. int err;
  909. struct csrow_info *csrow;
  910. struct kobject *edac_mci_kobj=&mci->edac_mci_kobj;
  911. debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
  912. memset(edac_mci_kobj, 0, sizeof(*edac_mci_kobj));
  913. /* set the name of the mc<id> object */
  914. err = kobject_set_name(edac_mci_kobj,"mc%d",mci->mc_idx);
  915. if (err)
  916. return err;
  917. /* link to our parent the '..../edac/mc' object */
  918. edac_mci_kobj->parent = &edac_memctrl_kobj;
  919. edac_mci_kobj->ktype = &ktype_mci;
  920. /* register the mc<id> kobject */
  921. err = kobject_register(edac_mci_kobj);
  922. if (err)
  923. return err;
  924. /* create a symlink for the device */
  925. err = sysfs_create_link(edac_mci_kobj, &mci->pdev->dev.kobj,
  926. EDAC_DEVICE_SYMLINK);
  927. if (err)
  928. goto fail0;
  929. /* Make directories for each CSROW object
  930. * under the mc<id> kobject
  931. */
  932. for (i = 0; i < mci->nr_csrows; i++) {
  933. csrow = &mci->csrows[i];
  934. /* Only expose populated CSROWs */
  935. if (csrow->nr_pages > 0) {
  936. err = edac_create_csrow_object(edac_mci_kobj,csrow,i);
  937. if (err)
  938. goto fail1;
  939. }
  940. }
  941. return 0;
  942. /* CSROW error: backout what has already been registered, */
  943. fail1:
  944. for ( i--; i >= 0; i--) {
  945. if (csrow->nr_pages > 0) {
  946. init_completion(&csrow->kobj_complete);
  947. kobject_unregister(&mci->csrows[i].kobj);
  948. wait_for_completion(&csrow->kobj_complete);
  949. }
  950. }
  951. fail0:
  952. init_completion(&mci->kobj_complete);
  953. kobject_unregister(edac_mci_kobj);
  954. wait_for_completion(&mci->kobj_complete);
  955. return err;
  956. }
  957. #endif /* DISABLE_EDAC_SYSFS */
  958. /*
  959. * remove a Memory Controller instance
  960. */
  961. static void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
  962. {
  963. #ifndef DISABLE_EDAC_SYSFS
  964. int i;
  965. debugf0("%s()\n", __func__);
  966. /* remove all csrow kobjects */
  967. for (i = 0; i < mci->nr_csrows; i++) {
  968. if (mci->csrows[i].nr_pages > 0) {
  969. init_completion(&mci->csrows[i].kobj_complete);
  970. kobject_unregister(&mci->csrows[i].kobj);
  971. wait_for_completion(&mci->csrows[i].kobj_complete);
  972. }
  973. }
  974. sysfs_remove_link(&mci->edac_mci_kobj, EDAC_DEVICE_SYMLINK);
  975. init_completion(&mci->kobj_complete);
  976. kobject_unregister(&mci->edac_mci_kobj);
  977. wait_for_completion(&mci->kobj_complete);
  978. #endif /* DISABLE_EDAC_SYSFS */
  979. }
  980. /* END OF sysfs data and methods */
  981. #ifdef CONFIG_EDAC_DEBUG
  982. void edac_mc_dump_channel(struct channel_info *chan)
  983. {
  984. debugf4("\tchannel = %p\n", chan);
  985. debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx);
  986. debugf4("\tchannel->ce_count = %d\n", chan->ce_count);
  987. debugf4("\tchannel->label = '%s'\n", chan->label);
  988. debugf4("\tchannel->csrow = %p\n\n", chan->csrow);
  989. }
  990. EXPORT_SYMBOL_GPL(edac_mc_dump_channel);
  991. void edac_mc_dump_csrow(struct csrow_info *csrow)
  992. {
  993. debugf4("\tcsrow = %p\n", csrow);
  994. debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx);
  995. debugf4("\tcsrow->first_page = 0x%lx\n",
  996. csrow->first_page);
  997. debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page);
  998. debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask);
  999. debugf4("\tcsrow->nr_pages = 0x%x\n", csrow->nr_pages);
  1000. debugf4("\tcsrow->nr_channels = %d\n",
  1001. csrow->nr_channels);
  1002. debugf4("\tcsrow->channels = %p\n", csrow->channels);
  1003. debugf4("\tcsrow->mci = %p\n\n", csrow->mci);
  1004. }
  1005. EXPORT_SYMBOL_GPL(edac_mc_dump_csrow);
  1006. void edac_mc_dump_mci(struct mem_ctl_info *mci)
  1007. {
  1008. debugf3("\tmci = %p\n", mci);
  1009. debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap);
  1010. debugf3("\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
  1011. debugf3("\tmci->edac_cap = %lx\n", mci->edac_cap);
  1012. debugf4("\tmci->edac_check = %p\n", mci->edac_check);
  1013. debugf3("\tmci->nr_csrows = %d, csrows = %p\n",
  1014. mci->nr_csrows, mci->csrows);
  1015. debugf3("\tpdev = %p\n", mci->pdev);
  1016. debugf3("\tmod_name:ctl_name = %s:%s\n",
  1017. mci->mod_name, mci->ctl_name);
  1018. debugf3("\tpvt_info = %p\n\n", mci->pvt_info);
  1019. }
  1020. EXPORT_SYMBOL_GPL(edac_mc_dump_mci);
  1021. #endif /* CONFIG_EDAC_DEBUG */
  1022. /* 'ptr' points to a possibly unaligned item X such that sizeof(X) is 'size'.
  1023. * Adjust 'ptr' so that its alignment is at least as stringent as what the
  1024. * compiler would provide for X and return the aligned result.
  1025. *
  1026. * If 'size' is a constant, the compiler will optimize this whole function
  1027. * down to either a no-op or the addition of a constant to the value of 'ptr'.
  1028. */
  1029. static inline char * align_ptr(void *ptr, unsigned size)
  1030. {
  1031. unsigned align, r;
  1032. /* Here we assume that the alignment of a "long long" is the most
  1033. * stringent alignment that the compiler will ever provide by default.
  1034. * As far as I know, this is a reasonable assumption.
  1035. */
  1036. if (size > sizeof(long))
  1037. align = sizeof(long long);
  1038. else if (size > sizeof(int))
  1039. align = sizeof(long);
  1040. else if (size > sizeof(short))
  1041. align = sizeof(int);
  1042. else if (size > sizeof(char))
  1043. align = sizeof(short);
  1044. else
  1045. return (char *) ptr;
  1046. r = size % align;
  1047. if (r == 0)
  1048. return (char *) ptr;
  1049. return (char *) (((unsigned long) ptr) + align - r);
  1050. }
  1051. /**
  1052. * edac_mc_alloc: Allocate a struct mem_ctl_info structure
  1053. * @size_pvt: size of private storage needed
  1054. * @nr_csrows: Number of CWROWS needed for this MC
  1055. * @nr_chans: Number of channels for the MC
  1056. *
  1057. * Everything is kmalloc'ed as one big chunk - more efficient.
  1058. * Only can be used if all structures have the same lifetime - otherwise
  1059. * you have to allocate and initialize your own structures.
  1060. *
  1061. * Use edac_mc_free() to free mc structures allocated by this function.
  1062. *
  1063. * Returns:
  1064. * NULL allocation failed
  1065. * struct mem_ctl_info pointer
  1066. */
  1067. struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
  1068. unsigned nr_chans)
  1069. {
  1070. struct mem_ctl_info *mci;
  1071. struct csrow_info *csi, *csrow;
  1072. struct channel_info *chi, *chp, *chan;
  1073. void *pvt;
  1074. unsigned size;
  1075. int row, chn;
  1076. /* Figure out the offsets of the various items from the start of an mc
  1077. * structure. We want the alignment of each item to be at least as
  1078. * stringent as what the compiler would provide if we could simply
  1079. * hardcode everything into a single struct.
  1080. */
  1081. mci = (struct mem_ctl_info *) 0;
  1082. csi = (struct csrow_info *)align_ptr(&mci[1], sizeof(*csi));
  1083. chi = (struct channel_info *)
  1084. align_ptr(&csi[nr_csrows], sizeof(*chi));
  1085. pvt = align_ptr(&chi[nr_chans * nr_csrows], sz_pvt);
  1086. size = ((unsigned long) pvt) + sz_pvt;
  1087. if ((mci = kmalloc(size, GFP_KERNEL)) == NULL)
  1088. return NULL;
  1089. /* Adjust pointers so they point within the memory we just allocated
  1090. * rather than an imaginary chunk of memory located at address 0.
  1091. */
  1092. csi = (struct csrow_info *) (((char *) mci) + ((unsigned long) csi));
  1093. chi = (struct channel_info *) (((char *) mci) + ((unsigned long) chi));
  1094. pvt = sz_pvt ? (((char *) mci) + ((unsigned long) pvt)) : NULL;
  1095. memset(mci, 0, size); /* clear all fields */
  1096. mci->csrows = csi;
  1097. mci->pvt_info = pvt;
  1098. mci->nr_csrows = nr_csrows;
  1099. for (row = 0; row < nr_csrows; row++) {
  1100. csrow = &csi[row];
  1101. csrow->csrow_idx = row;
  1102. csrow->mci = mci;
  1103. csrow->nr_channels = nr_chans;
  1104. chp = &chi[row * nr_chans];
  1105. csrow->channels = chp;
  1106. for (chn = 0; chn < nr_chans; chn++) {
  1107. chan = &chp[chn];
  1108. chan->chan_idx = chn;
  1109. chan->csrow = csrow;
  1110. }
  1111. }
  1112. return mci;
  1113. }
  1114. EXPORT_SYMBOL_GPL(edac_mc_alloc);
  1115. /**
  1116. * edac_mc_free: Free a previously allocated 'mci' structure
  1117. * @mci: pointer to a struct mem_ctl_info structure
  1118. */
  1119. void edac_mc_free(struct mem_ctl_info *mci)
  1120. {
  1121. kfree(mci);
  1122. }
  1123. EXPORT_SYMBOL_GPL(edac_mc_free);
  1124. static struct mem_ctl_info *find_mci_by_pdev(struct pci_dev *pdev)
  1125. {
  1126. struct mem_ctl_info *mci;
  1127. struct list_head *item;
  1128. debugf3("%s()\n", __func__);
  1129. list_for_each(item, &mc_devices) {
  1130. mci = list_entry(item, struct mem_ctl_info, link);
  1131. if (mci->pdev == pdev)
  1132. return mci;
  1133. }
  1134. return NULL;
  1135. }
  1136. static int add_mc_to_global_list(struct mem_ctl_info *mci)
  1137. {
  1138. struct list_head *item, *insert_before;
  1139. struct mem_ctl_info *p;
  1140. int i;
  1141. if (list_empty(&mc_devices)) {
  1142. mci->mc_idx = 0;
  1143. insert_before = &mc_devices;
  1144. } else {
  1145. if (find_mci_by_pdev(mci->pdev)) {
  1146. edac_printk(KERN_WARNING, EDAC_MC,
  1147. "%s (%s) %s %s already assigned %d\n",
  1148. mci->pdev->dev.bus_id,
  1149. pci_name(mci->pdev), mci->mod_name,
  1150. mci->ctl_name, mci->mc_idx);
  1151. return 1;
  1152. }
  1153. insert_before = NULL;
  1154. i = 0;
  1155. list_for_each(item, &mc_devices) {
  1156. p = list_entry(item, struct mem_ctl_info, link);
  1157. if (p->mc_idx != i) {
  1158. insert_before = item;
  1159. break;
  1160. }
  1161. i++;
  1162. }
  1163. mci->mc_idx = i;
  1164. if (insert_before == NULL)
  1165. insert_before = &mc_devices;
  1166. }
  1167. list_add_tail_rcu(&mci->link, insert_before);
  1168. return 0;
  1169. }
  1170. static void complete_mc_list_del(struct rcu_head *head)
  1171. {
  1172. struct mem_ctl_info *mci;
  1173. mci = container_of(head, struct mem_ctl_info, rcu);
  1174. INIT_LIST_HEAD(&mci->link);
  1175. complete(&mci->complete);
  1176. }
  1177. static void del_mc_from_global_list(struct mem_ctl_info *mci)
  1178. {
  1179. list_del_rcu(&mci->link);
  1180. init_completion(&mci->complete);
  1181. call_rcu(&mci->rcu, complete_mc_list_del);
  1182. wait_for_completion(&mci->complete);
  1183. }
  1184. /**
  1185. * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
  1186. * create sysfs entries associated with mci structure
  1187. * @mci: pointer to the mci structure to be added to the list
  1188. *
  1189. * Return:
  1190. * 0 Success
  1191. * !0 Failure
  1192. */
  1193. /* FIXME - should a warning be printed if no error detection? correction? */
  1194. int edac_mc_add_mc(struct mem_ctl_info *mci)
  1195. {
  1196. debugf0("%s()\n", __func__);
  1197. #ifdef CONFIG_EDAC_DEBUG
  1198. if (edac_debug_level >= 3)
  1199. edac_mc_dump_mci(mci);
  1200. if (edac_debug_level >= 4) {
  1201. int i;
  1202. for (i = 0; i < mci->nr_csrows; i++) {
  1203. int j;
  1204. edac_mc_dump_csrow(&mci->csrows[i]);
  1205. for (j = 0; j < mci->csrows[i].nr_channels; j++)
  1206. edac_mc_dump_channel(
  1207. &mci->csrows[i].channels[j]);
  1208. }
  1209. }
  1210. #endif
  1211. down(&mem_ctls_mutex);
  1212. if (add_mc_to_global_list(mci))
  1213. goto fail0;
  1214. /* set load time so that error rate can be tracked */
  1215. mci->start_time = jiffies;
  1216. if (edac_create_sysfs_mci_device(mci)) {
  1217. edac_mc_printk(mci, KERN_WARNING,
  1218. "failed to create sysfs device\n");
  1219. goto fail1;
  1220. }
  1221. /* Report action taken */
  1222. edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: PCI %s\n",
  1223. mci->mod_name, mci->ctl_name, pci_name(mci->pdev));
  1224. up(&mem_ctls_mutex);
  1225. return 0;
  1226. fail1:
  1227. del_mc_from_global_list(mci);
  1228. fail0:
  1229. up(&mem_ctls_mutex);
  1230. return 1;
  1231. }
  1232. EXPORT_SYMBOL_GPL(edac_mc_add_mc);
  1233. /**
  1234. * edac_mc_del_mc: Remove sysfs entries for specified mci structure and
  1235. * remove mci structure from global list
  1236. * @pdev: Pointer to 'struct pci_dev' representing mci structure to remove.
  1237. *
  1238. * Return pointer to removed mci structure, or NULL if device not found.
  1239. */
  1240. struct mem_ctl_info * edac_mc_del_mc(struct pci_dev *pdev)
  1241. {
  1242. struct mem_ctl_info *mci;
  1243. debugf0("MC: %s()\n", __func__);
  1244. down(&mem_ctls_mutex);
  1245. if ((mci = find_mci_by_pdev(pdev)) == NULL) {
  1246. up(&mem_ctls_mutex);
  1247. return NULL;
  1248. }
  1249. edac_remove_sysfs_mci_device(mci);
  1250. del_mc_from_global_list(mci);
  1251. up(&mem_ctls_mutex);
  1252. edac_printk(KERN_INFO, EDAC_MC,
  1253. "Removed device %d for %s %s: PCI %s\n", mci->mc_idx,
  1254. mci->mod_name, mci->ctl_name, pci_name(mci->pdev));
  1255. return mci;
  1256. }
  1257. EXPORT_SYMBOL_GPL(edac_mc_del_mc);
  1258. void edac_mc_scrub_block(unsigned long page, unsigned long offset, u32 size)
  1259. {
  1260. struct page *pg;
  1261. void *virt_addr;
  1262. unsigned long flags = 0;
  1263. debugf3("%s()\n", __func__);
  1264. /* ECC error page was not in our memory. Ignore it. */
  1265. if(!pfn_valid(page))
  1266. return;
  1267. /* Find the actual page structure then map it and fix */
  1268. pg = pfn_to_page(page);
  1269. if (PageHighMem(pg))
  1270. local_irq_save(flags);
  1271. virt_addr = kmap_atomic(pg, KM_BOUNCE_READ);
  1272. /* Perform architecture specific atomic scrub operation */
  1273. atomic_scrub(virt_addr + offset, size);
  1274. /* Unmap and complete */
  1275. kunmap_atomic(virt_addr, KM_BOUNCE_READ);
  1276. if (PageHighMem(pg))
  1277. local_irq_restore(flags);
  1278. }
  1279. EXPORT_SYMBOL_GPL(edac_mc_scrub_block);
  1280. /* FIXME - should return -1 */
  1281. int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
  1282. {
  1283. struct csrow_info *csrows = mci->csrows;
  1284. int row, i;
  1285. debugf1("MC%d: %s(): 0x%lx\n", mci->mc_idx, __func__, page);
  1286. row = -1;
  1287. for (i = 0; i < mci->nr_csrows; i++) {
  1288. struct csrow_info *csrow = &csrows[i];
  1289. if (csrow->nr_pages == 0)
  1290. continue;
  1291. debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) "
  1292. "mask(0x%lx)\n", mci->mc_idx, __func__,
  1293. csrow->first_page, page, csrow->last_page,
  1294. csrow->page_mask);
  1295. if ((page >= csrow->first_page) &&
  1296. (page <= csrow->last_page) &&
  1297. ((page & csrow->page_mask) ==
  1298. (csrow->first_page & csrow->page_mask))) {
  1299. row = i;
  1300. break;
  1301. }
  1302. }
  1303. if (row == -1)
  1304. edac_mc_printk(mci, KERN_ERR,
  1305. "could not look up page error address %lx\n",
  1306. (unsigned long) page);
  1307. return row;
  1308. }
  1309. EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
  1310. /* FIXME - setable log (warning/emerg) levels */
  1311. /* FIXME - integrate with evlog: http://evlog.sourceforge.net/ */
  1312. void edac_mc_handle_ce(struct mem_ctl_info *mci,
  1313. unsigned long page_frame_number, unsigned long offset_in_page,
  1314. unsigned long syndrome, int row, int channel, const char *msg)
  1315. {
  1316. unsigned long remapped_page;
  1317. debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
  1318. /* FIXME - maybe make panic on INTERNAL ERROR an option */
  1319. if (row >= mci->nr_csrows || row < 0) {
  1320. /* something is wrong */
  1321. edac_mc_printk(mci, KERN_ERR,
  1322. "INTERNAL ERROR: row out of range "
  1323. "(%d >= %d)\n", row, mci->nr_csrows);
  1324. edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
  1325. return;
  1326. }
  1327. if (channel >= mci->csrows[row].nr_channels || channel < 0) {
  1328. /* something is wrong */
  1329. edac_mc_printk(mci, KERN_ERR,
  1330. "INTERNAL ERROR: channel out of range "
  1331. "(%d >= %d)\n", channel,
  1332. mci->csrows[row].nr_channels);
  1333. edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
  1334. return;
  1335. }
  1336. if (log_ce)
  1337. /* FIXME - put in DIMM location */
  1338. edac_mc_printk(mci, KERN_WARNING,
  1339. "CE page 0x%lx, offset 0x%lx, grain %d, syndrome "
  1340. "0x%lx, row %d, channel %d, label \"%s\": %s\n",
  1341. page_frame_number, offset_in_page,
  1342. mci->csrows[row].grain, syndrome, row, channel,
  1343. mci->csrows[row].channels[channel].label, msg);
  1344. mci->ce_count++;
  1345. mci->csrows[row].ce_count++;
  1346. mci->csrows[row].channels[channel].ce_count++;
  1347. if (mci->scrub_mode & SCRUB_SW_SRC) {
  1348. /*
  1349. * Some MC's can remap memory so that it is still available
  1350. * at a different address when PCI devices map into memory.
  1351. * MC's that can't do this lose the memory where PCI devices
  1352. * are mapped. This mapping is MC dependant and so we call
  1353. * back into the MC driver for it to map the MC page to
  1354. * a physical (CPU) page which can then be mapped to a virtual
  1355. * page - which can then be scrubbed.
  1356. */
  1357. remapped_page = mci->ctl_page_to_phys ?
  1358. mci->ctl_page_to_phys(mci, page_frame_number) :
  1359. page_frame_number;
  1360. edac_mc_scrub_block(remapped_page, offset_in_page,
  1361. mci->csrows[row].grain);
  1362. }
  1363. }
  1364. EXPORT_SYMBOL_GPL(edac_mc_handle_ce);
  1365. void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, const char *msg)
  1366. {
  1367. if (log_ce)
  1368. edac_mc_printk(mci, KERN_WARNING,
  1369. "CE - no information available: %s\n", msg);
  1370. mci->ce_noinfo_count++;
  1371. mci->ce_count++;
  1372. }
  1373. EXPORT_SYMBOL_GPL(edac_mc_handle_ce_no_info);
  1374. void edac_mc_handle_ue(struct mem_ctl_info *mci,
  1375. unsigned long page_frame_number, unsigned long offset_in_page,
  1376. int row, const char *msg)
  1377. {
  1378. int len = EDAC_MC_LABEL_LEN * 4;
  1379. char labels[len + 1];
  1380. char *pos = labels;
  1381. int chan;
  1382. int chars;
  1383. debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
  1384. /* FIXME - maybe make panic on INTERNAL ERROR an option */
  1385. if (row >= mci->nr_csrows || row < 0) {
  1386. /* something is wrong */
  1387. edac_mc_printk(mci, KERN_ERR,
  1388. "INTERNAL ERROR: row out of range "
  1389. "(%d >= %d)\n", row, mci->nr_csrows);
  1390. edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR");
  1391. return;
  1392. }
  1393. chars = snprintf(pos, len + 1, "%s",
  1394. mci->csrows[row].channels[0].label);
  1395. len -= chars;
  1396. pos += chars;
  1397. for (chan = 1; (chan < mci->csrows[row].nr_channels) && (len > 0);
  1398. chan++) {
  1399. chars = snprintf(pos, len + 1, ":%s",
  1400. mci->csrows[row].channels[chan].label);
  1401. len -= chars;
  1402. pos += chars;
  1403. }
  1404. if (log_ue)
  1405. edac_mc_printk(mci, KERN_EMERG,
  1406. "UE page 0x%lx, offset 0x%lx, grain %d, row %d, "
  1407. "labels \"%s\": %s\n", page_frame_number,
  1408. offset_in_page, mci->csrows[row].grain, row, labels,
  1409. msg);
  1410. if (panic_on_ue)
  1411. panic("EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, "
  1412. "row %d, labels \"%s\": %s\n", mci->mc_idx,
  1413. page_frame_number, offset_in_page,
  1414. mci->csrows[row].grain, row, labels, msg);
  1415. mci->ue_count++;
  1416. mci->csrows[row].ue_count++;
  1417. }
  1418. EXPORT_SYMBOL_GPL(edac_mc_handle_ue);
  1419. void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, const char *msg)
  1420. {
  1421. if (panic_on_ue)
  1422. panic("EDAC MC%d: Uncorrected Error", mci->mc_idx);
  1423. if (log_ue)
  1424. edac_mc_printk(mci, KERN_WARNING,
  1425. "UE - no information available: %s\n", msg);
  1426. mci->ue_noinfo_count++;
  1427. mci->ue_count++;
  1428. }
  1429. EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info);
  1430. #ifdef CONFIG_PCI
  1431. static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
  1432. {
  1433. int where;
  1434. u16 status;
  1435. where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
  1436. pci_read_config_word(dev, where, &status);
  1437. /* If we get back 0xFFFF then we must suspect that the card has been
  1438. * pulled but the Linux PCI layer has not yet finished cleaning up.
  1439. * We don't want to report on such devices
  1440. */
  1441. if (status == 0xFFFF) {
  1442. u32 sanity;
  1443. pci_read_config_dword(dev, 0, &sanity);
  1444. if (sanity == 0xFFFFFFFF)
  1445. return 0;
  1446. }
  1447. status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
  1448. PCI_STATUS_PARITY;
  1449. if (status)
  1450. /* reset only the bits we are interested in */
  1451. pci_write_config_word(dev, where, status);
  1452. return status;
  1453. }
  1454. typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
  1455. /* Clear any PCI parity errors logged by this device. */
  1456. static void edac_pci_dev_parity_clear(struct pci_dev *dev)
  1457. {
  1458. u8 header_type;
  1459. get_pci_parity_status(dev, 0);
  1460. /* read the device TYPE, looking for bridges */
  1461. pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
  1462. if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
  1463. get_pci_parity_status(dev, 1);
  1464. }
  1465. /*
  1466. * PCI Parity polling
  1467. *
  1468. */
  1469. static void edac_pci_dev_parity_test(struct pci_dev *dev)
  1470. {
  1471. u16 status;
  1472. u8 header_type;
  1473. /* read the STATUS register on this device
  1474. */
  1475. status = get_pci_parity_status(dev, 0);
  1476. debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id );
  1477. /* check the status reg for errors */
  1478. if (status) {
  1479. if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
  1480. edac_printk(KERN_CRIT, EDAC_PCI,
  1481. "Signaled System Error on %s\n",
  1482. pci_name(dev));
  1483. if (status & (PCI_STATUS_PARITY)) {
  1484. edac_printk(KERN_CRIT, EDAC_PCI,
  1485. "Master Data Parity Error on %s\n",
  1486. pci_name(dev));
  1487. atomic_inc(&pci_parity_count);
  1488. }
  1489. if (status & (PCI_STATUS_DETECTED_PARITY)) {
  1490. edac_printk(KERN_CRIT, EDAC_PCI,
  1491. "Detected Parity Error on %s\n",
  1492. pci_name(dev));
  1493. atomic_inc(&pci_parity_count);
  1494. }
  1495. }
  1496. /* read the device TYPE, looking for bridges */
  1497. pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
  1498. debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id );
  1499. if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
  1500. /* On bridges, need to examine secondary status register */
  1501. status = get_pci_parity_status(dev, 1);
  1502. debugf2("PCI SEC_STATUS= 0x%04x %s\n",
  1503. status, dev->dev.bus_id );
  1504. /* check the secondary status reg for errors */
  1505. if (status) {
  1506. if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
  1507. edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
  1508. "Signaled System Error on %s\n",
  1509. pci_name(dev));
  1510. if (status & (PCI_STATUS_PARITY)) {
  1511. edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
  1512. "Master Data Parity Error on "
  1513. "%s\n", pci_name(dev));
  1514. atomic_inc(&pci_parity_count);
  1515. }
  1516. if (status & (PCI_STATUS_DETECTED_PARITY)) {
  1517. edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
  1518. "Detected Parity Error on %s\n",
  1519. pci_name(dev));
  1520. atomic_inc(&pci_parity_count);
  1521. }
  1522. }
  1523. }
  1524. }
  1525. /*
  1526. * check_dev_on_list: Scan for a PCI device on a white/black list
  1527. * @list: an EDAC &edac_pci_device_list white/black list pointer
  1528. * @free_index: index of next free entry on the list
  1529. * @pci_dev: PCI Device pointer
  1530. *
  1531. * see if list contains the device.
  1532. *
  1533. * Returns: 0 not found
  1534. * 1 found on list
  1535. */
  1536. static int check_dev_on_list(struct edac_pci_device_list *list,
  1537. int free_index, struct pci_dev *dev)
  1538. {
  1539. int i;
  1540. int rc = 0; /* Assume not found */
  1541. unsigned short vendor=dev->vendor;
  1542. unsigned short device=dev->device;
  1543. /* Scan the list, looking for a vendor/device match */
  1544. for (i = 0; i < free_index; i++, list++ ) {
  1545. if ((list->vendor == vendor ) && (list->device == device )) {
  1546. rc = 1;
  1547. break;
  1548. }
  1549. }
  1550. return rc;
  1551. }
  1552. /*
  1553. * pci_dev parity list iterator
  1554. * Scan the PCI device list for one iteration, looking for SERRORs
  1555. * Master Parity ERRORS or Parity ERRORs on primary or secondary devices
  1556. */
  1557. static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
  1558. {
  1559. struct pci_dev *dev = NULL;
  1560. /* request for kernel access to the next PCI device, if any,
  1561. * and while we are looking at it have its reference count
  1562. * bumped until we are done with it
  1563. */
  1564. while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
  1565. /* if whitelist exists then it has priority, so only scan
  1566. * those devices on the whitelist
  1567. */
  1568. if (pci_whitelist_count > 0 ) {
  1569. if (check_dev_on_list(pci_whitelist,
  1570. pci_whitelist_count, dev))
  1571. fn(dev);
  1572. } else {
  1573. /*
  1574. * if no whitelist, then check if this devices is
  1575. * blacklisted
  1576. */
  1577. if (!check_dev_on_list(pci_blacklist,
  1578. pci_blacklist_count, dev))
  1579. fn(dev);
  1580. }
  1581. }
  1582. }
  1583. static void do_pci_parity_check(void)
  1584. {
  1585. unsigned long flags;
  1586. int before_count;
  1587. debugf3("%s()\n", __func__);
  1588. if (!check_pci_parity)
  1589. return;
  1590. before_count = atomic_read(&pci_parity_count);
  1591. /* scan all PCI devices looking for a Parity Error on devices and
  1592. * bridges
  1593. */
  1594. local_irq_save(flags);
  1595. edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
  1596. local_irq_restore(flags);
  1597. /* Only if operator has selected panic on PCI Error */
  1598. if (panic_on_pci_parity) {
  1599. /* If the count is different 'after' from 'before' */
  1600. if (before_count != atomic_read(&pci_parity_count))
  1601. panic("EDAC: PCI Parity Error");
  1602. }
  1603. }
  1604. static inline void clear_pci_parity_errors(void)
  1605. {
  1606. /* Clear any PCI bus parity errors that devices initially have logged
  1607. * in their registers.
  1608. */
  1609. edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
  1610. }
  1611. #else /* CONFIG_PCI */
  1612. static inline void do_pci_parity_check(void)
  1613. {
  1614. /* no-op */
  1615. }
  1616. static inline void clear_pci_parity_errors(void)
  1617. {
  1618. /* no-op */
  1619. }
  1620. #endif /* CONFIG_PCI */
  1621. /*
  1622. * Iterate over all MC instances and check for ECC, et al, errors
  1623. */
  1624. static inline void check_mc_devices(void)
  1625. {
  1626. struct list_head *item;
  1627. struct mem_ctl_info *mci;
  1628. debugf3("%s()\n", __func__);
  1629. down(&mem_ctls_mutex);
  1630. list_for_each(item, &mc_devices) {
  1631. mci = list_entry(item, struct mem_ctl_info, link);
  1632. if (mci->edac_check != NULL)
  1633. mci->edac_check(mci);
  1634. }
  1635. up(&mem_ctls_mutex);
  1636. }
  1637. /*
  1638. * Check MC status every poll_msec.
  1639. * Check PCI status every poll_msec as well.
  1640. *
  1641. * This where the work gets done for edac.
  1642. *
  1643. * SMP safe, doesn't use NMI, and auto-rate-limits.
  1644. */
  1645. static void do_edac_check(void)
  1646. {
  1647. debugf3("%s()\n", __func__);
  1648. check_mc_devices();
  1649. do_pci_parity_check();
  1650. }
  1651. static int edac_kernel_thread(void *arg)
  1652. {
  1653. while (!kthread_should_stop()) {
  1654. do_edac_check();
  1655. /* goto sleep for the interval */
  1656. schedule_timeout_interruptible((HZ * poll_msec) / 1000);
  1657. try_to_freeze();
  1658. }
  1659. return 0;
  1660. }
  1661. /*
  1662. * edac_mc_init
  1663. * module initialization entry point
  1664. */
  1665. static int __init edac_mc_init(void)
  1666. {
  1667. edac_printk(KERN_INFO, EDAC_MC, EDAC_MC_VERSION "\n");
  1668. /*
  1669. * Harvest and clear any boot/initialization PCI parity errors
  1670. *
  1671. * FIXME: This only clears errors logged by devices present at time of
  1672. * module initialization. We should also do an initial clear
  1673. * of each newly hotplugged device.
  1674. */
  1675. clear_pci_parity_errors();
  1676. /* Create the MC sysfs entries */
  1677. if (edac_sysfs_memctrl_setup()) {
  1678. edac_printk(KERN_ERR, EDAC_MC,
  1679. "Error initializing sysfs code\n");
  1680. return -ENODEV;
  1681. }
  1682. /* Create the PCI parity sysfs entries */
  1683. if (edac_sysfs_pci_setup()) {
  1684. edac_sysfs_memctrl_teardown();
  1685. edac_printk(KERN_ERR, EDAC_MC,
  1686. "EDAC PCI: Error initializing sysfs code\n");
  1687. return -ENODEV;
  1688. }
  1689. /* create our kernel thread */
  1690. edac_thread = kthread_run(edac_kernel_thread, NULL, "kedac");
  1691. if (IS_ERR(edac_thread)) {
  1692. /* remove the sysfs entries */
  1693. edac_sysfs_memctrl_teardown();
  1694. edac_sysfs_pci_teardown();
  1695. return PTR_ERR(edac_thread);
  1696. }
  1697. return 0;
  1698. }
  1699. /*
  1700. * edac_mc_exit()
  1701. * module exit/termination functioni
  1702. */
  1703. static void __exit edac_mc_exit(void)
  1704. {
  1705. debugf0("%s()\n", __func__);
  1706. kthread_stop(edac_thread);
  1707. /* tear down the sysfs device */
  1708. edac_sysfs_memctrl_teardown();
  1709. edac_sysfs_pci_teardown();
  1710. }
  1711. module_init(edac_mc_init);
  1712. module_exit(edac_mc_exit);
  1713. MODULE_LICENSE("GPL");
  1714. MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n"
  1715. "Based on work by Dan Hollis et al");
  1716. MODULE_DESCRIPTION("Core library routines for MC reporting");
  1717. module_param(panic_on_ue, int, 0644);
  1718. MODULE_PARM_DESC(panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
  1719. module_param(check_pci_parity, int, 0644);
  1720. MODULE_PARM_DESC(check_pci_parity, "Check for PCI bus parity errors: 0=off 1=on");
  1721. module_param(panic_on_pci_parity, int, 0644);
  1722. MODULE_PARM_DESC(panic_on_pci_parity, "Panic on PCI Bus Parity error: 0=off 1=on");
  1723. module_param(log_ue, int, 0644);
  1724. MODULE_PARM_DESC(log_ue, "Log uncorrectable error to console: 0=off 1=on");
  1725. module_param(log_ce, int, 0644);
  1726. MODULE_PARM_DESC(log_ce, "Log correctable error to console: 0=off 1=on");
  1727. module_param(poll_msec, int, 0644);
  1728. MODULE_PARM_DESC(poll_msec, "Polling period in milliseconds");
  1729. #ifdef CONFIG_EDAC_DEBUG
  1730. module_param(edac_debug_level, int, 0644);
  1731. MODULE_PARM_DESC(edac_debug_level, "Debug level");
  1732. #endif