vme_scc.c 28 KB

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  1. /*
  2. * drivers/char/vme_scc.c: MVME147, MVME162, BVME6000 SCC serial ports
  3. * implementation.
  4. * Copyright 1999 Richard Hirst <richard@sleepie.demon.co.uk>
  5. *
  6. * Based on atari_SCC.c which was
  7. * Copyright 1994-95 Roman Hodek <Roman.Hodek@informatik.uni-erlangen.de>
  8. * Partially based on PC-Linux serial.c by Linus Torvalds and Theodore Ts'o
  9. *
  10. * This file is subject to the terms and conditions of the GNU General Public
  11. * License. See the file COPYING in the main directory of this archive
  12. * for more details.
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/config.h>
  17. #include <linux/kdev_t.h>
  18. #include <asm/io.h>
  19. #include <linux/kernel.h>
  20. #include <linux/sched.h>
  21. #include <linux/ioport.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/errno.h>
  24. #include <linux/tty.h>
  25. #include <linux/tty_flip.h>
  26. #include <linux/mm.h>
  27. #include <linux/serial.h>
  28. #include <linux/fcntl.h>
  29. #include <linux/major.h>
  30. #include <linux/delay.h>
  31. #include <linux/slab.h>
  32. #include <linux/miscdevice.h>
  33. #include <linux/console.h>
  34. #include <linux/init.h>
  35. #include <asm/setup.h>
  36. #include <asm/bootinfo.h>
  37. #ifdef CONFIG_MVME147_SCC
  38. #include <asm/mvme147hw.h>
  39. #endif
  40. #ifdef CONFIG_MVME162_SCC
  41. #include <asm/mvme16xhw.h>
  42. #endif
  43. #ifdef CONFIG_BVME6000_SCC
  44. #include <asm/bvme6000hw.h>
  45. #endif
  46. #include <linux/generic_serial.h>
  47. #include "scc.h"
  48. #define CHANNEL_A 0
  49. #define CHANNEL_B 1
  50. #define SCC_MINOR_BASE 64
  51. /* Shadows for all SCC write registers */
  52. static unsigned char scc_shadow[2][16];
  53. /* Location to access for SCC register access delay */
  54. static volatile unsigned char *scc_del = NULL;
  55. /* To keep track of STATUS_REG state for detection of Ext/Status int source */
  56. static unsigned char scc_last_status_reg[2];
  57. /***************************** Prototypes *****************************/
  58. /* Function prototypes */
  59. static void scc_disable_tx_interrupts(void * ptr);
  60. static void scc_enable_tx_interrupts(void * ptr);
  61. static void scc_disable_rx_interrupts(void * ptr);
  62. static void scc_enable_rx_interrupts(void * ptr);
  63. static int scc_get_CD(void * ptr);
  64. static void scc_shutdown_port(void * ptr);
  65. static int scc_set_real_termios(void *ptr);
  66. static void scc_hungup(void *ptr);
  67. static void scc_close(void *ptr);
  68. static int scc_chars_in_buffer(void * ptr);
  69. static int scc_open(struct tty_struct * tty, struct file * filp);
  70. static int scc_ioctl(struct tty_struct * tty, struct file * filp,
  71. unsigned int cmd, unsigned long arg);
  72. static void scc_throttle(struct tty_struct *tty);
  73. static void scc_unthrottle(struct tty_struct *tty);
  74. static irqreturn_t scc_tx_int(int irq, void *data, struct pt_regs *fp);
  75. static irqreturn_t scc_rx_int(int irq, void *data, struct pt_regs *fp);
  76. static irqreturn_t scc_stat_int(int irq, void *data, struct pt_regs *fp);
  77. static irqreturn_t scc_spcond_int(int irq, void *data, struct pt_regs *fp);
  78. static void scc_setsignals(struct scc_port *port, int dtr, int rts);
  79. static void scc_break_ctl(struct tty_struct *tty, int break_state);
  80. static struct tty_driver *scc_driver;
  81. struct scc_port scc_ports[2];
  82. int scc_initialized = 0;
  83. /*---------------------------------------------------------------------------
  84. * Interface from generic_serial.c back here
  85. *--------------------------------------------------------------------------*/
  86. static struct real_driver scc_real_driver = {
  87. scc_disable_tx_interrupts,
  88. scc_enable_tx_interrupts,
  89. scc_disable_rx_interrupts,
  90. scc_enable_rx_interrupts,
  91. scc_get_CD,
  92. scc_shutdown_port,
  93. scc_set_real_termios,
  94. scc_chars_in_buffer,
  95. scc_close,
  96. scc_hungup,
  97. NULL
  98. };
  99. static struct tty_operations scc_ops = {
  100. .open = scc_open,
  101. .close = gs_close,
  102. .write = gs_write,
  103. .put_char = gs_put_char,
  104. .flush_chars = gs_flush_chars,
  105. .write_room = gs_write_room,
  106. .chars_in_buffer = gs_chars_in_buffer,
  107. .flush_buffer = gs_flush_buffer,
  108. .ioctl = scc_ioctl,
  109. .throttle = scc_throttle,
  110. .unthrottle = scc_unthrottle,
  111. .set_termios = gs_set_termios,
  112. .stop = gs_stop,
  113. .start = gs_start,
  114. .hangup = gs_hangup,
  115. .break_ctl = scc_break_ctl,
  116. };
  117. /*----------------------------------------------------------------------------
  118. * vme_scc_init() and support functions
  119. *---------------------------------------------------------------------------*/
  120. static int scc_init_drivers(void)
  121. {
  122. int error;
  123. scc_driver = alloc_tty_driver(2);
  124. if (!scc_driver)
  125. return -ENOMEM;
  126. scc_driver->owner = THIS_MODULE;
  127. scc_driver->driver_name = "scc";
  128. scc_driver->name = "ttyS";
  129. scc_driver->devfs_name = "tts/";
  130. scc_driver->major = TTY_MAJOR;
  131. scc_driver->minor_start = SCC_MINOR_BASE;
  132. scc_driver->type = TTY_DRIVER_TYPE_SERIAL;
  133. scc_driver->subtype = SERIAL_TYPE_NORMAL;
  134. scc_driver->init_termios = tty_std_termios;
  135. scc_driver->init_termios.c_cflag =
  136. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  137. scc_driver->flags = TTY_DRIVER_REAL_RAW;
  138. tty_set_operations(scc_driver, &scc_ops);
  139. if ((error = tty_register_driver(scc_driver))) {
  140. printk(KERN_ERR "scc: Couldn't register scc driver, error = %d\n",
  141. error);
  142. put_tty_driver(scc_driver);
  143. return 1;
  144. }
  145. return 0;
  146. }
  147. /* ports[] array is indexed by line no (i.e. [0] for ttyS0, [1] for ttyS1).
  148. */
  149. static void scc_init_portstructs(void)
  150. {
  151. struct scc_port *port;
  152. int i;
  153. for (i = 0; i < 2; i++) {
  154. port = scc_ports + i;
  155. port->gs.magic = SCC_MAGIC;
  156. port->gs.close_delay = HZ/2;
  157. port->gs.closing_wait = 30 * HZ;
  158. port->gs.rd = &scc_real_driver;
  159. #ifdef NEW_WRITE_LOCKING
  160. port->gs.port_write_mutex = MUTEX;
  161. #endif
  162. init_waitqueue_head(&port->gs.open_wait);
  163. init_waitqueue_head(&port->gs.close_wait);
  164. }
  165. }
  166. #ifdef CONFIG_MVME147_SCC
  167. static int mvme147_scc_init(void)
  168. {
  169. struct scc_port *port;
  170. printk(KERN_INFO "SCC: MVME147 Serial Driver\n");
  171. /* Init channel A */
  172. port = &scc_ports[0];
  173. port->channel = CHANNEL_A;
  174. port->ctrlp = (volatile unsigned char *)M147_SCC_A_ADDR;
  175. port->datap = port->ctrlp + 1;
  176. port->port_a = &scc_ports[0];
  177. port->port_b = &scc_ports[1];
  178. request_irq(MVME147_IRQ_SCCA_TX, scc_tx_int, SA_INTERRUPT,
  179. "SCC-A TX", port);
  180. request_irq(MVME147_IRQ_SCCA_STAT, scc_stat_int, SA_INTERRUPT,
  181. "SCC-A status", port);
  182. request_irq(MVME147_IRQ_SCCA_RX, scc_rx_int, SA_INTERRUPT,
  183. "SCC-A RX", port);
  184. request_irq(MVME147_IRQ_SCCA_SPCOND, scc_spcond_int, SA_INTERRUPT,
  185. "SCC-A special cond", port);
  186. {
  187. SCC_ACCESS_INIT(port);
  188. /* disable interrupts for this channel */
  189. SCCwrite(INT_AND_DMA_REG, 0);
  190. /* Set the interrupt vector */
  191. SCCwrite(INT_VECTOR_REG, MVME147_IRQ_SCC_BASE);
  192. /* Interrupt parameters: vector includes status, status low */
  193. SCCwrite(MASTER_INT_CTRL, MIC_VEC_INCL_STAT);
  194. SCCmod(MASTER_INT_CTRL, 0xff, MIC_MASTER_INT_ENAB);
  195. }
  196. /* Init channel B */
  197. port = &scc_ports[1];
  198. port->channel = CHANNEL_B;
  199. port->ctrlp = (volatile unsigned char *)M147_SCC_B_ADDR;
  200. port->datap = port->ctrlp + 1;
  201. port->port_a = &scc_ports[0];
  202. port->port_b = &scc_ports[1];
  203. request_irq(MVME147_IRQ_SCCB_TX, scc_tx_int, SA_INTERRUPT,
  204. "SCC-B TX", port);
  205. request_irq(MVME147_IRQ_SCCB_STAT, scc_stat_int, SA_INTERRUPT,
  206. "SCC-B status", port);
  207. request_irq(MVME147_IRQ_SCCB_RX, scc_rx_int, SA_INTERRUPT,
  208. "SCC-B RX", port);
  209. request_irq(MVME147_IRQ_SCCB_SPCOND, scc_spcond_int, SA_INTERRUPT,
  210. "SCC-B special cond", port);
  211. {
  212. SCC_ACCESS_INIT(port);
  213. /* disable interrupts for this channel */
  214. SCCwrite(INT_AND_DMA_REG, 0);
  215. }
  216. /* Ensure interrupts are enabled in the PCC chip */
  217. m147_pcc->serial_cntrl=PCC_LEVEL_SERIAL|PCC_INT_ENAB;
  218. /* Initialise the tty driver structures and register */
  219. scc_init_portstructs();
  220. scc_init_drivers();
  221. return 0;
  222. }
  223. #endif
  224. #ifdef CONFIG_MVME162_SCC
  225. static int mvme162_scc_init(void)
  226. {
  227. struct scc_port *port;
  228. if (!(mvme16x_config & MVME16x_CONFIG_GOT_SCCA))
  229. return (-ENODEV);
  230. printk(KERN_INFO "SCC: MVME162 Serial Driver\n");
  231. /* Init channel A */
  232. port = &scc_ports[0];
  233. port->channel = CHANNEL_A;
  234. port->ctrlp = (volatile unsigned char *)MVME_SCC_A_ADDR;
  235. port->datap = port->ctrlp + 2;
  236. port->port_a = &scc_ports[0];
  237. port->port_b = &scc_ports[1];
  238. request_irq(MVME162_IRQ_SCCA_TX, scc_tx_int, SA_INTERRUPT,
  239. "SCC-A TX", port);
  240. request_irq(MVME162_IRQ_SCCA_STAT, scc_stat_int, SA_INTERRUPT,
  241. "SCC-A status", port);
  242. request_irq(MVME162_IRQ_SCCA_RX, scc_rx_int, SA_INTERRUPT,
  243. "SCC-A RX", port);
  244. request_irq(MVME162_IRQ_SCCA_SPCOND, scc_spcond_int, SA_INTERRUPT,
  245. "SCC-A special cond", port);
  246. {
  247. SCC_ACCESS_INIT(port);
  248. /* disable interrupts for this channel */
  249. SCCwrite(INT_AND_DMA_REG, 0);
  250. /* Set the interrupt vector */
  251. SCCwrite(INT_VECTOR_REG, MVME162_IRQ_SCC_BASE);
  252. /* Interrupt parameters: vector includes status, status low */
  253. SCCwrite(MASTER_INT_CTRL, MIC_VEC_INCL_STAT);
  254. SCCmod(MASTER_INT_CTRL, 0xff, MIC_MASTER_INT_ENAB);
  255. }
  256. /* Init channel B */
  257. port = &scc_ports[1];
  258. port->channel = CHANNEL_B;
  259. port->ctrlp = (volatile unsigned char *)MVME_SCC_B_ADDR;
  260. port->datap = port->ctrlp + 2;
  261. port->port_a = &scc_ports[0];
  262. port->port_b = &scc_ports[1];
  263. request_irq(MVME162_IRQ_SCCB_TX, scc_tx_int, SA_INTERRUPT,
  264. "SCC-B TX", port);
  265. request_irq(MVME162_IRQ_SCCB_STAT, scc_stat_int, SA_INTERRUPT,
  266. "SCC-B status", port);
  267. request_irq(MVME162_IRQ_SCCB_RX, scc_rx_int, SA_INTERRUPT,
  268. "SCC-B RX", port);
  269. request_irq(MVME162_IRQ_SCCB_SPCOND, scc_spcond_int, SA_INTERRUPT,
  270. "SCC-B special cond", port);
  271. {
  272. SCC_ACCESS_INIT(port); /* Either channel will do */
  273. /* disable interrupts for this channel */
  274. SCCwrite(INT_AND_DMA_REG, 0);
  275. }
  276. /* Ensure interrupts are enabled in the MC2 chip */
  277. *(volatile char *)0xfff4201d = 0x14;
  278. /* Initialise the tty driver structures and register */
  279. scc_init_portstructs();
  280. scc_init_drivers();
  281. return 0;
  282. }
  283. #endif
  284. #ifdef CONFIG_BVME6000_SCC
  285. static int bvme6000_scc_init(void)
  286. {
  287. struct scc_port *port;
  288. printk(KERN_INFO "SCC: BVME6000 Serial Driver\n");
  289. /* Init channel A */
  290. port = &scc_ports[0];
  291. port->channel = CHANNEL_A;
  292. port->ctrlp = (volatile unsigned char *)BVME_SCC_A_ADDR;
  293. port->datap = port->ctrlp + 4;
  294. port->port_a = &scc_ports[0];
  295. port->port_b = &scc_ports[1];
  296. request_irq(BVME_IRQ_SCCA_TX, scc_tx_int, SA_INTERRUPT,
  297. "SCC-A TX", port);
  298. request_irq(BVME_IRQ_SCCA_STAT, scc_stat_int, SA_INTERRUPT,
  299. "SCC-A status", port);
  300. request_irq(BVME_IRQ_SCCA_RX, scc_rx_int, SA_INTERRUPT,
  301. "SCC-A RX", port);
  302. request_irq(BVME_IRQ_SCCA_SPCOND, scc_spcond_int, SA_INTERRUPT,
  303. "SCC-A special cond", port);
  304. {
  305. SCC_ACCESS_INIT(port);
  306. /* disable interrupts for this channel */
  307. SCCwrite(INT_AND_DMA_REG, 0);
  308. /* Set the interrupt vector */
  309. SCCwrite(INT_VECTOR_REG, BVME_IRQ_SCC_BASE);
  310. /* Interrupt parameters: vector includes status, status low */
  311. SCCwrite(MASTER_INT_CTRL, MIC_VEC_INCL_STAT);
  312. SCCmod(MASTER_INT_CTRL, 0xff, MIC_MASTER_INT_ENAB);
  313. }
  314. /* Init channel B */
  315. port = &scc_ports[1];
  316. port->channel = CHANNEL_B;
  317. port->ctrlp = (volatile unsigned char *)BVME_SCC_B_ADDR;
  318. port->datap = port->ctrlp + 4;
  319. port->port_a = &scc_ports[0];
  320. port->port_b = &scc_ports[1];
  321. request_irq(BVME_IRQ_SCCB_TX, scc_tx_int, SA_INTERRUPT,
  322. "SCC-B TX", port);
  323. request_irq(BVME_IRQ_SCCB_STAT, scc_stat_int, SA_INTERRUPT,
  324. "SCC-B status", port);
  325. request_irq(BVME_IRQ_SCCB_RX, scc_rx_int, SA_INTERRUPT,
  326. "SCC-B RX", port);
  327. request_irq(BVME_IRQ_SCCB_SPCOND, scc_spcond_int, SA_INTERRUPT,
  328. "SCC-B special cond", port);
  329. {
  330. SCC_ACCESS_INIT(port); /* Either channel will do */
  331. /* disable interrupts for this channel */
  332. SCCwrite(INT_AND_DMA_REG, 0);
  333. }
  334. /* Initialise the tty driver structures and register */
  335. scc_init_portstructs();
  336. scc_init_drivers();
  337. return 0;
  338. }
  339. #endif
  340. static int vme_scc_init(void)
  341. {
  342. int res = -ENODEV;
  343. #ifdef CONFIG_MVME147_SCC
  344. if (MACH_IS_MVME147)
  345. res = mvme147_scc_init();
  346. #endif
  347. #ifdef CONFIG_MVME162_SCC
  348. if (MACH_IS_MVME16x)
  349. res = mvme162_scc_init();
  350. #endif
  351. #ifdef CONFIG_BVME6000_SCC
  352. if (MACH_IS_BVME6000)
  353. res = bvme6000_scc_init();
  354. #endif
  355. return res;
  356. }
  357. module_init(vme_scc_init);
  358. /*---------------------------------------------------------------------------
  359. * Interrupt handlers
  360. *--------------------------------------------------------------------------*/
  361. static irqreturn_t scc_rx_int(int irq, void *data, struct pt_regs *fp)
  362. {
  363. unsigned char ch;
  364. struct scc_port *port = data;
  365. struct tty_struct *tty = port->gs.tty;
  366. SCC_ACCESS_INIT(port);
  367. ch = SCCread_NB(RX_DATA_REG);
  368. if (!tty) {
  369. printk(KERN_WARNING "scc_rx_int with NULL tty!\n");
  370. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  371. return IRQ_HANDLED;
  372. }
  373. tty_insert_flip_char(tty, ch, 0);
  374. /* Check if another character is already ready; in that case, the
  375. * spcond_int() function must be used, because this character may have an
  376. * error condition that isn't signalled by the interrupt vector used!
  377. */
  378. if (SCCread(INT_PENDING_REG) &
  379. (port->channel == CHANNEL_A ? IPR_A_RX : IPR_B_RX)) {
  380. scc_spcond_int (irq, data, fp);
  381. return IRQ_HANDLED;
  382. }
  383. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  384. tty_flip_buffer_push(tty);
  385. return IRQ_HANDLED;
  386. }
  387. static irqreturn_t scc_spcond_int(int irq, void *data, struct pt_regs *fp)
  388. {
  389. struct scc_port *port = data;
  390. struct tty_struct *tty = port->gs.tty;
  391. unsigned char stat, ch, err;
  392. int int_pending_mask = port->channel == CHANNEL_A ?
  393. IPR_A_RX : IPR_B_RX;
  394. SCC_ACCESS_INIT(port);
  395. if (!tty) {
  396. printk(KERN_WARNING "scc_spcond_int with NULL tty!\n");
  397. SCCwrite(COMMAND_REG, CR_ERROR_RESET);
  398. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  399. return IRQ_HANDLED;
  400. }
  401. do {
  402. stat = SCCread(SPCOND_STATUS_REG);
  403. ch = SCCread_NB(RX_DATA_REG);
  404. if (stat & SCSR_RX_OVERRUN)
  405. err = TTY_OVERRUN;
  406. else if (stat & SCSR_PARITY_ERR)
  407. err = TTY_PARITY;
  408. else if (stat & SCSR_CRC_FRAME_ERR)
  409. err = TTY_FRAME;
  410. else
  411. err = 0;
  412. tty_insert_flip_char(tty, ch, err);
  413. /* ++TeSche: *All* errors have to be cleared manually,
  414. * else the condition persists for the next chars
  415. */
  416. if (err)
  417. SCCwrite(COMMAND_REG, CR_ERROR_RESET);
  418. } while(SCCread(INT_PENDING_REG) & int_pending_mask);
  419. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  420. tty_flip_buffer_push(tty);
  421. return IRQ_HANDLED;
  422. }
  423. static irqreturn_t scc_tx_int(int irq, void *data, struct pt_regs *fp)
  424. {
  425. struct scc_port *port = data;
  426. SCC_ACCESS_INIT(port);
  427. if (!port->gs.tty) {
  428. printk(KERN_WARNING "scc_tx_int with NULL tty!\n");
  429. SCCmod (INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0);
  430. SCCwrite(COMMAND_REG, CR_TX_PENDING_RESET);
  431. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  432. return IRQ_HANDLED;
  433. }
  434. while ((SCCread_NB(STATUS_REG) & SR_TX_BUF_EMPTY)) {
  435. if (port->x_char) {
  436. SCCwrite(TX_DATA_REG, port->x_char);
  437. port->x_char = 0;
  438. }
  439. else if ((port->gs.xmit_cnt <= 0) || port->gs.tty->stopped ||
  440. port->gs.tty->hw_stopped)
  441. break;
  442. else {
  443. SCCwrite(TX_DATA_REG, port->gs.xmit_buf[port->gs.xmit_tail++]);
  444. port->gs.xmit_tail = port->gs.xmit_tail & (SERIAL_XMIT_SIZE-1);
  445. if (--port->gs.xmit_cnt <= 0)
  446. break;
  447. }
  448. }
  449. if ((port->gs.xmit_cnt <= 0) || port->gs.tty->stopped ||
  450. port->gs.tty->hw_stopped) {
  451. /* disable tx interrupts */
  452. SCCmod (INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0);
  453. SCCwrite(COMMAND_REG, CR_TX_PENDING_RESET); /* disable tx_int on next tx underrun? */
  454. port->gs.flags &= ~GS_TX_INTEN;
  455. }
  456. if (port->gs.tty && port->gs.xmit_cnt <= port->gs.wakeup_chars)
  457. tty_wakeup(port->gs.tty);
  458. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  459. return IRQ_HANDLED;
  460. }
  461. static irqreturn_t scc_stat_int(int irq, void *data, struct pt_regs *fp)
  462. {
  463. struct scc_port *port = data;
  464. unsigned channel = port->channel;
  465. unsigned char last_sr, sr, changed;
  466. SCC_ACCESS_INIT(port);
  467. last_sr = scc_last_status_reg[channel];
  468. sr = scc_last_status_reg[channel] = SCCread_NB(STATUS_REG);
  469. changed = last_sr ^ sr;
  470. if (changed & SR_DCD) {
  471. port->c_dcd = !!(sr & SR_DCD);
  472. if (!(port->gs.flags & ASYNC_CHECK_CD))
  473. ; /* Don't report DCD changes */
  474. else if (port->c_dcd) {
  475. wake_up_interruptible(&port->gs.open_wait);
  476. }
  477. else {
  478. if (port->gs.tty)
  479. tty_hangup (port->gs.tty);
  480. }
  481. }
  482. SCCwrite(COMMAND_REG, CR_EXTSTAT_RESET);
  483. SCCwrite_NB(COMMAND_REG, CR_HIGHEST_IUS_RESET);
  484. return IRQ_HANDLED;
  485. }
  486. /*---------------------------------------------------------------------------
  487. * generic_serial.c callback funtions
  488. *--------------------------------------------------------------------------*/
  489. static void scc_disable_tx_interrupts(void *ptr)
  490. {
  491. struct scc_port *port = ptr;
  492. unsigned long flags;
  493. SCC_ACCESS_INIT(port);
  494. local_irq_save(flags);
  495. SCCmod(INT_AND_DMA_REG, ~IDR_TX_INT_ENAB, 0);
  496. port->gs.flags &= ~GS_TX_INTEN;
  497. local_irq_restore(flags);
  498. }
  499. static void scc_enable_tx_interrupts(void *ptr)
  500. {
  501. struct scc_port *port = ptr;
  502. unsigned long flags;
  503. SCC_ACCESS_INIT(port);
  504. local_irq_save(flags);
  505. SCCmod(INT_AND_DMA_REG, 0xff, IDR_TX_INT_ENAB);
  506. /* restart the transmitter */
  507. scc_tx_int (0, port, 0);
  508. local_irq_restore(flags);
  509. }
  510. static void scc_disable_rx_interrupts(void *ptr)
  511. {
  512. struct scc_port *port = ptr;
  513. unsigned long flags;
  514. SCC_ACCESS_INIT(port);
  515. local_irq_save(flags);
  516. SCCmod(INT_AND_DMA_REG,
  517. ~(IDR_RX_INT_MASK|IDR_PARERR_AS_SPCOND|IDR_EXTSTAT_INT_ENAB), 0);
  518. local_irq_restore(flags);
  519. }
  520. static void scc_enable_rx_interrupts(void *ptr)
  521. {
  522. struct scc_port *port = ptr;
  523. unsigned long flags;
  524. SCC_ACCESS_INIT(port);
  525. local_irq_save(flags);
  526. SCCmod(INT_AND_DMA_REG, 0xff,
  527. IDR_EXTSTAT_INT_ENAB|IDR_PARERR_AS_SPCOND|IDR_RX_INT_ALL);
  528. local_irq_restore(flags);
  529. }
  530. static int scc_get_CD(void *ptr)
  531. {
  532. struct scc_port *port = ptr;
  533. unsigned channel = port->channel;
  534. return !!(scc_last_status_reg[channel] & SR_DCD);
  535. }
  536. static void scc_shutdown_port(void *ptr)
  537. {
  538. struct scc_port *port = ptr;
  539. port->gs.flags &= ~ GS_ACTIVE;
  540. if (port->gs.tty && port->gs.tty->termios->c_cflag & HUPCL) {
  541. scc_setsignals (port, 0, 0);
  542. }
  543. }
  544. static int scc_set_real_termios (void *ptr)
  545. {
  546. /* the SCC has char sizes 5,7,6,8 in that order! */
  547. static int chsize_map[4] = { 0, 2, 1, 3 };
  548. unsigned cflag, baud, chsize, channel, brgval = 0;
  549. unsigned long flags;
  550. struct scc_port *port = ptr;
  551. SCC_ACCESS_INIT(port);
  552. if (!port->gs.tty || !port->gs.tty->termios) return 0;
  553. channel = port->channel;
  554. if (channel == CHANNEL_A)
  555. return 0; /* Settings controlled by boot PROM */
  556. cflag = port->gs.tty->termios->c_cflag;
  557. baud = port->gs.baud;
  558. chsize = (cflag & CSIZE) >> 4;
  559. if (baud == 0) {
  560. /* speed == 0 -> drop DTR */
  561. local_irq_save(flags);
  562. SCCmod(TX_CTRL_REG, ~TCR_DTR, 0);
  563. local_irq_restore(flags);
  564. return 0;
  565. }
  566. else if ((MACH_IS_MVME16x && (baud < 50 || baud > 38400)) ||
  567. (MACH_IS_MVME147 && (baud < 50 || baud > 19200)) ||
  568. (MACH_IS_BVME6000 &&(baud < 50 || baud > 76800))) {
  569. printk(KERN_NOTICE "SCC: Bad speed requested, %d\n", baud);
  570. return 0;
  571. }
  572. if (cflag & CLOCAL)
  573. port->gs.flags &= ~ASYNC_CHECK_CD;
  574. else
  575. port->gs.flags |= ASYNC_CHECK_CD;
  576. #ifdef CONFIG_MVME147_SCC
  577. if (MACH_IS_MVME147)
  578. brgval = (M147_SCC_PCLK + baud/2) / (16 * 2 * baud) - 2;
  579. #endif
  580. #ifdef CONFIG_MVME162_SCC
  581. if (MACH_IS_MVME16x)
  582. brgval = (MVME_SCC_PCLK + baud/2) / (16 * 2 * baud) - 2;
  583. #endif
  584. #ifdef CONFIG_BVME6000_SCC
  585. if (MACH_IS_BVME6000)
  586. brgval = (BVME_SCC_RTxC + baud/2) / (16 * 2 * baud) - 2;
  587. #endif
  588. /* Now we have all parameters and can go to set them: */
  589. local_irq_save(flags);
  590. /* receiver's character size and auto-enables */
  591. SCCmod(RX_CTRL_REG, ~(RCR_CHSIZE_MASK|RCR_AUTO_ENAB_MODE),
  592. (chsize_map[chsize] << 6) |
  593. ((cflag & CRTSCTS) ? RCR_AUTO_ENAB_MODE : 0));
  594. /* parity and stop bits (both, Tx and Rx), clock mode never changes */
  595. SCCmod (AUX1_CTRL_REG,
  596. ~(A1CR_PARITY_MASK | A1CR_MODE_MASK),
  597. ((cflag & PARENB
  598. ? (cflag & PARODD ? A1CR_PARITY_ODD : A1CR_PARITY_EVEN)
  599. : A1CR_PARITY_NONE)
  600. | (cflag & CSTOPB ? A1CR_MODE_ASYNC_2 : A1CR_MODE_ASYNC_1)));
  601. /* sender's character size, set DTR for valid baud rate */
  602. SCCmod(TX_CTRL_REG, ~TCR_CHSIZE_MASK, chsize_map[chsize] << 5 | TCR_DTR);
  603. /* clock sources never change */
  604. /* disable BRG before changing the value */
  605. SCCmod(DPLL_CTRL_REG, ~DCR_BRG_ENAB, 0);
  606. /* BRG value */
  607. SCCwrite(TIMER_LOW_REG, brgval & 0xff);
  608. SCCwrite(TIMER_HIGH_REG, (brgval >> 8) & 0xff);
  609. /* BRG enable, and clock source never changes */
  610. SCCmod(DPLL_CTRL_REG, 0xff, DCR_BRG_ENAB);
  611. local_irq_restore(flags);
  612. return 0;
  613. }
  614. static int scc_chars_in_buffer (void *ptr)
  615. {
  616. struct scc_port *port = ptr;
  617. SCC_ACCESS_INIT(port);
  618. return (SCCread (SPCOND_STATUS_REG) & SCSR_ALL_SENT) ? 0 : 1;
  619. }
  620. /* Comment taken from sx.c (2.4.0):
  621. I haven't the foggiest why the decrement use count has to happen
  622. here. The whole linux serial drivers stuff needs to be redesigned.
  623. My guess is that this is a hack to minimize the impact of a bug
  624. elsewhere. Thinking about it some more. (try it sometime) Try
  625. running minicom on a serial port that is driven by a modularized
  626. driver. Have the modem hangup. Then remove the driver module. Then
  627. exit minicom. I expect an "oops". -- REW */
  628. static void scc_hungup(void *ptr)
  629. {
  630. scc_disable_tx_interrupts(ptr);
  631. scc_disable_rx_interrupts(ptr);
  632. }
  633. static void scc_close(void *ptr)
  634. {
  635. scc_disable_tx_interrupts(ptr);
  636. scc_disable_rx_interrupts(ptr);
  637. }
  638. /*---------------------------------------------------------------------------
  639. * Internal support functions
  640. *--------------------------------------------------------------------------*/
  641. static void scc_setsignals(struct scc_port *port, int dtr, int rts)
  642. {
  643. unsigned long flags;
  644. unsigned char t;
  645. SCC_ACCESS_INIT(port);
  646. local_irq_save(flags);
  647. t = SCCread(TX_CTRL_REG);
  648. if (dtr >= 0) t = dtr? (t | TCR_DTR): (t & ~TCR_DTR);
  649. if (rts >= 0) t = rts? (t | TCR_RTS): (t & ~TCR_RTS);
  650. SCCwrite(TX_CTRL_REG, t);
  651. local_irq_restore(flags);
  652. }
  653. static void scc_send_xchar(struct tty_struct *tty, char ch)
  654. {
  655. struct scc_port *port = (struct scc_port *)tty->driver_data;
  656. port->x_char = ch;
  657. if (ch)
  658. scc_enable_tx_interrupts(port);
  659. }
  660. /*---------------------------------------------------------------------------
  661. * Driver entrypoints referenced from above
  662. *--------------------------------------------------------------------------*/
  663. static int scc_open (struct tty_struct * tty, struct file * filp)
  664. {
  665. int line = tty->index;
  666. int retval;
  667. struct scc_port *port = &scc_ports[line];
  668. int i, channel = port->channel;
  669. unsigned long flags;
  670. SCC_ACCESS_INIT(port);
  671. #if defined(CONFIG_MVME162_SCC) || defined(CONFIG_MVME147_SCC)
  672. static const struct {
  673. unsigned reg, val;
  674. } mvme_init_tab[] = {
  675. /* Values for MVME162 and MVME147 */
  676. /* no parity, 1 stop bit, async, 1:16 */
  677. { AUX1_CTRL_REG, A1CR_PARITY_NONE|A1CR_MODE_ASYNC_1|A1CR_CLKMODE_x16 },
  678. /* parity error is special cond, ints disabled, no DMA */
  679. { INT_AND_DMA_REG, IDR_PARERR_AS_SPCOND | IDR_RX_INT_DISAB },
  680. /* Rx 8 bits/char, no auto enable, Rx off */
  681. { RX_CTRL_REG, RCR_CHSIZE_8 },
  682. /* DTR off, Tx 8 bits/char, RTS off, Tx off */
  683. { TX_CTRL_REG, TCR_CHSIZE_8 },
  684. /* special features off */
  685. { AUX2_CTRL_REG, 0 },
  686. { CLK_CTRL_REG, CCR_RXCLK_BRG | CCR_TXCLK_BRG },
  687. { DPLL_CTRL_REG, DCR_BRG_ENAB | DCR_BRG_USE_PCLK },
  688. /* Start Rx */
  689. { RX_CTRL_REG, RCR_RX_ENAB | RCR_CHSIZE_8 },
  690. /* Start Tx */
  691. { TX_CTRL_REG, TCR_TX_ENAB | TCR_RTS | TCR_DTR | TCR_CHSIZE_8 },
  692. /* Ext/Stat ints: DCD only */
  693. { INT_CTRL_REG, ICR_ENAB_DCD_INT },
  694. /* Reset Ext/Stat ints */
  695. { COMMAND_REG, CR_EXTSTAT_RESET },
  696. /* ...again */
  697. { COMMAND_REG, CR_EXTSTAT_RESET },
  698. };
  699. #endif
  700. #if defined(CONFIG_BVME6000_SCC)
  701. static const struct {
  702. unsigned reg, val;
  703. } bvme_init_tab[] = {
  704. /* Values for BVME6000 */
  705. /* no parity, 1 stop bit, async, 1:16 */
  706. { AUX1_CTRL_REG, A1CR_PARITY_NONE|A1CR_MODE_ASYNC_1|A1CR_CLKMODE_x16 },
  707. /* parity error is special cond, ints disabled, no DMA */
  708. { INT_AND_DMA_REG, IDR_PARERR_AS_SPCOND | IDR_RX_INT_DISAB },
  709. /* Rx 8 bits/char, no auto enable, Rx off */
  710. { RX_CTRL_REG, RCR_CHSIZE_8 },
  711. /* DTR off, Tx 8 bits/char, RTS off, Tx off */
  712. { TX_CTRL_REG, TCR_CHSIZE_8 },
  713. /* special features off */
  714. { AUX2_CTRL_REG, 0 },
  715. { CLK_CTRL_REG, CCR_RTxC_XTAL | CCR_RXCLK_BRG | CCR_TXCLK_BRG },
  716. { DPLL_CTRL_REG, DCR_BRG_ENAB },
  717. /* Start Rx */
  718. { RX_CTRL_REG, RCR_RX_ENAB | RCR_CHSIZE_8 },
  719. /* Start Tx */
  720. { TX_CTRL_REG, TCR_TX_ENAB | TCR_RTS | TCR_DTR | TCR_CHSIZE_8 },
  721. /* Ext/Stat ints: DCD only */
  722. { INT_CTRL_REG, ICR_ENAB_DCD_INT },
  723. /* Reset Ext/Stat ints */
  724. { COMMAND_REG, CR_EXTSTAT_RESET },
  725. /* ...again */
  726. { COMMAND_REG, CR_EXTSTAT_RESET },
  727. };
  728. #endif
  729. if (!(port->gs.flags & ASYNC_INITIALIZED)) {
  730. local_irq_save(flags);
  731. #if defined(CONFIG_MVME147_SCC) || defined(CONFIG_MVME162_SCC)
  732. if (MACH_IS_MVME147 || MACH_IS_MVME16x) {
  733. for (i = 0; i < ARRAY_SIZE(mvme_init_tab); ++i)
  734. SCCwrite(mvme_init_tab[i].reg, mvme_init_tab[i].val);
  735. }
  736. #endif
  737. #if defined(CONFIG_BVME6000_SCC)
  738. if (MACH_IS_BVME6000) {
  739. for (i = 0; i < ARRAY_SIZE(bvme_init_tab); ++i)
  740. SCCwrite(bvme_init_tab[i].reg, bvme_init_tab[i].val);
  741. }
  742. #endif
  743. /* remember status register for detection of DCD and CTS changes */
  744. scc_last_status_reg[channel] = SCCread(STATUS_REG);
  745. port->c_dcd = 0; /* Prevent initial 1->0 interrupt */
  746. scc_setsignals (port, 1,1);
  747. local_irq_restore(flags);
  748. }
  749. tty->driver_data = port;
  750. port->gs.tty = tty;
  751. port->gs.count++;
  752. retval = gs_init_port(&port->gs);
  753. if (retval) {
  754. port->gs.count--;
  755. return retval;
  756. }
  757. port->gs.flags |= GS_ACTIVE;
  758. retval = gs_block_til_ready(port, filp);
  759. if (retval) {
  760. port->gs.count--;
  761. return retval;
  762. }
  763. port->c_dcd = scc_get_CD (port);
  764. scc_enable_rx_interrupts(port);
  765. return 0;
  766. }
  767. static void scc_throttle (struct tty_struct * tty)
  768. {
  769. struct scc_port *port = (struct scc_port *)tty->driver_data;
  770. unsigned long flags;
  771. SCC_ACCESS_INIT(port);
  772. if (tty->termios->c_cflag & CRTSCTS) {
  773. local_irq_save(flags);
  774. SCCmod(TX_CTRL_REG, ~TCR_RTS, 0);
  775. local_irq_restore(flags);
  776. }
  777. if (I_IXOFF(tty))
  778. scc_send_xchar(tty, STOP_CHAR(tty));
  779. }
  780. static void scc_unthrottle (struct tty_struct * tty)
  781. {
  782. struct scc_port *port = (struct scc_port *)tty->driver_data;
  783. unsigned long flags;
  784. SCC_ACCESS_INIT(port);
  785. if (tty->termios->c_cflag & CRTSCTS) {
  786. local_irq_save(flags);
  787. SCCmod(TX_CTRL_REG, 0xff, TCR_RTS);
  788. local_irq_restore(flags);
  789. }
  790. if (I_IXOFF(tty))
  791. scc_send_xchar(tty, START_CHAR(tty));
  792. }
  793. static int scc_ioctl(struct tty_struct *tty, struct file *file,
  794. unsigned int cmd, unsigned long arg)
  795. {
  796. return -ENOIOCTLCMD;
  797. }
  798. static void scc_break_ctl(struct tty_struct *tty, int break_state)
  799. {
  800. struct scc_port *port = (struct scc_port *)tty->driver_data;
  801. unsigned long flags;
  802. SCC_ACCESS_INIT(port);
  803. local_irq_save(flags);
  804. SCCmod(TX_CTRL_REG, ~TCR_SEND_BREAK,
  805. break_state ? TCR_SEND_BREAK : 0);
  806. local_irq_restore(flags);
  807. }
  808. /*---------------------------------------------------------------------------
  809. * Serial console stuff...
  810. *--------------------------------------------------------------------------*/
  811. #define scc_delay() do { __asm__ __volatile__ (" nop; nop"); } while (0)
  812. static void scc_ch_write (char ch)
  813. {
  814. volatile char *p = NULL;
  815. #ifdef CONFIG_MVME147_SCC
  816. if (MACH_IS_MVME147)
  817. p = (volatile char *)M147_SCC_A_ADDR;
  818. #endif
  819. #ifdef CONFIG_MVME162_SCC
  820. if (MACH_IS_MVME16x)
  821. p = (volatile char *)MVME_SCC_A_ADDR;
  822. #endif
  823. #ifdef CONFIG_BVME6000_SCC
  824. if (MACH_IS_BVME6000)
  825. p = (volatile char *)BVME_SCC_A_ADDR;
  826. #endif
  827. do {
  828. scc_delay();
  829. }
  830. while (!(*p & 4));
  831. scc_delay();
  832. *p = 8;
  833. scc_delay();
  834. *p = ch;
  835. }
  836. /* The console must be locked when we get here. */
  837. static void scc_console_write (struct console *co, const char *str, unsigned count)
  838. {
  839. unsigned long flags;
  840. local_irq_save(flags);
  841. while (count--)
  842. {
  843. if (*str == '\n')
  844. scc_ch_write ('\r');
  845. scc_ch_write (*str++);
  846. }
  847. local_irq_restore(flags);
  848. }
  849. static struct tty_driver *scc_console_device(struct console *c, int *index)
  850. {
  851. *index = c->index;
  852. return scc_driver;
  853. }
  854. static int __init scc_console_setup(struct console *co, char *options)
  855. {
  856. return 0;
  857. }
  858. static struct console sercons = {
  859. .name = "ttyS",
  860. .write = scc_console_write,
  861. .device = scc_console_device,
  862. .setup = scc_console_setup,
  863. .flags = CON_PRINTBUFFER,
  864. .index = -1,
  865. };
  866. static int __init vme_scc_console_init(void)
  867. {
  868. if (vme_brdtype == VME_TYPE_MVME147 ||
  869. vme_brdtype == VME_TYPE_MVME162 ||
  870. vme_brdtype == VME_TYPE_MVME172 ||
  871. vme_brdtype == VME_TYPE_BVME4000 ||
  872. vme_brdtype == VME_TYPE_BVME6000)
  873. register_console(&sercons);
  874. return 0;
  875. }
  876. console_initcall(vme_scc_console_init);