nwflash.c 14 KB

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  1. /*
  2. * Flash memory interface rev.5 driver for the Intel
  3. * Flash chips used on the NetWinder.
  4. *
  5. * 20/08/2000 RMK use __ioremap to map flash into virtual memory
  6. * make a few more places use "volatile"
  7. * 22/05/2001 RMK - Lock read against write
  8. * - merge printk level changes (with mods) from Alan Cox.
  9. * - use *ppos as the file position, not file->f_pos.
  10. * - fix check for out of range pos and r/w size
  11. *
  12. * Please note that we are tampering with the only flash chip in the
  13. * machine, which contains the bootup code. We therefore have the
  14. * power to convert these machines into doorstops...
  15. */
  16. #include <linux/module.h>
  17. #include <linux/types.h>
  18. #include <linux/fs.h>
  19. #include <linux/errno.h>
  20. #include <linux/mm.h>
  21. #include <linux/delay.h>
  22. #include <linux/proc_fs.h>
  23. #include <linux/sched.h>
  24. #include <linux/miscdevice.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/rwsem.h>
  27. #include <linux/init.h>
  28. #include <linux/smp_lock.h>
  29. #include <linux/mutex.h>
  30. #include <asm/hardware/dec21285.h>
  31. #include <asm/io.h>
  32. #include <asm/leds.h>
  33. #include <asm/mach-types.h>
  34. #include <asm/system.h>
  35. #include <asm/uaccess.h>
  36. /*****************************************************************************/
  37. #include <asm/nwflash.h>
  38. #define NWFLASH_VERSION "6.4"
  39. static void kick_open(void);
  40. static int get_flash_id(void);
  41. static int erase_block(int nBlock);
  42. static int write_block(unsigned long p, const char __user *buf, int count);
  43. #define KFLASH_SIZE 1024*1024 //1 Meg
  44. #define KFLASH_SIZE4 4*1024*1024 //4 Meg
  45. #define KFLASH_ID 0x89A6 //Intel flash
  46. #define KFLASH_ID4 0xB0D4 //Intel flash 4Meg
  47. static int flashdebug; //if set - we will display progress msgs
  48. static int gbWriteEnable;
  49. static int gbWriteBase64Enable;
  50. static volatile unsigned char *FLASH_BASE;
  51. static int gbFlashSize = KFLASH_SIZE;
  52. static DEFINE_MUTEX(nwflash_mutex);
  53. extern spinlock_t gpio_lock;
  54. static int get_flash_id(void)
  55. {
  56. volatile unsigned int c1, c2;
  57. /*
  58. * try to get flash chip ID
  59. */
  60. kick_open();
  61. c2 = inb(0x80);
  62. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x90;
  63. udelay(15);
  64. c1 = *(volatile unsigned char *) FLASH_BASE;
  65. c2 = inb(0x80);
  66. /*
  67. * on 4 Meg flash the second byte is actually at offset 2...
  68. */
  69. if (c1 == 0xB0)
  70. c2 = *(volatile unsigned char *) (FLASH_BASE + 2);
  71. else
  72. c2 = *(volatile unsigned char *) (FLASH_BASE + 1);
  73. c2 += (c1 << 8);
  74. /*
  75. * set it back to read mode
  76. */
  77. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
  78. if (c2 == KFLASH_ID4)
  79. gbFlashSize = KFLASH_SIZE4;
  80. return c2;
  81. }
  82. static int flash_ioctl(struct inode *inodep, struct file *filep, unsigned int cmd, unsigned long arg)
  83. {
  84. switch (cmd) {
  85. case CMD_WRITE_DISABLE:
  86. gbWriteBase64Enable = 0;
  87. gbWriteEnable = 0;
  88. break;
  89. case CMD_WRITE_ENABLE:
  90. gbWriteEnable = 1;
  91. break;
  92. case CMD_WRITE_BASE64K_ENABLE:
  93. gbWriteBase64Enable = 1;
  94. break;
  95. default:
  96. gbWriteBase64Enable = 0;
  97. gbWriteEnable = 0;
  98. return -EINVAL;
  99. }
  100. return 0;
  101. }
  102. static ssize_t flash_read(struct file *file, char __user *buf, size_t size,
  103. loff_t *ppos)
  104. {
  105. unsigned long p = *ppos;
  106. unsigned int count = size;
  107. int ret = 0;
  108. if (flashdebug)
  109. printk(KERN_DEBUG "flash_read: flash_read: offset=0x%lX, "
  110. "buffer=%p, count=0x%X.\n", p, buf, count);
  111. if (count)
  112. ret = -ENXIO;
  113. if (p < gbFlashSize) {
  114. if (count > gbFlashSize - p)
  115. count = gbFlashSize - p;
  116. /*
  117. * We now lock against reads and writes. --rmk
  118. */
  119. if (mutex_lock_interruptible(&nwflash_mutex))
  120. return -ERESTARTSYS;
  121. ret = copy_to_user(buf, (void *)(FLASH_BASE + p), count);
  122. if (ret == 0) {
  123. ret = count;
  124. *ppos += count;
  125. } else
  126. ret = -EFAULT;
  127. mutex_unlock(&nwflash_mutex);
  128. }
  129. return ret;
  130. }
  131. static ssize_t flash_write(struct file *file, const char __user *buf,
  132. size_t size, loff_t * ppos)
  133. {
  134. unsigned long p = *ppos;
  135. unsigned int count = size;
  136. int written;
  137. int nBlock, temp, rc;
  138. int i, j;
  139. if (flashdebug)
  140. printk("flash_write: offset=0x%lX, buffer=0x%p, count=0x%X.\n",
  141. p, buf, count);
  142. if (!gbWriteEnable)
  143. return -EINVAL;
  144. if (p < 64 * 1024 && (!gbWriteBase64Enable))
  145. return -EINVAL;
  146. /*
  147. * check for out of range pos or count
  148. */
  149. if (p >= gbFlashSize)
  150. return count ? -ENXIO : 0;
  151. if (count > gbFlashSize - p)
  152. count = gbFlashSize - p;
  153. if (!access_ok(VERIFY_READ, buf, count))
  154. return -EFAULT;
  155. /*
  156. * We now lock against reads and writes. --rmk
  157. */
  158. if (mutex_lock_interruptible(&nwflash_mutex))
  159. return -ERESTARTSYS;
  160. written = 0;
  161. leds_event(led_claim);
  162. leds_event(led_green_on);
  163. nBlock = (int) p >> 16; //block # of 64K bytes
  164. /*
  165. * # of 64K blocks to erase and write
  166. */
  167. temp = ((int) (p + count) >> 16) - nBlock + 1;
  168. /*
  169. * write ends at exactly 64k boundary?
  170. */
  171. if (((int) (p + count) & 0xFFFF) == 0)
  172. temp -= 1;
  173. if (flashdebug)
  174. printk(KERN_DEBUG "flash_write: writing %d block(s) "
  175. "starting at %d.\n", temp, nBlock);
  176. for (; temp; temp--, nBlock++) {
  177. if (flashdebug)
  178. printk(KERN_DEBUG "flash_write: erasing block %d.\n", nBlock);
  179. /*
  180. * first we have to erase the block(s), where we will write...
  181. */
  182. i = 0;
  183. j = 0;
  184. RetryBlock:
  185. do {
  186. rc = erase_block(nBlock);
  187. i++;
  188. } while (rc && i < 10);
  189. if (rc) {
  190. printk(KERN_ERR "flash_write: erase error %x\n", rc);
  191. break;
  192. }
  193. if (flashdebug)
  194. printk(KERN_DEBUG "flash_write: writing offset %lX, "
  195. "from buf %p, bytes left %X.\n", p, buf,
  196. count - written);
  197. /*
  198. * write_block will limit write to space left in this block
  199. */
  200. rc = write_block(p, buf, count - written);
  201. j++;
  202. /*
  203. * if somehow write verify failed? Can't happen??
  204. */
  205. if (!rc) {
  206. /*
  207. * retry up to 10 times
  208. */
  209. if (j < 10)
  210. goto RetryBlock;
  211. else
  212. /*
  213. * else quit with error...
  214. */
  215. rc = -1;
  216. }
  217. if (rc < 0) {
  218. printk(KERN_ERR "flash_write: write error %X\n", rc);
  219. break;
  220. }
  221. p += rc;
  222. buf += rc;
  223. written += rc;
  224. *ppos += rc;
  225. if (flashdebug)
  226. printk(KERN_DEBUG "flash_write: written 0x%X bytes OK.\n", written);
  227. }
  228. /*
  229. * restore reg on exit
  230. */
  231. leds_event(led_release);
  232. mutex_unlock(&nwflash_mutex);
  233. return written;
  234. }
  235. /*
  236. * The memory devices use the full 32/64 bits of the offset, and so we cannot
  237. * check against negative addresses: they are ok. The return value is weird,
  238. * though, in that case (0).
  239. *
  240. * also note that seeking relative to the "end of file" isn't supported:
  241. * it has no meaning, so it returns -EINVAL.
  242. */
  243. static loff_t flash_llseek(struct file *file, loff_t offset, int orig)
  244. {
  245. loff_t ret;
  246. lock_kernel();
  247. if (flashdebug)
  248. printk(KERN_DEBUG "flash_llseek: offset=0x%X, orig=0x%X.\n",
  249. (unsigned int) offset, orig);
  250. switch (orig) {
  251. case 0:
  252. if (offset < 0) {
  253. ret = -EINVAL;
  254. break;
  255. }
  256. if ((unsigned int) offset > gbFlashSize) {
  257. ret = -EINVAL;
  258. break;
  259. }
  260. file->f_pos = (unsigned int) offset;
  261. ret = file->f_pos;
  262. break;
  263. case 1:
  264. if ((file->f_pos + offset) > gbFlashSize) {
  265. ret = -EINVAL;
  266. break;
  267. }
  268. if ((file->f_pos + offset) < 0) {
  269. ret = -EINVAL;
  270. break;
  271. }
  272. file->f_pos += offset;
  273. ret = file->f_pos;
  274. break;
  275. default:
  276. ret = -EINVAL;
  277. }
  278. unlock_kernel();
  279. return ret;
  280. }
  281. /*
  282. * assume that main Write routine did the parameter checking...
  283. * so just go ahead and erase, what requested!
  284. */
  285. static int erase_block(int nBlock)
  286. {
  287. volatile unsigned int c1;
  288. volatile unsigned char *pWritePtr;
  289. unsigned long timeout;
  290. int temp, temp1;
  291. /*
  292. * orange LED == erase
  293. */
  294. leds_event(led_amber_on);
  295. /*
  296. * reset footbridge to the correct offset 0 (...0..3)
  297. */
  298. *CSR_ROMWRITEREG = 0;
  299. /*
  300. * dummy ROM read
  301. */
  302. c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
  303. kick_open();
  304. /*
  305. * reset status if old errors
  306. */
  307. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  308. /*
  309. * erase a block...
  310. * aim at the middle of a current block...
  311. */
  312. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + 0x8000 + (nBlock << 16)));
  313. /*
  314. * dummy read
  315. */
  316. c1 = *pWritePtr;
  317. kick_open();
  318. /*
  319. * erase
  320. */
  321. *(volatile unsigned char *) pWritePtr = 0x20;
  322. /*
  323. * confirm
  324. */
  325. *(volatile unsigned char *) pWritePtr = 0xD0;
  326. /*
  327. * wait 10 ms
  328. */
  329. msleep(10);
  330. /*
  331. * wait while erasing in process (up to 10 sec)
  332. */
  333. timeout = jiffies + 10 * HZ;
  334. c1 = 0;
  335. while (!(c1 & 0x80) && time_before(jiffies, timeout)) {
  336. msleep(10);
  337. /*
  338. * read any address
  339. */
  340. c1 = *(volatile unsigned char *) (pWritePtr);
  341. // printk("Flash_erase: status=%X.\n",c1);
  342. }
  343. /*
  344. * set flash for normal read access
  345. */
  346. kick_open();
  347. // *(volatile unsigned char*)(FLASH_BASE+0x8000) = 0xFF;
  348. *(volatile unsigned char *) pWritePtr = 0xFF; //back to normal operation
  349. /*
  350. * check if erase errors were reported
  351. */
  352. if (c1 & 0x20) {
  353. printk(KERN_ERR "flash_erase: err at %p\n", pWritePtr);
  354. /*
  355. * reset error
  356. */
  357. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  358. return -2;
  359. }
  360. /*
  361. * just to make sure - verify if erased OK...
  362. */
  363. msleep(10);
  364. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + (nBlock << 16)));
  365. for (temp = 0; temp < 16 * 1024; temp++, pWritePtr += 4) {
  366. if ((temp1 = *(volatile unsigned int *) pWritePtr) != 0xFFFFFFFF) {
  367. printk(KERN_ERR "flash_erase: verify err at %p = %X\n",
  368. pWritePtr, temp1);
  369. return -1;
  370. }
  371. }
  372. return 0;
  373. }
  374. /*
  375. * write_block will limit number of bytes written to the space in this block
  376. */
  377. static int write_block(unsigned long p, const char __user *buf, int count)
  378. {
  379. volatile unsigned int c1;
  380. volatile unsigned int c2;
  381. unsigned char *pWritePtr;
  382. unsigned int uAddress;
  383. unsigned int offset;
  384. unsigned long timeout;
  385. unsigned long timeout1;
  386. /*
  387. * red LED == write
  388. */
  389. leds_event(led_amber_off);
  390. leds_event(led_red_on);
  391. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
  392. /*
  393. * check if write will end in this block....
  394. */
  395. offset = p & 0xFFFF;
  396. if (offset + count > 0x10000)
  397. count = 0x10000 - offset;
  398. /*
  399. * wait up to 30 sec for this block
  400. */
  401. timeout = jiffies + 30 * HZ;
  402. for (offset = 0; offset < count; offset++, pWritePtr++) {
  403. uAddress = (unsigned int) pWritePtr;
  404. uAddress &= 0xFFFFFFFC;
  405. if (__get_user(c2, buf + offset))
  406. return -EFAULT;
  407. WriteRetry:
  408. /*
  409. * dummy read
  410. */
  411. c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
  412. /*
  413. * kick open the write gate
  414. */
  415. kick_open();
  416. /*
  417. * program footbridge to the correct offset...0..3
  418. */
  419. *CSR_ROMWRITEREG = (unsigned int) pWritePtr & 3;
  420. /*
  421. * write cmd
  422. */
  423. *(volatile unsigned char *) (uAddress) = 0x40;
  424. /*
  425. * data to write
  426. */
  427. *(volatile unsigned char *) (uAddress) = c2;
  428. /*
  429. * get status
  430. */
  431. *(volatile unsigned char *) (FLASH_BASE + 0x10000) = 0x70;
  432. c1 = 0;
  433. /*
  434. * wait up to 1 sec for this byte
  435. */
  436. timeout1 = jiffies + 1 * HZ;
  437. /*
  438. * while not ready...
  439. */
  440. while (!(c1 & 0x80) && time_before(jiffies, timeout1))
  441. c1 = *(volatile unsigned char *) (FLASH_BASE + 0x8000);
  442. /*
  443. * if timeout getting status
  444. */
  445. if (time_after_eq(jiffies, timeout1)) {
  446. kick_open();
  447. /*
  448. * reset err
  449. */
  450. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  451. goto WriteRetry;
  452. }
  453. /*
  454. * switch on read access, as a default flash operation mode
  455. */
  456. kick_open();
  457. /*
  458. * read access
  459. */
  460. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0xFF;
  461. /*
  462. * if hardware reports an error writing, and not timeout -
  463. * reset the chip and retry
  464. */
  465. if (c1 & 0x10) {
  466. kick_open();
  467. /*
  468. * reset err
  469. */
  470. *(volatile unsigned char *) (FLASH_BASE + 0x8000) = 0x50;
  471. /*
  472. * before timeout?
  473. */
  474. if (time_before(jiffies, timeout)) {
  475. if (flashdebug)
  476. printk(KERN_DEBUG "write_block: Retrying write at 0x%X)n",
  477. pWritePtr - FLASH_BASE);
  478. /*
  479. * no LED == waiting
  480. */
  481. leds_event(led_amber_off);
  482. /*
  483. * wait couple ms
  484. */
  485. msleep(10);
  486. /*
  487. * red LED == write
  488. */
  489. leds_event(led_red_on);
  490. goto WriteRetry;
  491. } else {
  492. printk(KERN_ERR "write_block: timeout at 0x%X\n",
  493. pWritePtr - FLASH_BASE);
  494. /*
  495. * return error -2
  496. */
  497. return -2;
  498. }
  499. }
  500. }
  501. /*
  502. * green LED == read/verify
  503. */
  504. leds_event(led_amber_off);
  505. leds_event(led_green_on);
  506. msleep(10);
  507. pWritePtr = (unsigned char *) ((unsigned int) (FLASH_BASE + p));
  508. for (offset = 0; offset < count; offset++) {
  509. char c, c1;
  510. if (__get_user(c, buf))
  511. return -EFAULT;
  512. buf++;
  513. if ((c1 = *pWritePtr++) != c) {
  514. printk(KERN_ERR "write_block: verify error at 0x%X (%02X!=%02X)\n",
  515. pWritePtr - FLASH_BASE, c1, c);
  516. return 0;
  517. }
  518. }
  519. return count;
  520. }
  521. static void kick_open(void)
  522. {
  523. unsigned long flags;
  524. /*
  525. * we want to write a bit pattern XXX1 to Xilinx to enable
  526. * the write gate, which will be open for about the next 2ms.
  527. */
  528. spin_lock_irqsave(&gpio_lock, flags);
  529. cpld_modify(1, 1);
  530. spin_unlock_irqrestore(&gpio_lock, flags);
  531. /*
  532. * let the ISA bus to catch on...
  533. */
  534. udelay(25);
  535. }
  536. static struct file_operations flash_fops =
  537. {
  538. .owner = THIS_MODULE,
  539. .llseek = flash_llseek,
  540. .read = flash_read,
  541. .write = flash_write,
  542. .ioctl = flash_ioctl,
  543. };
  544. static struct miscdevice flash_miscdev =
  545. {
  546. FLASH_MINOR,
  547. "nwflash",
  548. &flash_fops
  549. };
  550. static int __init nwflash_init(void)
  551. {
  552. int ret = -ENODEV;
  553. if (machine_is_netwinder()) {
  554. int id;
  555. FLASH_BASE = ioremap(DC21285_FLASH, KFLASH_SIZE4);
  556. if (!FLASH_BASE)
  557. goto out;
  558. id = get_flash_id();
  559. if ((id != KFLASH_ID) && (id != KFLASH_ID4)) {
  560. ret = -ENXIO;
  561. iounmap((void *)FLASH_BASE);
  562. printk("Flash: incorrect ID 0x%04X.\n", id);
  563. goto out;
  564. }
  565. printk("Flash ROM driver v.%s, flash device ID 0x%04X, size %d Mb.\n",
  566. NWFLASH_VERSION, id, gbFlashSize / (1024 * 1024));
  567. ret = misc_register(&flash_miscdev);
  568. if (ret < 0) {
  569. iounmap((void *)FLASH_BASE);
  570. }
  571. }
  572. out:
  573. return ret;
  574. }
  575. static void __exit nwflash_exit(void)
  576. {
  577. misc_deregister(&flash_miscdev);
  578. iounmap((void *)FLASH_BASE);
  579. }
  580. MODULE_LICENSE("GPL");
  581. module_param(flashdebug, bool, 0644);
  582. module_init(nwflash_init);
  583. module_exit(nwflash_exit);