i2ellis.h 22 KB

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  1. /*******************************************************************************
  2. *
  3. * (c) 1999 by Computone Corporation
  4. *
  5. ********************************************************************************
  6. *
  7. *
  8. * PACKAGE: Linux tty Device Driver for IntelliPort II family of multiport
  9. * serial I/O controllers.
  10. *
  11. * DESCRIPTION: Mainline code for the device driver
  12. *
  13. *******************************************************************************/
  14. //------------------------------------------------------------------------------
  15. // i2ellis.h
  16. //
  17. // IntelliPort-II and IntelliPort-IIEX
  18. //
  19. // Extremely
  20. // Low
  21. // Level
  22. // Interface
  23. // Services
  24. //
  25. // Structure Definitions and declarations for "ELLIS" service routines found in
  26. // i2ellis.c
  27. //
  28. // These routines are based on properties of the IntelliPort-II and -IIEX
  29. // hardware and bootstrap firmware, and are not sensitive to particular
  30. // conventions of any particular loadware.
  31. //
  32. // Unlike i2hw.h, which provides IRONCLAD hardware definitions, the material
  33. // here and in i2ellis.c is intended to provice a useful, but not required,
  34. // layer of insulation from the hardware specifics.
  35. //------------------------------------------------------------------------------
  36. #ifndef I2ELLIS_H /* To prevent multiple includes */
  37. #define I2ELLIS_H 1
  38. //------------------------------------------------
  39. // Revision History:
  40. //
  41. // 30 September 1991 MAG First Draft Started
  42. // 12 October 1991 ...continued...
  43. //
  44. // 20 December 1996 AKM Linux version
  45. //-------------------------------------------------
  46. //----------------------
  47. // Mandatory Includes:
  48. //----------------------
  49. #include <linux/config.h>
  50. #include "ip2types.h"
  51. #include "i2hw.h" // The hardware definitions
  52. //------------------------------------------
  53. // STAT_BOXIDS packets
  54. //------------------------------------------
  55. #define MAX_BOX 4
  56. typedef struct _bidStat
  57. {
  58. unsigned char bid_value[MAX_BOX];
  59. } bidStat, *bidStatPtr;
  60. // This packet is sent in response to a CMD_GET_BOXIDS bypass command. For -IIEX
  61. // boards, reports the hardware-specific "asynchronous resource register" on
  62. // each expansion box. Boxes not present report 0xff. For -II boards, the first
  63. // element contains 0x80 for 8-port, 0x40 for 4-port boards.
  64. // Box IDs aka ARR or Async Resource Register (more than you want to know)
  65. // 7 6 5 4 3 2 1 0
  66. // F F N N L S S S
  67. // =============================
  68. // F F - Product Family Designator
  69. // =====+++++++++++++++++++++++++++++++
  70. // 0 0 - Intelliport II EX / ISA-8
  71. // 1 0 - IntelliServer
  72. // 0 1 - SAC - Port Device (Intelliport III ??? )
  73. // =====+++++++++++++++++++++++++++++++++++++++
  74. // N N - Number of Ports
  75. // 0 0 - 8 (eight)
  76. // 0 1 - 4 (four)
  77. // 1 0 - 12 (twelve)
  78. // 1 1 - 16 (sixteen)
  79. // =++++++++++++++++++++++++++++++++++
  80. // L - LCD Display Module Present
  81. // 0 - No
  82. // 1 - LCD module present
  83. // =========+++++++++++++++++++++++++++++++++++++
  84. // S S S - Async Signals Supported Designator
  85. // 0 0 0 - 8dss, Mod DCE DB25 Female
  86. // 0 0 1 - 6dss, RJ-45
  87. // 0 1 0 - RS-232/422 dss, DB25 Female
  88. // 0 1 1 - RS-232/422 dss, separate 232/422 DB25 Female
  89. // 1 0 0 - 6dss, 921.6 I/F with ST654's
  90. // 1 0 1 - RS-423/232 8dss, RJ-45 10Pin
  91. // 1 1 0 - 6dss, Mod DCE DB25 Female
  92. // 1 1 1 - NO BOX PRESENT
  93. #define FF(c) ((c & 0xC0) >> 6)
  94. #define NN(c) ((c & 0x30) >> 4)
  95. #define L(c) ((c & 0x08) >> 3)
  96. #define SSS(c) (c & 0x07)
  97. #define BID_HAS_654(x) (SSS(x) == 0x04)
  98. #define BID_NO_BOX 0xff /* no box */
  99. #define BID_8PORT 0x80 /* IP2-8 port */
  100. #define BID_4PORT 0x81 /* IP2-4 port */
  101. #define BID_EXP_MASK 0x30 /* IP2-EX */
  102. #define BID_EXP_8PORT 0x00 /* 8, */
  103. #define BID_EXP_4PORT 0x10 /* 4, */
  104. #define BID_EXP_UNDEF 0x20 /* UNDEF, */
  105. #define BID_EXP_16PORT 0x30 /* 16, */
  106. #define BID_LCD_CTRL 0x08 /* LCD Controller */
  107. #define BID_LCD_NONE 0x00 /* - no controller present */
  108. #define BID_LCD_PRES 0x08 /* - controller present */
  109. #define BID_CON_MASK 0x07 /* - connector pinouts */
  110. #define BID_CON_DB25 0x00 /* - DB-25 F */
  111. #define BID_CON_RJ45 0x01 /* - rj45 */
  112. //------------------------------------------------------------------------------
  113. // i2eBordStr
  114. //
  115. // This structure contains all the information the ELLIS routines require in
  116. // dealing with a particular board.
  117. //------------------------------------------------------------------------------
  118. // There are some queues here which are guaranteed to never contain the entry
  119. // for a single channel twice. So they must be slightly larger to allow
  120. // unambiguous full/empty management
  121. //
  122. #define CH_QUEUE_SIZE ABS_MOST_PORTS+2
  123. typedef struct _i2eBordStr
  124. {
  125. porStr i2ePom; // Structure containing the power-on message.
  126. unsigned short i2ePomSize;
  127. // The number of bytes actually read if
  128. // different from sizeof i2ePom, indicates
  129. // there is an error!
  130. unsigned short i2eStartMail;
  131. // Contains whatever inbound mailbox data
  132. // present at startup. NO_MAIL_HERE indicates
  133. // nothing was present. No special
  134. // significance as of this writing, but may be
  135. // useful for diagnostic reasons.
  136. unsigned short i2eValid;
  137. // Indicates validity of the structure; if
  138. // i2eValid == I2E_MAGIC, then we can trust
  139. // the other fields. Some (especially
  140. // initialization) functions are good about
  141. // checking for validity. Many functions do
  142. // not, it being assumed that the larger
  143. // context assures we are using a valid
  144. // i2eBordStrPtr.
  145. unsigned short i2eError;
  146. // Used for returning an error condition from
  147. // several functions which use i2eBordStrPtr
  148. // as an argument.
  149. // Accelerators to characterize separate features of a board, derived from a
  150. // number of sources.
  151. unsigned short i2eFifoSize;
  152. // Always, the size of the FIFO. For
  153. // IntelliPort-II, always the same, for -IIEX
  154. // taken from the Power-On reset message.
  155. volatile
  156. unsigned short i2eFifoRemains;
  157. // Used during normal operation to indicate a
  158. // lower bound on the amount of data which
  159. // might be in the outbound fifo.
  160. unsigned char i2eFifoStyle;
  161. // Accelerator which tells which style (-II or
  162. // -IIEX) FIFO we are using.
  163. unsigned char i2eDataWidth16;
  164. // Accelerator which tells whether we should
  165. // do 8 or 16-bit data transfers.
  166. unsigned char i2eMaxIrq;
  167. // The highest allowable IRQ, based on the
  168. // slot size.
  169. unsigned char i2eChangeIrq;
  170. // Whether tis valid to change IRQ's
  171. // ISA = ok, EISA, MicroChannel, no
  172. // Accelerators for various addresses on the board
  173. int i2eBase; // I/O Address of the Board
  174. int i2eData; // From here data transfers happen
  175. int i2eStatus; // From here status reads happen
  176. int i2ePointer; // (IntelliPort-II: pointer/commands)
  177. int i2eXMail; // (IntelliPOrt-IIEX: mailboxes
  178. int i2eXMask; // (IntelliPort-IIEX: mask write
  179. //-------------------------------------------------------
  180. // Information presented in a common format across boards
  181. // For each box, bit map of the channels present. Box closest to
  182. // the host is box 0. LSB is channel 0. IntelliPort-II (non-expandable)
  183. // is taken to be box 0. These are derived from product i.d. registers.
  184. unsigned short i2eChannelMap[ABS_MAX_BOXES];
  185. // Same as above, except each is derived from firmware attempting to detect
  186. // the uart presence (by reading a valid GFRCR register). If bits are set in
  187. // i2eChannelMap and not in i2eGoodMap, there is a potential problem.
  188. unsigned short i2eGoodMap[ABS_MAX_BOXES];
  189. // ---------------------------
  190. // For indirect function calls
  191. // Routine to cause an N-millisecond delay: Patched by the ii2Initialize
  192. // function.
  193. void (*i2eDelay)(unsigned int);
  194. // Routine to write N bytes to the board through the FIFO. Returns true if
  195. // all copacetic, otherwise returns false and error is in i2eError field.
  196. // IF COUNT IS ODD, ROUNDS UP TO THE NEXT EVEN NUMBER.
  197. int (*i2eWriteBuf)(struct _i2eBordStr *, unsigned char *, int);
  198. // Routine to read N bytes from the board through the FIFO. Returns true if
  199. // copacetic, otherwise returns false and error in i2eError.
  200. // IF COUNT IS ODD, ROUNDS UP TO THE NEXT EVEN NUMBER.
  201. int (*i2eReadBuf)(struct _i2eBordStr *, unsigned char *, int);
  202. // Returns a word from FIFO. Will use 2 byte operations if needed.
  203. unsigned short (*i2eReadWord)(struct _i2eBordStr *);
  204. // Writes a word to FIFO. Will use 2 byte operations if needed.
  205. void (*i2eWriteWord)(struct _i2eBordStr *, unsigned short);
  206. // Waits specified time for the Transmit FIFO to go empty. Returns true if
  207. // ok, otherwise returns false and error in i2eError.
  208. int (*i2eWaitForTxEmpty)(struct _i2eBordStr *, int);
  209. // Returns true or false according to whether the outgoing mailbox is empty.
  210. int (*i2eTxMailEmpty)(struct _i2eBordStr *);
  211. // Checks whether outgoing mailbox is empty. If so, sends mail and returns
  212. // true. Otherwise returns false.
  213. int (*i2eTrySendMail)(struct _i2eBordStr *, unsigned char);
  214. // If no mail available, returns NO_MAIL_HERE, else returns the value in the
  215. // mailbox (guaranteed can't be NO_MAIL_HERE).
  216. unsigned short (*i2eGetMail)(struct _i2eBordStr *);
  217. // Enables the board to interrupt the host when it writes to the mailbox.
  218. // Irqs will not occur, however, until the loadware separately enables
  219. // interrupt generation to the host. The standard loadware does this in
  220. // response to a command packet sent by the host. (Also, disables
  221. // any other potential interrupt sources from the board -- other than the
  222. // inbound mailbox).
  223. void (*i2eEnableMailIrq)(struct _i2eBordStr *);
  224. // Writes an arbitrary value to the mask register.
  225. void (*i2eWriteMask)(struct _i2eBordStr *, unsigned char);
  226. // State information
  227. // During downloading, indicates the number of blocks remaining to download
  228. // to the board.
  229. short i2eToLoad;
  230. // State of board (see manifests below) (e.g., whether in reset condition,
  231. // whether standard loadware is installed, etc.
  232. unsigned char i2eState;
  233. // These three fields are only valid when there is loadware running on the
  234. // board. (i2eState == II_STATE_LOADED or i2eState == II_STATE_STDLOADED )
  235. unsigned char i2eLVersion; // Loadware version
  236. unsigned char i2eLRevision; // Loadware revision
  237. unsigned char i2eLSub; // Loadware subrevision
  238. // Flags which only have meaning in the context of the standard loadware.
  239. // Somewhat violates the layering concept, but there is so little additional
  240. // needed at the board level (while much additional at the channel level),
  241. // that this beats maintaining two different per-board structures.
  242. // Indicates which IRQ the board has been initialized (from software) to use
  243. // For MicroChannel boards, any value different from IRQ_UNDEFINED means
  244. // that the software command has been sent to enable interrupts (or specify
  245. // they are disabled). Special value: IRQ_UNDEFINED indicates that the
  246. // software command to select the interrupt has not yet been sent, therefore
  247. // (since the standard loadware insists that it be sent before any other
  248. // packets are sent) no other packets should be sent yet.
  249. unsigned short i2eUsingIrq;
  250. // This is set when we hit the MB_OUT_STUFFED mailbox, which prevents us
  251. // putting more in the mailbox until an appropriate mailbox message is
  252. // received.
  253. unsigned char i2eWaitingForEmptyFifo;
  254. // Any mailbox bits waiting to be sent to the board are OR'ed in here.
  255. unsigned char i2eOutMailWaiting;
  256. // The head of any incoming packet is read into here, is then examined and
  257. // we dispatch accordingly.
  258. unsigned short i2eLeadoffWord[1];
  259. // Running counter of interrupts where the mailbox indicated incoming data.
  260. unsigned short i2eFifoInInts;
  261. // Running counter of interrupts where the mailbox indicated outgoing data
  262. // had been stripped.
  263. unsigned short i2eFifoOutInts;
  264. // If not void, gives the address of a routine to call if fatal board error
  265. // is found (only applies to standard l/w).
  266. void (*i2eFatalTrap)(struct _i2eBordStr *);
  267. // Will point to an array of some sort of channel structures (whose format
  268. // is unknown at this level, being a function of what loadware is
  269. // installed and the code configuration (max sizes of buffers, etc.)).
  270. void *i2eChannelPtr;
  271. // Set indicates that the board has gone fatal.
  272. unsigned short i2eFatal;
  273. // The number of elements pointed to by i2eChannelPtr.
  274. unsigned short i2eChannelCnt;
  275. // Ring-buffers of channel structures whose channels have particular needs.
  276. rwlock_t Fbuf_spinlock;
  277. volatile
  278. unsigned short i2Fbuf_strip; // Strip index
  279. volatile
  280. unsigned short i2Fbuf_stuff; // Stuff index
  281. void *i2Fbuf[CH_QUEUE_SIZE]; // An array of channel pointers
  282. // of channels who need to send
  283. // flow control packets.
  284. rwlock_t Dbuf_spinlock;
  285. volatile
  286. unsigned short i2Dbuf_strip; // Strip index
  287. volatile
  288. unsigned short i2Dbuf_stuff; // Stuff index
  289. void *i2Dbuf[CH_QUEUE_SIZE]; // An array of channel pointers
  290. // of channels who need to send
  291. // data or in-line command packets.
  292. rwlock_t Bbuf_spinlock;
  293. volatile
  294. unsigned short i2Bbuf_strip; // Strip index
  295. volatile
  296. unsigned short i2Bbuf_stuff; // Stuff index
  297. void *i2Bbuf[CH_QUEUE_SIZE]; // An array of channel pointers
  298. // of channels who need to send
  299. // bypass command packets.
  300. /*
  301. * A set of flags to indicate that certain events have occurred on at least
  302. * one of the ports on this board. We use this to decide whether to spin
  303. * through the channels looking for breaks, etc.
  304. */
  305. int got_input;
  306. int status_change;
  307. bidStat channelBtypes;
  308. /*
  309. * Debugging counters, etc.
  310. */
  311. unsigned long debugFlowQueued;
  312. unsigned long debugInlineQueued;
  313. unsigned long debugDataQueued;
  314. unsigned long debugBypassQueued;
  315. unsigned long debugFlowCount;
  316. unsigned long debugInlineCount;
  317. unsigned long debugBypassCount;
  318. rwlock_t read_fifo_spinlock;
  319. rwlock_t write_fifo_spinlock;
  320. // For queuing interrupt bottom half handlers. /\/\|=mhw=|\/\/
  321. struct work_struct tqueue_interrupt;
  322. struct timer_list SendPendingTimer; // Used by iiSendPending
  323. unsigned int SendPendingRetry;
  324. } i2eBordStr, *i2eBordStrPtr;
  325. //-------------------------------------------------------------------
  326. // Macro Definitions for the indirect calls defined in the i2eBordStr
  327. //-------------------------------------------------------------------
  328. //
  329. #define iiDelay(a,b) (*(a)->i2eDelay)(b)
  330. #define iiWriteBuf(a,b,c) (*(a)->i2eWriteBuf)(a,b,c)
  331. #define iiReadBuf(a,b,c) (*(a)->i2eReadBuf)(a,b,c)
  332. #define iiWriteWord(a,b) (*(a)->i2eWriteWord)(a,b)
  333. #define iiReadWord(a) (*(a)->i2eReadWord)(a)
  334. #define iiWaitForTxEmpty(a,b) (*(a)->i2eWaitForTxEmpty)(a,b)
  335. #define iiTxMailEmpty(a) (*(a)->i2eTxMailEmpty)(a)
  336. #define iiTrySendMail(a,b) (*(a)->i2eTrySendMail)(a,b)
  337. #define iiGetMail(a) (*(a)->i2eGetMail)(a)
  338. #define iiEnableMailIrq(a) (*(a)->i2eEnableMailIrq)(a)
  339. #define iiDisableMailIrq(a) (*(a)->i2eWriteMask)(a,0)
  340. #define iiWriteMask(a,b) (*(a)->i2eWriteMask)(a,b)
  341. //-------------------------------------------
  342. // Manifests for i2eBordStr:
  343. //-------------------------------------------
  344. #define YES 1
  345. #define NO 0
  346. #define NULLFUNC (void (*)(void))0
  347. #define NULLPTR (void *)0
  348. typedef void (*delayFunc_t)(unsigned int);
  349. // i2eValid
  350. //
  351. #define I2E_MAGIC 0x4251 // Structure is valid.
  352. #define I2E_INCOMPLETE 0x1122 // Structure failed during init.
  353. // i2eError
  354. //
  355. #define I2EE_GOOD 0 // Operation successful
  356. #define I2EE_BADADDR 1 // Address out of range
  357. #define I2EE_BADSTATE 2 // Attempt to perform a function when the board
  358. // structure was in the incorrect state
  359. #define I2EE_BADMAGIC 3 // Bad magic number from Power On test (i2ePomSize
  360. // reflects what was read
  361. #define I2EE_PORM_SHORT 4 // Power On message too short
  362. #define I2EE_PORM_LONG 5 // Power On message too long
  363. #define I2EE_BAD_FAMILY 6 // Un-supported board family type
  364. #define I2EE_INCONSIST 7 // Firmware reports something impossible,
  365. // e.g. unexpected number of ports... Almost no
  366. // excuse other than bad FIFO...
  367. #define I2EE_POSTERR 8 // Power-On self test reported a bad error
  368. #define I2EE_BADBUS 9 // Unknown Bus type declared in message
  369. #define I2EE_TXE_TIME 10 // Timed out waiting for TX Fifo to empty
  370. #define I2EE_INVALID 11 // i2eValid field does not indicate a valid and
  371. // complete board structure (for functions which
  372. // require this be so.)
  373. #define I2EE_BAD_PORT 12 // Discrepancy between channels actually found and
  374. // what the product is supposed to have. Check
  375. // i2eGoodMap vs i2eChannelMap for details.
  376. #define I2EE_BAD_IRQ 13 // Someone specified an unsupported IRQ
  377. #define I2EE_NOCHANNELS 14 // No channel structures have been defined (for
  378. // functions requiring this).
  379. // i2eFifoStyle
  380. //
  381. #define FIFO_II 0 /* IntelliPort-II style: see also i2hw.h */
  382. #define FIFO_IIEX 1 /* IntelliPort-IIEX style */
  383. // i2eGetMail
  384. //
  385. #define NO_MAIL_HERE 0x1111 // Since mail is unsigned char, cannot possibly
  386. // promote to 0x1111.
  387. // i2eState
  388. //
  389. #define II_STATE_COLD 0 // Addresses have been defined, but board not even
  390. // reset yet.
  391. #define II_STATE_RESET 1 // Board,if it exists, has just been reset
  392. #define II_STATE_READY 2 // Board ready for its first block
  393. #define II_STATE_LOADING 3 // Board continuing load
  394. #define II_STATE_LOADED 4 // Board has finished load: status ok
  395. #define II_STATE_BADLOAD 5 // Board has finished load: failed!
  396. #define II_STATE_STDLOADED 6 // Board has finished load: standard firmware
  397. // i2eUsingIrq
  398. //
  399. #define IRQ_UNDEFINED 0x1352 // No valid irq (or polling = 0) can ever
  400. // promote to this!
  401. //------------------------------------------
  402. // Handy Macros for i2ellis.c and others
  403. // Note these are common to -II and -IIEX
  404. //------------------------------------------
  405. // Given a pointer to the board structure, does the input FIFO have any data or
  406. // not?
  407. //
  408. #define HAS_INPUT(pB) !(INB(pB->i2eStatus) & ST_IN_EMPTY)
  409. #define HAS_NO_INPUT(pB) (INB(pB->i2eStatus) & ST_IN_EMPTY)
  410. // Given a pointer to board structure, read a byte or word from the fifo
  411. //
  412. #define BYTE_FROM(pB) (unsigned char)INB(pB->i2eData)
  413. #define WORD_FROM(pB) (unsigned short)INW(pB->i2eData)
  414. // Given a pointer to board structure, is there room for any data to be written
  415. // to the data fifo?
  416. //
  417. #define HAS_OUTROOM(pB) !(INB(pB->i2eStatus) & ST_OUT_FULL)
  418. #define HAS_NO_OUTROOM(pB) (INB(pB->i2eStatus) & ST_OUT_FULL)
  419. // Given a pointer to board structure, write a single byte to the fifo
  420. // structure. Note that for 16-bit interfaces, the high order byte is undefined
  421. // and unknown.
  422. //
  423. #define BYTE_TO(pB, c) OUTB(pB->i2eData,(c))
  424. // Write a word to the fifo structure. For 8-bit interfaces, this may have
  425. // unknown results.
  426. //
  427. #define WORD_TO(pB, c) OUTW(pB->i2eData,(c))
  428. // Given a pointer to the board structure, is there anything in the incoming
  429. // mailbox?
  430. //
  431. #define HAS_MAIL(pB) (INB(pB->i2eStatus) & ST_IN_MAIL)
  432. #define UPDATE_FIFO_ROOM(pB) (pB)->i2eFifoRemains=(pB)->i2eFifoSize
  433. // Handy macro to round up a number (like the buffer write and read routines do)
  434. //
  435. #define ROUNDUP(number) (((number)+1) & (~1))
  436. //------------------------------------------
  437. // Function Declarations for i2ellis.c
  438. //------------------------------------------
  439. //
  440. // Functions called directly
  441. //
  442. // Initialization of a board & structure is in four (five!) parts:
  443. //
  444. // 0) iiEllisInit() - Initialize iiEllis subsystem.
  445. // 1) iiSetAddress() - Define the board address & delay function for a board.
  446. // 2) iiReset() - Reset the board (provided it exists)
  447. // -- Note you may do this to several boards --
  448. // 3) iiResetDelay() - Delay for 2 seconds (once for all boards)
  449. // 4) iiInitialize() - Attempt to read Power-up message; further initialize
  450. // accelerators
  451. //
  452. // Then you may use iiDownloadAll() or iiDownloadFile() (in i2file.c) to write
  453. // loadware. To change loadware, you must begin again with step 2, resetting
  454. // the board again (step 1 not needed).
  455. static void iiEllisInit(void);
  456. static int iiSetAddress(i2eBordStrPtr, int, delayFunc_t );
  457. static int iiReset(i2eBordStrPtr);
  458. static int iiResetDelay(i2eBordStrPtr);
  459. static int iiInitialize(i2eBordStrPtr);
  460. // Routine to validate that all channels expected are there.
  461. //
  462. extern int iiValidateChannels(i2eBordStrPtr);
  463. // Routine used to download a block of loadware.
  464. //
  465. static int iiDownloadBlock(i2eBordStrPtr, loadHdrStrPtr, int);
  466. // Return values given by iiDownloadBlock, iiDownloadAll, iiDownloadFile:
  467. //
  468. #define II_DOWN_BADVALID 0 // board structure is invalid
  469. #define II_DOWN_CONTINUING 1 // So far, so good, firmware expects more
  470. #define II_DOWN_GOOD 2 // Download complete, CRC good
  471. #define II_DOWN_BAD 3 // Download complete, but CRC bad
  472. #define II_DOWN_BADFILE 4 // Bad magic number in loadware file
  473. #define II_DOWN_BADSTATE 5 // Board is in an inappropriate state for
  474. // downloading loadware. (see i2eState)
  475. #define II_DOWN_TIMEOUT 6 // Timeout waiting for firmware
  476. #define II_DOWN_OVER 7 // Too much data
  477. #define II_DOWN_UNDER 8 // Not enough data
  478. #define II_DOWN_NOFILE 9 // Loadware file not found
  479. // Routine to download an entire loadware module: Return values are a subset of
  480. // iiDownloadBlock's, excluding, of course, II_DOWN_CONTINUING
  481. //
  482. static int iiDownloadAll(i2eBordStrPtr, loadHdrStrPtr, int, int);
  483. // Called indirectly always. Needed externally so the routine might be
  484. // SPECIFIED as an argument to iiReset()
  485. //
  486. //static void ii2DelayIO(unsigned int); // N-millisecond delay using
  487. //hardware spin
  488. //static void ii2DelayTimer(unsigned int); // N-millisecond delay using Linux
  489. //timer
  490. // Many functions defined here return True if good, False otherwise, with an
  491. // error code in i2eError field. Here is a handy macro for setting the error
  492. // code and returning.
  493. //
  494. #define COMPLETE(pB,code) \
  495. if(1){ \
  496. pB->i2eError = code; \
  497. return (code == I2EE_GOOD);\
  498. }
  499. #endif // I2ELLIS_H