nicstar.c 88 KB

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  1. /******************************************************************************
  2. *
  3. * nicstar.c
  4. *
  5. * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
  6. *
  7. * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
  8. * It was taken from the frle-0.22 device driver.
  9. * As the file doesn't have a copyright notice, in the file
  10. * nicstarmac.copyright I put the copyright notice from the
  11. * frle-0.22 device driver.
  12. * Some code is based on the nicstar driver by M. Welsh.
  13. *
  14. * Author: Rui Prior (rprior@inescn.pt)
  15. * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
  16. *
  17. *
  18. * (C) INESC 1999
  19. *
  20. *
  21. ******************************************************************************/
  22. /**** IMPORTANT INFORMATION ***************************************************
  23. *
  24. * There are currently three types of spinlocks:
  25. *
  26. * 1 - Per card interrupt spinlock (to protect structures and such)
  27. * 2 - Per SCQ scq spinlock
  28. * 3 - Per card resource spinlock (to access registers, etc.)
  29. *
  30. * These must NEVER be grabbed in reverse order.
  31. *
  32. ******************************************************************************/
  33. /* Header files ***************************************************************/
  34. #include <linux/module.h>
  35. #include <linux/config.h>
  36. #include <linux/kernel.h>
  37. #include <linux/skbuff.h>
  38. #include <linux/atmdev.h>
  39. #include <linux/atm.h>
  40. #include <linux/pci.h>
  41. #include <linux/types.h>
  42. #include <linux/string.h>
  43. #include <linux/delay.h>
  44. #include <linux/init.h>
  45. #include <linux/sched.h>
  46. #include <linux/timer.h>
  47. #include <linux/interrupt.h>
  48. #include <linux/bitops.h>
  49. #include <asm/io.h>
  50. #include <asm/uaccess.h>
  51. #include <asm/atomic.h>
  52. #include "nicstar.h"
  53. #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
  54. #include "suni.h"
  55. #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
  56. #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
  57. #include "idt77105.h"
  58. #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
  59. #if BITS_PER_LONG != 32
  60. # error FIXME: this driver requires a 32-bit platform
  61. #endif
  62. /* Additional code ************************************************************/
  63. #include "nicstarmac.c"
  64. /* Configurable parameters ****************************************************/
  65. #undef PHY_LOOPBACK
  66. #undef TX_DEBUG
  67. #undef RX_DEBUG
  68. #undef GENERAL_DEBUG
  69. #undef EXTRA_DEBUG
  70. #undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know
  71. you're going to use only raw ATM */
  72. /* Do not touch these *********************************************************/
  73. #ifdef TX_DEBUG
  74. #define TXPRINTK(args...) printk(args)
  75. #else
  76. #define TXPRINTK(args...)
  77. #endif /* TX_DEBUG */
  78. #ifdef RX_DEBUG
  79. #define RXPRINTK(args...) printk(args)
  80. #else
  81. #define RXPRINTK(args...)
  82. #endif /* RX_DEBUG */
  83. #ifdef GENERAL_DEBUG
  84. #define PRINTK(args...) printk(args)
  85. #else
  86. #define PRINTK(args...)
  87. #endif /* GENERAL_DEBUG */
  88. #ifdef EXTRA_DEBUG
  89. #define XPRINTK(args...) printk(args)
  90. #else
  91. #define XPRINTK(args...)
  92. #endif /* EXTRA_DEBUG */
  93. /* Macros *********************************************************************/
  94. #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
  95. #define NS_DELAY mdelay(1)
  96. #define ALIGN_BUS_ADDR(addr, alignment) \
  97. ((((u32) (addr)) + (((u32) (alignment)) - 1)) & ~(((u32) (alignment)) - 1))
  98. #define ALIGN_ADDRESS(addr, alignment) \
  99. bus_to_virt(ALIGN_BUS_ADDR(virt_to_bus(addr), alignment))
  100. #undef CEIL
  101. #ifndef ATM_SKB
  102. #define ATM_SKB(s) (&(s)->atm)
  103. #endif
  104. /* Spinlock debugging stuff */
  105. #ifdef NS_DEBUG_SPINLOCKS /* See nicstar.h */
  106. #define ns_grab_int_lock(card,flags) \
  107. do { \
  108. unsigned long nsdsf, nsdsf2; \
  109. local_irq_save(flags); \
  110. save_flags(nsdsf); cli();\
  111. if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
  112. (flags)&(1<<9)?"en":"dis"); \
  113. if (spin_is_locked(&(card)->int_lock) && \
  114. (card)->cpu_int == smp_processor_id()) { \
  115. printk("nicstar.c: line %d (cpu %d) int_lock already locked at line %d (cpu %d)\n", \
  116. __LINE__, smp_processor_id(), (card)->has_int_lock, \
  117. (card)->cpu_int); \
  118. printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
  119. } \
  120. if (spin_is_locked(&(card)->res_lock) && \
  121. (card)->cpu_res == smp_processor_id()) { \
  122. printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying int)\n", \
  123. __LINE__, smp_processor_id(), (card)->has_res_lock, \
  124. (card)->cpu_res); \
  125. printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
  126. } \
  127. spin_lock_irq(&(card)->int_lock); \
  128. (card)->has_int_lock = __LINE__; \
  129. (card)->cpu_int = smp_processor_id(); \
  130. restore_flags(nsdsf); } while (0)
  131. #define ns_grab_res_lock(card,flags) \
  132. do { \
  133. unsigned long nsdsf, nsdsf2; \
  134. local_irq_save(flags); \
  135. save_flags(nsdsf); cli();\
  136. if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
  137. (flags)&(1<<9)?"en":"dis"); \
  138. if (spin_is_locked(&(card)->res_lock) && \
  139. (card)->cpu_res == smp_processor_id()) { \
  140. printk("nicstar.c: line %d (cpu %d) res_lock already locked at line %d (cpu %d)\n", \
  141. __LINE__, smp_processor_id(), (card)->has_res_lock, \
  142. (card)->cpu_res); \
  143. printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
  144. } \
  145. spin_lock_irq(&(card)->res_lock); \
  146. (card)->has_res_lock = __LINE__; \
  147. (card)->cpu_res = smp_processor_id(); \
  148. restore_flags(nsdsf); } while (0)
  149. #define ns_grab_scq_lock(card,scq,flags) \
  150. do { \
  151. unsigned long nsdsf, nsdsf2; \
  152. local_irq_save(flags); \
  153. save_flags(nsdsf); cli();\
  154. if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
  155. (flags)&(1<<9)?"en":"dis"); \
  156. if (spin_is_locked(&(scq)->lock) && \
  157. (scq)->cpu_lock == smp_processor_id()) { \
  158. printk("nicstar.c: line %d (cpu %d) this scq_lock already locked at line %d (cpu %d)\n", \
  159. __LINE__, smp_processor_id(), (scq)->has_lock, \
  160. (scq)->cpu_lock); \
  161. printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
  162. } \
  163. if (spin_is_locked(&(card)->res_lock) && \
  164. (card)->cpu_res == smp_processor_id()) { \
  165. printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying scq)\n", \
  166. __LINE__, smp_processor_id(), (card)->has_res_lock, \
  167. (card)->cpu_res); \
  168. printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
  169. } \
  170. spin_lock_irq(&(scq)->lock); \
  171. (scq)->has_lock = __LINE__; \
  172. (scq)->cpu_lock = smp_processor_id(); \
  173. restore_flags(nsdsf); } while (0)
  174. #else /* !NS_DEBUG_SPINLOCKS */
  175. #define ns_grab_int_lock(card,flags) \
  176. spin_lock_irqsave(&(card)->int_lock,(flags))
  177. #define ns_grab_res_lock(card,flags) \
  178. spin_lock_irqsave(&(card)->res_lock,(flags))
  179. #define ns_grab_scq_lock(card,scq,flags) \
  180. spin_lock_irqsave(&(scq)->lock,flags)
  181. #endif /* NS_DEBUG_SPINLOCKS */
  182. /* Function declarations ******************************************************/
  183. static u32 ns_read_sram(ns_dev *card, u32 sram_address);
  184. static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count);
  185. static int __devinit ns_init_card(int i, struct pci_dev *pcidev);
  186. static void __devinit ns_init_card_error(ns_dev *card, int error);
  187. static scq_info *get_scq(int size, u32 scd);
  188. static void free_scq(scq_info *scq, struct atm_vcc *vcc);
  189. static void push_rxbufs(ns_dev *, struct sk_buff *);
  190. static irqreturn_t ns_irq_handler(int irq, void *dev_id, struct pt_regs *regs);
  191. static int ns_open(struct atm_vcc *vcc);
  192. static void ns_close(struct atm_vcc *vcc);
  193. static void fill_tst(ns_dev *card, int n, vc_map *vc);
  194. static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
  195. static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
  196. struct sk_buff *skb);
  197. static void process_tsq(ns_dev *card);
  198. static void drain_scq(ns_dev *card, scq_info *scq, int pos);
  199. static void process_rsq(ns_dev *card);
  200. static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe);
  201. #ifdef NS_USE_DESTRUCTORS
  202. static void ns_sb_destructor(struct sk_buff *sb);
  203. static void ns_lb_destructor(struct sk_buff *lb);
  204. static void ns_hb_destructor(struct sk_buff *hb);
  205. #endif /* NS_USE_DESTRUCTORS */
  206. static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb);
  207. static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count);
  208. static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb);
  209. static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb);
  210. static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb);
  211. static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page);
  212. static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg);
  213. static void which_list(ns_dev *card, struct sk_buff *skb);
  214. static void ns_poll(unsigned long arg);
  215. static int ns_parse_mac(char *mac, unsigned char *esi);
  216. static short ns_h2i(char c);
  217. static void ns_phy_put(struct atm_dev *dev, unsigned char value,
  218. unsigned long addr);
  219. static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
  220. /* Global variables ***********************************************************/
  221. static struct ns_dev *cards[NS_MAX_CARDS];
  222. static unsigned num_cards;
  223. static struct atmdev_ops atm_ops =
  224. {
  225. .open = ns_open,
  226. .close = ns_close,
  227. .ioctl = ns_ioctl,
  228. .send = ns_send,
  229. .phy_put = ns_phy_put,
  230. .phy_get = ns_phy_get,
  231. .proc_read = ns_proc_read,
  232. .owner = THIS_MODULE,
  233. };
  234. static struct timer_list ns_timer;
  235. static char *mac[NS_MAX_CARDS];
  236. module_param_array(mac, charp, NULL, 0);
  237. MODULE_LICENSE("GPL");
  238. /* Functions*******************************************************************/
  239. static int __devinit nicstar_init_one(struct pci_dev *pcidev,
  240. const struct pci_device_id *ent)
  241. {
  242. static int index = -1;
  243. unsigned int error;
  244. index++;
  245. cards[index] = NULL;
  246. error = ns_init_card(index, pcidev);
  247. if (error) {
  248. cards[index--] = NULL; /* don't increment index */
  249. goto err_out;
  250. }
  251. return 0;
  252. err_out:
  253. return -ENODEV;
  254. }
  255. static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
  256. {
  257. int i, j;
  258. ns_dev *card = pci_get_drvdata(pcidev);
  259. struct sk_buff *hb;
  260. struct sk_buff *iovb;
  261. struct sk_buff *lb;
  262. struct sk_buff *sb;
  263. i = card->index;
  264. if (cards[i] == NULL)
  265. return;
  266. if (card->atmdev->phy && card->atmdev->phy->stop)
  267. card->atmdev->phy->stop(card->atmdev);
  268. /* Stop everything */
  269. writel(0x00000000, card->membase + CFG);
  270. /* De-register device */
  271. atm_dev_deregister(card->atmdev);
  272. /* Disable PCI device */
  273. pci_disable_device(pcidev);
  274. /* Free up resources */
  275. j = 0;
  276. PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
  277. while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
  278. {
  279. dev_kfree_skb_any(hb);
  280. j++;
  281. }
  282. PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
  283. j = 0;
  284. PRINTK("nicstar%d: freeing %d iovec buffers.\n", i, card->iovpool.count);
  285. while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
  286. {
  287. dev_kfree_skb_any(iovb);
  288. j++;
  289. }
  290. PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
  291. while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
  292. dev_kfree_skb_any(lb);
  293. while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
  294. dev_kfree_skb_any(sb);
  295. free_scq(card->scq0, NULL);
  296. for (j = 0; j < NS_FRSCD_NUM; j++)
  297. {
  298. if (card->scd2vc[j] != NULL)
  299. free_scq(card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
  300. }
  301. kfree(card->rsq.org);
  302. kfree(card->tsq.org);
  303. free_irq(card->pcidev->irq, card);
  304. iounmap(card->membase);
  305. kfree(card);
  306. }
  307. static struct pci_device_id nicstar_pci_tbl[] __devinitdata =
  308. {
  309. {PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77201,
  310. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  311. {0,} /* terminate list */
  312. };
  313. MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
  314. static struct pci_driver nicstar_driver = {
  315. .name = "nicstar",
  316. .id_table = nicstar_pci_tbl,
  317. .probe = nicstar_init_one,
  318. .remove = __devexit_p(nicstar_remove_one),
  319. };
  320. static int __init nicstar_init(void)
  321. {
  322. unsigned error = 0; /* Initialized to remove compile warning */
  323. XPRINTK("nicstar: nicstar_init() called.\n");
  324. error = pci_register_driver(&nicstar_driver);
  325. TXPRINTK("nicstar: TX debug enabled.\n");
  326. RXPRINTK("nicstar: RX debug enabled.\n");
  327. PRINTK("nicstar: General debug enabled.\n");
  328. #ifdef PHY_LOOPBACK
  329. printk("nicstar: using PHY loopback.\n");
  330. #endif /* PHY_LOOPBACK */
  331. XPRINTK("nicstar: nicstar_init() returned.\n");
  332. if (!error) {
  333. init_timer(&ns_timer);
  334. ns_timer.expires = jiffies + NS_POLL_PERIOD;
  335. ns_timer.data = 0UL;
  336. ns_timer.function = ns_poll;
  337. add_timer(&ns_timer);
  338. }
  339. return error;
  340. }
  341. static void __exit nicstar_cleanup(void)
  342. {
  343. XPRINTK("nicstar: nicstar_cleanup() called.\n");
  344. del_timer(&ns_timer);
  345. pci_unregister_driver(&nicstar_driver);
  346. XPRINTK("nicstar: nicstar_cleanup() returned.\n");
  347. }
  348. static u32 ns_read_sram(ns_dev *card, u32 sram_address)
  349. {
  350. unsigned long flags;
  351. u32 data;
  352. sram_address <<= 2;
  353. sram_address &= 0x0007FFFC; /* address must be dword aligned */
  354. sram_address |= 0x50000000; /* SRAM read command */
  355. ns_grab_res_lock(card, flags);
  356. while (CMD_BUSY(card));
  357. writel(sram_address, card->membase + CMD);
  358. while (CMD_BUSY(card));
  359. data = readl(card->membase + DR0);
  360. spin_unlock_irqrestore(&card->res_lock, flags);
  361. return data;
  362. }
  363. static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count)
  364. {
  365. unsigned long flags;
  366. int i, c;
  367. count--; /* count range now is 0..3 instead of 1..4 */
  368. c = count;
  369. c <<= 2; /* to use increments of 4 */
  370. ns_grab_res_lock(card, flags);
  371. while (CMD_BUSY(card));
  372. for (i = 0; i <= c; i += 4)
  373. writel(*(value++), card->membase + i);
  374. /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
  375. so card->membase + DR0 == card->membase */
  376. sram_address <<= 2;
  377. sram_address &= 0x0007FFFC;
  378. sram_address |= (0x40000000 | count);
  379. writel(sram_address, card->membase + CMD);
  380. spin_unlock_irqrestore(&card->res_lock, flags);
  381. }
  382. static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
  383. {
  384. int j;
  385. struct ns_dev *card = NULL;
  386. unsigned char pci_latency;
  387. unsigned error;
  388. u32 data;
  389. u32 u32d[4];
  390. u32 ns_cfg_rctsize;
  391. int bcount;
  392. unsigned long membase;
  393. error = 0;
  394. if (pci_enable_device(pcidev))
  395. {
  396. printk("nicstar%d: can't enable PCI device\n", i);
  397. error = 2;
  398. ns_init_card_error(card, error);
  399. return error;
  400. }
  401. if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL)
  402. {
  403. printk("nicstar%d: can't allocate memory for device structure.\n", i);
  404. error = 2;
  405. ns_init_card_error(card, error);
  406. return error;
  407. }
  408. cards[i] = card;
  409. spin_lock_init(&card->int_lock);
  410. spin_lock_init(&card->res_lock);
  411. pci_set_drvdata(pcidev, card);
  412. card->index = i;
  413. card->atmdev = NULL;
  414. card->pcidev = pcidev;
  415. membase = pci_resource_start(pcidev, 1);
  416. card->membase = ioremap(membase, NS_IOREMAP_SIZE);
  417. if (card->membase == 0)
  418. {
  419. printk("nicstar%d: can't ioremap() membase.\n",i);
  420. error = 3;
  421. ns_init_card_error(card, error);
  422. return error;
  423. }
  424. PRINTK("nicstar%d: membase at 0x%x.\n", i, card->membase);
  425. pci_set_master(pcidev);
  426. if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0)
  427. {
  428. printk("nicstar%d: can't read PCI latency timer.\n", i);
  429. error = 6;
  430. ns_init_card_error(card, error);
  431. return error;
  432. }
  433. #ifdef NS_PCI_LATENCY
  434. if (pci_latency < NS_PCI_LATENCY)
  435. {
  436. PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
  437. for (j = 1; j < 4; j++)
  438. {
  439. if (pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
  440. break;
  441. }
  442. if (j == 4)
  443. {
  444. printk("nicstar%d: can't set PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
  445. error = 7;
  446. ns_init_card_error(card, error);
  447. return error;
  448. }
  449. }
  450. #endif /* NS_PCI_LATENCY */
  451. /* Clear timer overflow */
  452. data = readl(card->membase + STAT);
  453. if (data & NS_STAT_TMROF)
  454. writel(NS_STAT_TMROF, card->membase + STAT);
  455. /* Software reset */
  456. writel(NS_CFG_SWRST, card->membase + CFG);
  457. NS_DELAY;
  458. writel(0x00000000, card->membase + CFG);
  459. /* PHY reset */
  460. writel(0x00000008, card->membase + GP);
  461. NS_DELAY;
  462. writel(0x00000001, card->membase + GP);
  463. NS_DELAY;
  464. while (CMD_BUSY(card));
  465. writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
  466. NS_DELAY;
  467. /* Detect PHY type */
  468. while (CMD_BUSY(card));
  469. writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
  470. while (CMD_BUSY(card));
  471. data = readl(card->membase + DR0);
  472. switch(data) {
  473. case 0x00000009:
  474. printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
  475. card->max_pcr = ATM_25_PCR;
  476. while(CMD_BUSY(card));
  477. writel(0x00000008, card->membase + DR0);
  478. writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
  479. /* Clear an eventual pending interrupt */
  480. writel(NS_STAT_SFBQF, card->membase + STAT);
  481. #ifdef PHY_LOOPBACK
  482. while(CMD_BUSY(card));
  483. writel(0x00000022, card->membase + DR0);
  484. writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
  485. #endif /* PHY_LOOPBACK */
  486. break;
  487. case 0x00000030:
  488. case 0x00000031:
  489. printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
  490. card->max_pcr = ATM_OC3_PCR;
  491. #ifdef PHY_LOOPBACK
  492. while(CMD_BUSY(card));
  493. writel(0x00000002, card->membase + DR0);
  494. writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
  495. #endif /* PHY_LOOPBACK */
  496. break;
  497. default:
  498. printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
  499. error = 8;
  500. ns_init_card_error(card, error);
  501. return error;
  502. }
  503. writel(0x00000000, card->membase + GP);
  504. /* Determine SRAM size */
  505. data = 0x76543210;
  506. ns_write_sram(card, 0x1C003, &data, 1);
  507. data = 0x89ABCDEF;
  508. ns_write_sram(card, 0x14003, &data, 1);
  509. if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
  510. ns_read_sram(card, 0x1C003) == 0x76543210)
  511. card->sram_size = 128;
  512. else
  513. card->sram_size = 32;
  514. PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
  515. card->rct_size = NS_MAX_RCTSIZE;
  516. #if (NS_MAX_RCTSIZE == 4096)
  517. if (card->sram_size == 128)
  518. printk("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n", i);
  519. #elif (NS_MAX_RCTSIZE == 16384)
  520. if (card->sram_size == 32)
  521. {
  522. printk("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n", i);
  523. card->rct_size = 4096;
  524. }
  525. #else
  526. #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
  527. #endif
  528. card->vpibits = NS_VPIBITS;
  529. if (card->rct_size == 4096)
  530. card->vcibits = 12 - NS_VPIBITS;
  531. else /* card->rct_size == 16384 */
  532. card->vcibits = 14 - NS_VPIBITS;
  533. /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
  534. if (mac[i] == NULL)
  535. nicstar_init_eprom(card->membase);
  536. if (request_irq(pcidev->irq, &ns_irq_handler, SA_INTERRUPT | SA_SHIRQ, "nicstar", card) != 0)
  537. {
  538. printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
  539. error = 9;
  540. ns_init_card_error(card, error);
  541. return error;
  542. }
  543. /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
  544. writel(0x00000000, card->membase + VPM);
  545. /* Initialize TSQ */
  546. card->tsq.org = kmalloc(NS_TSQSIZE + NS_TSQ_ALIGNMENT, GFP_KERNEL);
  547. if (card->tsq.org == NULL)
  548. {
  549. printk("nicstar%d: can't allocate TSQ.\n", i);
  550. error = 10;
  551. ns_init_card_error(card, error);
  552. return error;
  553. }
  554. card->tsq.base = (ns_tsi *) ALIGN_ADDRESS(card->tsq.org, NS_TSQ_ALIGNMENT);
  555. card->tsq.next = card->tsq.base;
  556. card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
  557. for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
  558. ns_tsi_init(card->tsq.base + j);
  559. writel(0x00000000, card->membase + TSQH);
  560. writel((u32) virt_to_bus(card->tsq.base), card->membase + TSQB);
  561. PRINTK("nicstar%d: TSQ base at 0x%x 0x%x 0x%x.\n", i, (u32) card->tsq.base,
  562. (u32) virt_to_bus(card->tsq.base), readl(card->membase + TSQB));
  563. /* Initialize RSQ */
  564. card->rsq.org = kmalloc(NS_RSQSIZE + NS_RSQ_ALIGNMENT, GFP_KERNEL);
  565. if (card->rsq.org == NULL)
  566. {
  567. printk("nicstar%d: can't allocate RSQ.\n", i);
  568. error = 11;
  569. ns_init_card_error(card, error);
  570. return error;
  571. }
  572. card->rsq.base = (ns_rsqe *) ALIGN_ADDRESS(card->rsq.org, NS_RSQ_ALIGNMENT);
  573. card->rsq.next = card->rsq.base;
  574. card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
  575. for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
  576. ns_rsqe_init(card->rsq.base + j);
  577. writel(0x00000000, card->membase + RSQH);
  578. writel((u32) virt_to_bus(card->rsq.base), card->membase + RSQB);
  579. PRINTK("nicstar%d: RSQ base at 0x%x.\n", i, (u32) card->rsq.base);
  580. /* Initialize SCQ0, the only VBR SCQ used */
  581. card->scq1 = NULL;
  582. card->scq2 = NULL;
  583. card->scq0 = get_scq(VBR_SCQSIZE, NS_VRSCD0);
  584. if (card->scq0 == NULL)
  585. {
  586. printk("nicstar%d: can't get SCQ0.\n", i);
  587. error = 12;
  588. ns_init_card_error(card, error);
  589. return error;
  590. }
  591. u32d[0] = (u32) virt_to_bus(card->scq0->base);
  592. u32d[1] = (u32) 0x00000000;
  593. u32d[2] = (u32) 0xffffffff;
  594. u32d[3] = (u32) 0x00000000;
  595. ns_write_sram(card, NS_VRSCD0, u32d, 4);
  596. ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
  597. ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
  598. card->scq0->scd = NS_VRSCD0;
  599. PRINTK("nicstar%d: VBR-SCQ0 base at 0x%x.\n", i, (u32) card->scq0->base);
  600. /* Initialize TSTs */
  601. card->tst_addr = NS_TST0;
  602. card->tst_free_entries = NS_TST_NUM_ENTRIES;
  603. data = NS_TST_OPCODE_VARIABLE;
  604. for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
  605. ns_write_sram(card, NS_TST0 + j, &data, 1);
  606. data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
  607. ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
  608. for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
  609. ns_write_sram(card, NS_TST1 + j, &data, 1);
  610. data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
  611. ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
  612. for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
  613. card->tste2vc[j] = NULL;
  614. writel(NS_TST0 << 2, card->membase + TSTB);
  615. /* Initialize RCT. AAL type is set on opening the VC. */
  616. #ifdef RCQ_SUPPORT
  617. u32d[0] = NS_RCTE_RAWCELLINTEN;
  618. #else
  619. u32d[0] = 0x00000000;
  620. #endif /* RCQ_SUPPORT */
  621. u32d[1] = 0x00000000;
  622. u32d[2] = 0x00000000;
  623. u32d[3] = 0xFFFFFFFF;
  624. for (j = 0; j < card->rct_size; j++)
  625. ns_write_sram(card, j * 4, u32d, 4);
  626. memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
  627. for (j = 0; j < NS_FRSCD_NUM; j++)
  628. card->scd2vc[j] = NULL;
  629. /* Initialize buffer levels */
  630. card->sbnr.min = MIN_SB;
  631. card->sbnr.init = NUM_SB;
  632. card->sbnr.max = MAX_SB;
  633. card->lbnr.min = MIN_LB;
  634. card->lbnr.init = NUM_LB;
  635. card->lbnr.max = MAX_LB;
  636. card->iovnr.min = MIN_IOVB;
  637. card->iovnr.init = NUM_IOVB;
  638. card->iovnr.max = MAX_IOVB;
  639. card->hbnr.min = MIN_HB;
  640. card->hbnr.init = NUM_HB;
  641. card->hbnr.max = MAX_HB;
  642. card->sm_handle = 0x00000000;
  643. card->sm_addr = 0x00000000;
  644. card->lg_handle = 0x00000000;
  645. card->lg_addr = 0x00000000;
  646. card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
  647. /* Pre-allocate some huge buffers */
  648. skb_queue_head_init(&card->hbpool.queue);
  649. card->hbpool.count = 0;
  650. for (j = 0; j < NUM_HB; j++)
  651. {
  652. struct sk_buff *hb;
  653. hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
  654. if (hb == NULL)
  655. {
  656. printk("nicstar%d: can't allocate %dth of %d huge buffers.\n",
  657. i, j, NUM_HB);
  658. error = 13;
  659. ns_init_card_error(card, error);
  660. return error;
  661. }
  662. NS_SKB_CB(hb)->buf_type = BUF_NONE;
  663. skb_queue_tail(&card->hbpool.queue, hb);
  664. card->hbpool.count++;
  665. }
  666. /* Allocate large buffers */
  667. skb_queue_head_init(&card->lbpool.queue);
  668. card->lbpool.count = 0; /* Not used */
  669. for (j = 0; j < NUM_LB; j++)
  670. {
  671. struct sk_buff *lb;
  672. lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
  673. if (lb == NULL)
  674. {
  675. printk("nicstar%d: can't allocate %dth of %d large buffers.\n",
  676. i, j, NUM_LB);
  677. error = 14;
  678. ns_init_card_error(card, error);
  679. return error;
  680. }
  681. NS_SKB_CB(lb)->buf_type = BUF_LG;
  682. skb_queue_tail(&card->lbpool.queue, lb);
  683. skb_reserve(lb, NS_SMBUFSIZE);
  684. push_rxbufs(card, lb);
  685. /* Due to the implementation of push_rxbufs() this is 1, not 0 */
  686. if (j == 1)
  687. {
  688. card->rcbuf = lb;
  689. card->rawch = (u32) virt_to_bus(lb->data);
  690. }
  691. }
  692. /* Test for strange behaviour which leads to crashes */
  693. if ((bcount = ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min)
  694. {
  695. printk("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
  696. i, j, bcount);
  697. error = 14;
  698. ns_init_card_error(card, error);
  699. return error;
  700. }
  701. /* Allocate small buffers */
  702. skb_queue_head_init(&card->sbpool.queue);
  703. card->sbpool.count = 0; /* Not used */
  704. for (j = 0; j < NUM_SB; j++)
  705. {
  706. struct sk_buff *sb;
  707. sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
  708. if (sb == NULL)
  709. {
  710. printk("nicstar%d: can't allocate %dth of %d small buffers.\n",
  711. i, j, NUM_SB);
  712. error = 15;
  713. ns_init_card_error(card, error);
  714. return error;
  715. }
  716. NS_SKB_CB(sb)->buf_type = BUF_SM;
  717. skb_queue_tail(&card->sbpool.queue, sb);
  718. skb_reserve(sb, NS_AAL0_HEADER);
  719. push_rxbufs(card, sb);
  720. }
  721. /* Test for strange behaviour which leads to crashes */
  722. if ((bcount = ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min)
  723. {
  724. printk("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
  725. i, j, bcount);
  726. error = 15;
  727. ns_init_card_error(card, error);
  728. return error;
  729. }
  730. /* Allocate iovec buffers */
  731. skb_queue_head_init(&card->iovpool.queue);
  732. card->iovpool.count = 0;
  733. for (j = 0; j < NUM_IOVB; j++)
  734. {
  735. struct sk_buff *iovb;
  736. iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
  737. if (iovb == NULL)
  738. {
  739. printk("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
  740. i, j, NUM_IOVB);
  741. error = 16;
  742. ns_init_card_error(card, error);
  743. return error;
  744. }
  745. NS_SKB_CB(iovb)->buf_type = BUF_NONE;
  746. skb_queue_tail(&card->iovpool.queue, iovb);
  747. card->iovpool.count++;
  748. }
  749. card->intcnt = 0;
  750. /* Configure NICStAR */
  751. if (card->rct_size == 4096)
  752. ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
  753. else /* (card->rct_size == 16384) */
  754. ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
  755. card->efbie = 1;
  756. /* Register device */
  757. card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL);
  758. if (card->atmdev == NULL)
  759. {
  760. printk("nicstar%d: can't register device.\n", i);
  761. error = 17;
  762. ns_init_card_error(card, error);
  763. return error;
  764. }
  765. if (ns_parse_mac(mac[i], card->atmdev->esi)) {
  766. nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
  767. card->atmdev->esi, 6);
  768. if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) == 0) {
  769. nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
  770. card->atmdev->esi, 6);
  771. }
  772. }
  773. printk("nicstar%d: MAC address %02X:%02X:%02X:%02X:%02X:%02X\n", i,
  774. card->atmdev->esi[0], card->atmdev->esi[1], card->atmdev->esi[2],
  775. card->atmdev->esi[3], card->atmdev->esi[4], card->atmdev->esi[5]);
  776. card->atmdev->dev_data = card;
  777. card->atmdev->ci_range.vpi_bits = card->vpibits;
  778. card->atmdev->ci_range.vci_bits = card->vcibits;
  779. card->atmdev->link_rate = card->max_pcr;
  780. card->atmdev->phy = NULL;
  781. #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
  782. if (card->max_pcr == ATM_OC3_PCR)
  783. suni_init(card->atmdev);
  784. #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
  785. #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
  786. if (card->max_pcr == ATM_25_PCR)
  787. idt77105_init(card->atmdev);
  788. #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
  789. if (card->atmdev->phy && card->atmdev->phy->start)
  790. card->atmdev->phy->start(card->atmdev);
  791. writel(NS_CFG_RXPATH |
  792. NS_CFG_SMBUFSIZE |
  793. NS_CFG_LGBUFSIZE |
  794. NS_CFG_EFBIE |
  795. NS_CFG_RSQSIZE |
  796. NS_CFG_VPIBITS |
  797. ns_cfg_rctsize |
  798. NS_CFG_RXINT_NODELAY |
  799. NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
  800. NS_CFG_RSQAFIE |
  801. NS_CFG_TXEN |
  802. NS_CFG_TXIE |
  803. NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
  804. NS_CFG_PHYIE,
  805. card->membase + CFG);
  806. num_cards++;
  807. return error;
  808. }
  809. static void __devinit ns_init_card_error(ns_dev *card, int error)
  810. {
  811. if (error >= 17)
  812. {
  813. writel(0x00000000, card->membase + CFG);
  814. }
  815. if (error >= 16)
  816. {
  817. struct sk_buff *iovb;
  818. while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
  819. dev_kfree_skb_any(iovb);
  820. }
  821. if (error >= 15)
  822. {
  823. struct sk_buff *sb;
  824. while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
  825. dev_kfree_skb_any(sb);
  826. free_scq(card->scq0, NULL);
  827. }
  828. if (error >= 14)
  829. {
  830. struct sk_buff *lb;
  831. while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
  832. dev_kfree_skb_any(lb);
  833. }
  834. if (error >= 13)
  835. {
  836. struct sk_buff *hb;
  837. while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
  838. dev_kfree_skb_any(hb);
  839. }
  840. if (error >= 12)
  841. {
  842. kfree(card->rsq.org);
  843. }
  844. if (error >= 11)
  845. {
  846. kfree(card->tsq.org);
  847. }
  848. if (error >= 10)
  849. {
  850. free_irq(card->pcidev->irq, card);
  851. }
  852. if (error >= 4)
  853. {
  854. iounmap(card->membase);
  855. }
  856. if (error >= 3)
  857. {
  858. pci_disable_device(card->pcidev);
  859. kfree(card);
  860. }
  861. }
  862. static scq_info *get_scq(int size, u32 scd)
  863. {
  864. scq_info *scq;
  865. int i;
  866. if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
  867. return NULL;
  868. scq = (scq_info *) kmalloc(sizeof(scq_info), GFP_KERNEL);
  869. if (scq == NULL)
  870. return NULL;
  871. scq->org = kmalloc(2 * size, GFP_KERNEL);
  872. if (scq->org == NULL)
  873. {
  874. kfree(scq);
  875. return NULL;
  876. }
  877. scq->skb = (struct sk_buff **) kmalloc(sizeof(struct sk_buff *) *
  878. (size / NS_SCQE_SIZE), GFP_KERNEL);
  879. if (scq->skb == NULL)
  880. {
  881. kfree(scq->org);
  882. kfree(scq);
  883. return NULL;
  884. }
  885. scq->num_entries = size / NS_SCQE_SIZE;
  886. scq->base = (ns_scqe *) ALIGN_ADDRESS(scq->org, size);
  887. scq->next = scq->base;
  888. scq->last = scq->base + (scq->num_entries - 1);
  889. scq->tail = scq->last;
  890. scq->scd = scd;
  891. scq->num_entries = size / NS_SCQE_SIZE;
  892. scq->tbd_count = 0;
  893. init_waitqueue_head(&scq->scqfull_waitq);
  894. scq->full = 0;
  895. spin_lock_init(&scq->lock);
  896. for (i = 0; i < scq->num_entries; i++)
  897. scq->skb[i] = NULL;
  898. return scq;
  899. }
  900. /* For variable rate SCQ vcc must be NULL */
  901. static void free_scq(scq_info *scq, struct atm_vcc *vcc)
  902. {
  903. int i;
  904. if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
  905. for (i = 0; i < scq->num_entries; i++)
  906. {
  907. if (scq->skb[i] != NULL)
  908. {
  909. vcc = ATM_SKB(scq->skb[i])->vcc;
  910. if (vcc->pop != NULL)
  911. vcc->pop(vcc, scq->skb[i]);
  912. else
  913. dev_kfree_skb_any(scq->skb[i]);
  914. }
  915. }
  916. else /* vcc must be != NULL */
  917. {
  918. if (vcc == NULL)
  919. {
  920. printk("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
  921. for (i = 0; i < scq->num_entries; i++)
  922. dev_kfree_skb_any(scq->skb[i]);
  923. }
  924. else
  925. for (i = 0; i < scq->num_entries; i++)
  926. {
  927. if (scq->skb[i] != NULL)
  928. {
  929. if (vcc->pop != NULL)
  930. vcc->pop(vcc, scq->skb[i]);
  931. else
  932. dev_kfree_skb_any(scq->skb[i]);
  933. }
  934. }
  935. }
  936. kfree(scq->skb);
  937. kfree(scq->org);
  938. kfree(scq);
  939. }
  940. /* The handles passed must be pointers to the sk_buff containing the small
  941. or large buffer(s) cast to u32. */
  942. static void push_rxbufs(ns_dev *card, struct sk_buff *skb)
  943. {
  944. struct ns_skb_cb *cb = NS_SKB_CB(skb);
  945. u32 handle1, addr1;
  946. u32 handle2, addr2;
  947. u32 stat;
  948. unsigned long flags;
  949. /* *BARF* */
  950. handle2 = addr2 = 0;
  951. handle1 = (u32)skb;
  952. addr1 = (u32)virt_to_bus(skb->data);
  953. #ifdef GENERAL_DEBUG
  954. if (!addr1)
  955. printk("nicstar%d: push_rxbufs called with addr1 = 0.\n", card->index);
  956. #endif /* GENERAL_DEBUG */
  957. stat = readl(card->membase + STAT);
  958. card->sbfqc = ns_stat_sfbqc_get(stat);
  959. card->lbfqc = ns_stat_lfbqc_get(stat);
  960. if (cb->buf_type == BUF_SM)
  961. {
  962. if (!addr2)
  963. {
  964. if (card->sm_addr)
  965. {
  966. addr2 = card->sm_addr;
  967. handle2 = card->sm_handle;
  968. card->sm_addr = 0x00000000;
  969. card->sm_handle = 0x00000000;
  970. }
  971. else /* (!sm_addr) */
  972. {
  973. card->sm_addr = addr1;
  974. card->sm_handle = handle1;
  975. }
  976. }
  977. }
  978. else /* buf_type == BUF_LG */
  979. {
  980. if (!addr2)
  981. {
  982. if (card->lg_addr)
  983. {
  984. addr2 = card->lg_addr;
  985. handle2 = card->lg_handle;
  986. card->lg_addr = 0x00000000;
  987. card->lg_handle = 0x00000000;
  988. }
  989. else /* (!lg_addr) */
  990. {
  991. card->lg_addr = addr1;
  992. card->lg_handle = handle1;
  993. }
  994. }
  995. }
  996. if (addr2)
  997. {
  998. if (cb->buf_type == BUF_SM)
  999. {
  1000. if (card->sbfqc >= card->sbnr.max)
  1001. {
  1002. skb_unlink((struct sk_buff *) handle1, &card->sbpool.queue);
  1003. dev_kfree_skb_any((struct sk_buff *) handle1);
  1004. skb_unlink((struct sk_buff *) handle2, &card->sbpool.queue);
  1005. dev_kfree_skb_any((struct sk_buff *) handle2);
  1006. return;
  1007. }
  1008. else
  1009. card->sbfqc += 2;
  1010. }
  1011. else /* (buf_type == BUF_LG) */
  1012. {
  1013. if (card->lbfqc >= card->lbnr.max)
  1014. {
  1015. skb_unlink((struct sk_buff *) handle1, &card->lbpool.queue);
  1016. dev_kfree_skb_any((struct sk_buff *) handle1);
  1017. skb_unlink((struct sk_buff *) handle2, &card->lbpool.queue);
  1018. dev_kfree_skb_any((struct sk_buff *) handle2);
  1019. return;
  1020. }
  1021. else
  1022. card->lbfqc += 2;
  1023. }
  1024. ns_grab_res_lock(card, flags);
  1025. while (CMD_BUSY(card));
  1026. writel(addr2, card->membase + DR3);
  1027. writel(handle2, card->membase + DR2);
  1028. writel(addr1, card->membase + DR1);
  1029. writel(handle1, card->membase + DR0);
  1030. writel(NS_CMD_WRITE_FREEBUFQ | cb->buf_type, card->membase + CMD);
  1031. spin_unlock_irqrestore(&card->res_lock, flags);
  1032. XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n", card->index,
  1033. (cb->buf_type == BUF_SM ? "small" : "large"), addr1, addr2);
  1034. }
  1035. if (!card->efbie && card->sbfqc >= card->sbnr.min &&
  1036. card->lbfqc >= card->lbnr.min)
  1037. {
  1038. card->efbie = 1;
  1039. writel((readl(card->membase + CFG) | NS_CFG_EFBIE), card->membase + CFG);
  1040. }
  1041. return;
  1042. }
  1043. static irqreturn_t ns_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
  1044. {
  1045. u32 stat_r;
  1046. ns_dev *card;
  1047. struct atm_dev *dev;
  1048. unsigned long flags;
  1049. card = (ns_dev *) dev_id;
  1050. dev = card->atmdev;
  1051. card->intcnt++;
  1052. PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
  1053. ns_grab_int_lock(card, flags);
  1054. stat_r = readl(card->membase + STAT);
  1055. /* Transmit Status Indicator has been written to T. S. Queue */
  1056. if (stat_r & NS_STAT_TSIF)
  1057. {
  1058. TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
  1059. process_tsq(card);
  1060. writel(NS_STAT_TSIF, card->membase + STAT);
  1061. }
  1062. /* Incomplete CS-PDU has been transmitted */
  1063. if (stat_r & NS_STAT_TXICP)
  1064. {
  1065. writel(NS_STAT_TXICP, card->membase + STAT);
  1066. TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
  1067. card->index);
  1068. }
  1069. /* Transmit Status Queue 7/8 full */
  1070. if (stat_r & NS_STAT_TSQF)
  1071. {
  1072. writel(NS_STAT_TSQF, card->membase + STAT);
  1073. PRINTK("nicstar%d: TSQ full.\n", card->index);
  1074. process_tsq(card);
  1075. }
  1076. /* Timer overflow */
  1077. if (stat_r & NS_STAT_TMROF)
  1078. {
  1079. writel(NS_STAT_TMROF, card->membase + STAT);
  1080. PRINTK("nicstar%d: Timer overflow.\n", card->index);
  1081. }
  1082. /* PHY device interrupt signal active */
  1083. if (stat_r & NS_STAT_PHYI)
  1084. {
  1085. writel(NS_STAT_PHYI, card->membase + STAT);
  1086. PRINTK("nicstar%d: PHY interrupt.\n", card->index);
  1087. if (dev->phy && dev->phy->interrupt) {
  1088. dev->phy->interrupt(dev);
  1089. }
  1090. }
  1091. /* Small Buffer Queue is full */
  1092. if (stat_r & NS_STAT_SFBQF)
  1093. {
  1094. writel(NS_STAT_SFBQF, card->membase + STAT);
  1095. printk("nicstar%d: Small free buffer queue is full.\n", card->index);
  1096. }
  1097. /* Large Buffer Queue is full */
  1098. if (stat_r & NS_STAT_LFBQF)
  1099. {
  1100. writel(NS_STAT_LFBQF, card->membase + STAT);
  1101. printk("nicstar%d: Large free buffer queue is full.\n", card->index);
  1102. }
  1103. /* Receive Status Queue is full */
  1104. if (stat_r & NS_STAT_RSQF)
  1105. {
  1106. writel(NS_STAT_RSQF, card->membase + STAT);
  1107. printk("nicstar%d: RSQ full.\n", card->index);
  1108. process_rsq(card);
  1109. }
  1110. /* Complete CS-PDU received */
  1111. if (stat_r & NS_STAT_EOPDU)
  1112. {
  1113. RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
  1114. process_rsq(card);
  1115. writel(NS_STAT_EOPDU, card->membase + STAT);
  1116. }
  1117. /* Raw cell received */
  1118. if (stat_r & NS_STAT_RAWCF)
  1119. {
  1120. writel(NS_STAT_RAWCF, card->membase + STAT);
  1121. #ifndef RCQ_SUPPORT
  1122. printk("nicstar%d: Raw cell received and no support yet...\n",
  1123. card->index);
  1124. #endif /* RCQ_SUPPORT */
  1125. /* NOTE: the following procedure may keep a raw cell pending until the
  1126. next interrupt. As this preliminary support is only meant to
  1127. avoid buffer leakage, this is not an issue. */
  1128. while (readl(card->membase + RAWCT) != card->rawch)
  1129. {
  1130. ns_rcqe *rawcell;
  1131. rawcell = (ns_rcqe *) bus_to_virt(card->rawch);
  1132. if (ns_rcqe_islast(rawcell))
  1133. {
  1134. struct sk_buff *oldbuf;
  1135. oldbuf = card->rcbuf;
  1136. card->rcbuf = (struct sk_buff *) ns_rcqe_nextbufhandle(rawcell);
  1137. card->rawch = (u32) virt_to_bus(card->rcbuf->data);
  1138. recycle_rx_buf(card, oldbuf);
  1139. }
  1140. else
  1141. card->rawch += NS_RCQE_SIZE;
  1142. }
  1143. }
  1144. /* Small buffer queue is empty */
  1145. if (stat_r & NS_STAT_SFBQE)
  1146. {
  1147. int i;
  1148. struct sk_buff *sb;
  1149. writel(NS_STAT_SFBQE, card->membase + STAT);
  1150. printk("nicstar%d: Small free buffer queue empty.\n",
  1151. card->index);
  1152. for (i = 0; i < card->sbnr.min; i++)
  1153. {
  1154. sb = dev_alloc_skb(NS_SMSKBSIZE);
  1155. if (sb == NULL)
  1156. {
  1157. writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
  1158. card->efbie = 0;
  1159. break;
  1160. }
  1161. NS_SKB_CB(sb)->buf_type = BUF_SM;
  1162. skb_queue_tail(&card->sbpool.queue, sb);
  1163. skb_reserve(sb, NS_AAL0_HEADER);
  1164. push_rxbufs(card, sb);
  1165. }
  1166. card->sbfqc = i;
  1167. process_rsq(card);
  1168. }
  1169. /* Large buffer queue empty */
  1170. if (stat_r & NS_STAT_LFBQE)
  1171. {
  1172. int i;
  1173. struct sk_buff *lb;
  1174. writel(NS_STAT_LFBQE, card->membase + STAT);
  1175. printk("nicstar%d: Large free buffer queue empty.\n",
  1176. card->index);
  1177. for (i = 0; i < card->lbnr.min; i++)
  1178. {
  1179. lb = dev_alloc_skb(NS_LGSKBSIZE);
  1180. if (lb == NULL)
  1181. {
  1182. writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
  1183. card->efbie = 0;
  1184. break;
  1185. }
  1186. NS_SKB_CB(lb)->buf_type = BUF_LG;
  1187. skb_queue_tail(&card->lbpool.queue, lb);
  1188. skb_reserve(lb, NS_SMBUFSIZE);
  1189. push_rxbufs(card, lb);
  1190. }
  1191. card->lbfqc = i;
  1192. process_rsq(card);
  1193. }
  1194. /* Receive Status Queue is 7/8 full */
  1195. if (stat_r & NS_STAT_RSQAF)
  1196. {
  1197. writel(NS_STAT_RSQAF, card->membase + STAT);
  1198. RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
  1199. process_rsq(card);
  1200. }
  1201. spin_unlock_irqrestore(&card->int_lock, flags);
  1202. PRINTK("nicstar%d: end of interrupt service\n", card->index);
  1203. return IRQ_HANDLED;
  1204. }
  1205. static int ns_open(struct atm_vcc *vcc)
  1206. {
  1207. ns_dev *card;
  1208. vc_map *vc;
  1209. unsigned long tmpl, modl;
  1210. int tcr, tcra; /* target cell rate, and absolute value */
  1211. int n = 0; /* Number of entries in the TST. Initialized to remove
  1212. the compiler warning. */
  1213. u32 u32d[4];
  1214. int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
  1215. warning. How I wish compilers were clever enough to
  1216. tell which variables can truly be used
  1217. uninitialized... */
  1218. int inuse; /* tx or rx vc already in use by another vcc */
  1219. short vpi = vcc->vpi;
  1220. int vci = vcc->vci;
  1221. card = (ns_dev *) vcc->dev->dev_data;
  1222. PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int) vpi, vci);
  1223. if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
  1224. {
  1225. PRINTK("nicstar%d: unsupported AAL.\n", card->index);
  1226. return -EINVAL;
  1227. }
  1228. vc = &(card->vcmap[vpi << card->vcibits | vci]);
  1229. vcc->dev_data = vc;
  1230. inuse = 0;
  1231. if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
  1232. inuse = 1;
  1233. if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
  1234. inuse += 2;
  1235. if (inuse)
  1236. {
  1237. printk("nicstar%d: %s vci already in use.\n", card->index,
  1238. inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
  1239. return -EINVAL;
  1240. }
  1241. set_bit(ATM_VF_ADDR,&vcc->flags);
  1242. /* NOTE: You are not allowed to modify an open connection's QOS. To change
  1243. that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
  1244. needed to do that. */
  1245. if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
  1246. {
  1247. scq_info *scq;
  1248. set_bit(ATM_VF_PARTIAL,&vcc->flags);
  1249. if (vcc->qos.txtp.traffic_class == ATM_CBR)
  1250. {
  1251. /* Check requested cell rate and availability of SCD */
  1252. if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0 &&
  1253. vcc->qos.txtp.min_pcr == 0)
  1254. {
  1255. PRINTK("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
  1256. card->index);
  1257. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1258. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1259. return -EINVAL;
  1260. }
  1261. tcr = atm_pcr_goal(&(vcc->qos.txtp));
  1262. tcra = tcr >= 0 ? tcr : -tcr;
  1263. PRINTK("nicstar%d: target cell rate = %d.\n", card->index,
  1264. vcc->qos.txtp.max_pcr);
  1265. tmpl = (unsigned long)tcra * (unsigned long)NS_TST_NUM_ENTRIES;
  1266. modl = tmpl % card->max_pcr;
  1267. n = (int)(tmpl / card->max_pcr);
  1268. if (tcr > 0)
  1269. {
  1270. if (modl > 0) n++;
  1271. }
  1272. else if (tcr == 0)
  1273. {
  1274. if ((n = (card->tst_free_entries - NS_TST_RESERVED)) <= 0)
  1275. {
  1276. PRINTK("nicstar%d: no CBR bandwidth free.\n", card->index);
  1277. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1278. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1279. return -EINVAL;
  1280. }
  1281. }
  1282. if (n == 0)
  1283. {
  1284. printk("nicstar%d: selected bandwidth < granularity.\n", card->index);
  1285. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1286. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1287. return -EINVAL;
  1288. }
  1289. if (n > (card->tst_free_entries - NS_TST_RESERVED))
  1290. {
  1291. PRINTK("nicstar%d: not enough free CBR bandwidth.\n", card->index);
  1292. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1293. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1294. return -EINVAL;
  1295. }
  1296. else
  1297. card->tst_free_entries -= n;
  1298. XPRINTK("nicstar%d: writing %d tst entries.\n", card->index, n);
  1299. for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++)
  1300. {
  1301. if (card->scd2vc[frscdi] == NULL)
  1302. {
  1303. card->scd2vc[frscdi] = vc;
  1304. break;
  1305. }
  1306. }
  1307. if (frscdi == NS_FRSCD_NUM)
  1308. {
  1309. PRINTK("nicstar%d: no SCD available for CBR channel.\n", card->index);
  1310. card->tst_free_entries += n;
  1311. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1312. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1313. return -EBUSY;
  1314. }
  1315. vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
  1316. scq = get_scq(CBR_SCQSIZE, vc->cbr_scd);
  1317. if (scq == NULL)
  1318. {
  1319. PRINTK("nicstar%d: can't get fixed rate SCQ.\n", card->index);
  1320. card->scd2vc[frscdi] = NULL;
  1321. card->tst_free_entries += n;
  1322. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1323. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1324. return -ENOMEM;
  1325. }
  1326. vc->scq = scq;
  1327. u32d[0] = (u32) virt_to_bus(scq->base);
  1328. u32d[1] = (u32) 0x00000000;
  1329. u32d[2] = (u32) 0xffffffff;
  1330. u32d[3] = (u32) 0x00000000;
  1331. ns_write_sram(card, vc->cbr_scd, u32d, 4);
  1332. fill_tst(card, n, vc);
  1333. }
  1334. else if (vcc->qos.txtp.traffic_class == ATM_UBR)
  1335. {
  1336. vc->cbr_scd = 0x00000000;
  1337. vc->scq = card->scq0;
  1338. }
  1339. if (vcc->qos.txtp.traffic_class != ATM_NONE)
  1340. {
  1341. vc->tx = 1;
  1342. vc->tx_vcc = vcc;
  1343. vc->tbd_count = 0;
  1344. }
  1345. if (vcc->qos.rxtp.traffic_class != ATM_NONE)
  1346. {
  1347. u32 status;
  1348. vc->rx = 1;
  1349. vc->rx_vcc = vcc;
  1350. vc->rx_iov = NULL;
  1351. /* Open the connection in hardware */
  1352. if (vcc->qos.aal == ATM_AAL5)
  1353. status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
  1354. else /* vcc->qos.aal == ATM_AAL0 */
  1355. status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
  1356. #ifdef RCQ_SUPPORT
  1357. status |= NS_RCTE_RAWCELLINTEN;
  1358. #endif /* RCQ_SUPPORT */
  1359. ns_write_sram(card, NS_RCT + (vpi << card->vcibits | vci) *
  1360. NS_RCT_ENTRY_SIZE, &status, 1);
  1361. }
  1362. }
  1363. set_bit(ATM_VF_READY,&vcc->flags);
  1364. return 0;
  1365. }
  1366. static void ns_close(struct atm_vcc *vcc)
  1367. {
  1368. vc_map *vc;
  1369. ns_dev *card;
  1370. u32 data;
  1371. int i;
  1372. vc = vcc->dev_data;
  1373. card = vcc->dev->dev_data;
  1374. PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
  1375. (int) vcc->vpi, vcc->vci);
  1376. clear_bit(ATM_VF_READY,&vcc->flags);
  1377. if (vcc->qos.rxtp.traffic_class != ATM_NONE)
  1378. {
  1379. u32 addr;
  1380. unsigned long flags;
  1381. addr = NS_RCT + (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
  1382. ns_grab_res_lock(card, flags);
  1383. while(CMD_BUSY(card));
  1384. writel(NS_CMD_CLOSE_CONNECTION | addr << 2, card->membase + CMD);
  1385. spin_unlock_irqrestore(&card->res_lock, flags);
  1386. vc->rx = 0;
  1387. if (vc->rx_iov != NULL)
  1388. {
  1389. struct sk_buff *iovb;
  1390. u32 stat;
  1391. stat = readl(card->membase + STAT);
  1392. card->sbfqc = ns_stat_sfbqc_get(stat);
  1393. card->lbfqc = ns_stat_lfbqc_get(stat);
  1394. PRINTK("nicstar%d: closing a VC with pending rx buffers.\n",
  1395. card->index);
  1396. iovb = vc->rx_iov;
  1397. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  1398. NS_SKB(iovb)->iovcnt);
  1399. NS_SKB(iovb)->iovcnt = 0;
  1400. NS_SKB(iovb)->vcc = NULL;
  1401. ns_grab_int_lock(card, flags);
  1402. recycle_iov_buf(card, iovb);
  1403. spin_unlock_irqrestore(&card->int_lock, flags);
  1404. vc->rx_iov = NULL;
  1405. }
  1406. }
  1407. if (vcc->qos.txtp.traffic_class != ATM_NONE)
  1408. {
  1409. vc->tx = 0;
  1410. }
  1411. if (vcc->qos.txtp.traffic_class == ATM_CBR)
  1412. {
  1413. unsigned long flags;
  1414. ns_scqe *scqep;
  1415. scq_info *scq;
  1416. scq = vc->scq;
  1417. for (;;)
  1418. {
  1419. ns_grab_scq_lock(card, scq, flags);
  1420. scqep = scq->next;
  1421. if (scqep == scq->base)
  1422. scqep = scq->last;
  1423. else
  1424. scqep--;
  1425. if (scqep == scq->tail)
  1426. {
  1427. spin_unlock_irqrestore(&scq->lock, flags);
  1428. break;
  1429. }
  1430. /* If the last entry is not a TSR, place one in the SCQ in order to
  1431. be able to completely drain it and then close. */
  1432. if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next)
  1433. {
  1434. ns_scqe tsr;
  1435. u32 scdi, scqi;
  1436. u32 data;
  1437. int index;
  1438. tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
  1439. scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
  1440. scqi = scq->next - scq->base;
  1441. tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
  1442. tsr.word_3 = 0x00000000;
  1443. tsr.word_4 = 0x00000000;
  1444. *scq->next = tsr;
  1445. index = (int) scqi;
  1446. scq->skb[index] = NULL;
  1447. if (scq->next == scq->last)
  1448. scq->next = scq->base;
  1449. else
  1450. scq->next++;
  1451. data = (u32) virt_to_bus(scq->next);
  1452. ns_write_sram(card, scq->scd, &data, 1);
  1453. }
  1454. spin_unlock_irqrestore(&scq->lock, flags);
  1455. schedule();
  1456. }
  1457. /* Free all TST entries */
  1458. data = NS_TST_OPCODE_VARIABLE;
  1459. for (i = 0; i < NS_TST_NUM_ENTRIES; i++)
  1460. {
  1461. if (card->tste2vc[i] == vc)
  1462. {
  1463. ns_write_sram(card, card->tst_addr + i, &data, 1);
  1464. card->tste2vc[i] = NULL;
  1465. card->tst_free_entries++;
  1466. }
  1467. }
  1468. card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
  1469. free_scq(vc->scq, vcc);
  1470. }
  1471. /* remove all references to vcc before deleting it */
  1472. if (vcc->qos.txtp.traffic_class != ATM_NONE)
  1473. {
  1474. unsigned long flags;
  1475. scq_info *scq = card->scq0;
  1476. ns_grab_scq_lock(card, scq, flags);
  1477. for(i = 0; i < scq->num_entries; i++) {
  1478. if(scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
  1479. ATM_SKB(scq->skb[i])->vcc = NULL;
  1480. atm_return(vcc, scq->skb[i]->truesize);
  1481. PRINTK("nicstar: deleted pending vcc mapping\n");
  1482. }
  1483. }
  1484. spin_unlock_irqrestore(&scq->lock, flags);
  1485. }
  1486. vcc->dev_data = NULL;
  1487. clear_bit(ATM_VF_PARTIAL,&vcc->flags);
  1488. clear_bit(ATM_VF_ADDR,&vcc->flags);
  1489. #ifdef RX_DEBUG
  1490. {
  1491. u32 stat, cfg;
  1492. stat = readl(card->membase + STAT);
  1493. cfg = readl(card->membase + CFG);
  1494. printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
  1495. printk("TSQ: base = 0x%08X next = 0x%08X last = 0x%08X TSQT = 0x%08X \n",
  1496. (u32) card->tsq.base, (u32) card->tsq.next,(u32) card->tsq.last,
  1497. readl(card->membase + TSQT));
  1498. printk("RSQ: base = 0x%08X next = 0x%08X last = 0x%08X RSQT = 0x%08X \n",
  1499. (u32) card->rsq.base, (u32) card->rsq.next,(u32) card->rsq.last,
  1500. readl(card->membase + RSQT));
  1501. printk("Empty free buffer queue interrupt %s \n",
  1502. card->efbie ? "enabled" : "disabled");
  1503. printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
  1504. ns_stat_sfbqc_get(stat), card->sbpool.count,
  1505. ns_stat_lfbqc_get(stat), card->lbpool.count);
  1506. printk("hbpool.count = %d iovpool.count = %d \n",
  1507. card->hbpool.count, card->iovpool.count);
  1508. }
  1509. #endif /* RX_DEBUG */
  1510. }
  1511. static void fill_tst(ns_dev *card, int n, vc_map *vc)
  1512. {
  1513. u32 new_tst;
  1514. unsigned long cl;
  1515. int e, r;
  1516. u32 data;
  1517. /* It would be very complicated to keep the two TSTs synchronized while
  1518. assuring that writes are only made to the inactive TST. So, for now I
  1519. will use only one TST. If problems occur, I will change this again */
  1520. new_tst = card->tst_addr;
  1521. /* Fill procedure */
  1522. for (e = 0; e < NS_TST_NUM_ENTRIES; e++)
  1523. {
  1524. if (card->tste2vc[e] == NULL)
  1525. break;
  1526. }
  1527. if (e == NS_TST_NUM_ENTRIES) {
  1528. printk("nicstar%d: No free TST entries found. \n", card->index);
  1529. return;
  1530. }
  1531. r = n;
  1532. cl = NS_TST_NUM_ENTRIES;
  1533. data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
  1534. while (r > 0)
  1535. {
  1536. if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL)
  1537. {
  1538. card->tste2vc[e] = vc;
  1539. ns_write_sram(card, new_tst + e, &data, 1);
  1540. cl -= NS_TST_NUM_ENTRIES;
  1541. r--;
  1542. }
  1543. if (++e == NS_TST_NUM_ENTRIES) {
  1544. e = 0;
  1545. }
  1546. cl += n;
  1547. }
  1548. /* End of fill procedure */
  1549. data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
  1550. ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
  1551. ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
  1552. card->tst_addr = new_tst;
  1553. }
  1554. static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
  1555. {
  1556. ns_dev *card;
  1557. vc_map *vc;
  1558. scq_info *scq;
  1559. unsigned long buflen;
  1560. ns_scqe scqe;
  1561. u32 flags; /* TBD flags, not CPU flags */
  1562. card = vcc->dev->dev_data;
  1563. TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
  1564. if ((vc = (vc_map *) vcc->dev_data) == NULL)
  1565. {
  1566. printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n", card->index);
  1567. atomic_inc(&vcc->stats->tx_err);
  1568. dev_kfree_skb_any(skb);
  1569. return -EINVAL;
  1570. }
  1571. if (!vc->tx)
  1572. {
  1573. printk("nicstar%d: Trying to transmit on a non-tx VC.\n", card->index);
  1574. atomic_inc(&vcc->stats->tx_err);
  1575. dev_kfree_skb_any(skb);
  1576. return -EINVAL;
  1577. }
  1578. if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
  1579. {
  1580. printk("nicstar%d: Only AAL0 and AAL5 are supported.\n", card->index);
  1581. atomic_inc(&vcc->stats->tx_err);
  1582. dev_kfree_skb_any(skb);
  1583. return -EINVAL;
  1584. }
  1585. if (skb_shinfo(skb)->nr_frags != 0)
  1586. {
  1587. printk("nicstar%d: No scatter-gather yet.\n", card->index);
  1588. atomic_inc(&vcc->stats->tx_err);
  1589. dev_kfree_skb_any(skb);
  1590. return -EINVAL;
  1591. }
  1592. ATM_SKB(skb)->vcc = vcc;
  1593. if (vcc->qos.aal == ATM_AAL5)
  1594. {
  1595. buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
  1596. flags = NS_TBD_AAL5;
  1597. scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data));
  1598. scqe.word_3 = cpu_to_le32((u32) skb->len);
  1599. scqe.word_4 = ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
  1600. ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ? 1 : 0);
  1601. flags |= NS_TBD_EOPDU;
  1602. }
  1603. else /* (vcc->qos.aal == ATM_AAL0) */
  1604. {
  1605. buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
  1606. flags = NS_TBD_AAL0;
  1607. scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data) + NS_AAL0_HEADER);
  1608. scqe.word_3 = cpu_to_le32(0x00000000);
  1609. if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
  1610. flags |= NS_TBD_EOPDU;
  1611. scqe.word_4 = cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
  1612. /* Force the VPI/VCI to be the same as in VCC struct */
  1613. scqe.word_4 |= cpu_to_le32((((u32) vcc->vpi) << NS_TBD_VPI_SHIFT |
  1614. ((u32) vcc->vci) << NS_TBD_VCI_SHIFT) &
  1615. NS_TBD_VC_MASK);
  1616. }
  1617. if (vcc->qos.txtp.traffic_class == ATM_CBR)
  1618. {
  1619. scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
  1620. scq = ((vc_map *) vcc->dev_data)->scq;
  1621. }
  1622. else
  1623. {
  1624. scqe.word_1 = ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
  1625. scq = card->scq0;
  1626. }
  1627. if (push_scqe(card, vc, scq, &scqe, skb) != 0)
  1628. {
  1629. atomic_inc(&vcc->stats->tx_err);
  1630. dev_kfree_skb_any(skb);
  1631. return -EIO;
  1632. }
  1633. atomic_inc(&vcc->stats->tx);
  1634. return 0;
  1635. }
  1636. static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
  1637. struct sk_buff *skb)
  1638. {
  1639. unsigned long flags;
  1640. ns_scqe tsr;
  1641. u32 scdi, scqi;
  1642. int scq_is_vbr;
  1643. u32 data;
  1644. int index;
  1645. ns_grab_scq_lock(card, scq, flags);
  1646. while (scq->tail == scq->next)
  1647. {
  1648. if (in_interrupt()) {
  1649. spin_unlock_irqrestore(&scq->lock, flags);
  1650. printk("nicstar%d: Error pushing TBD.\n", card->index);
  1651. return 1;
  1652. }
  1653. scq->full = 1;
  1654. spin_unlock_irqrestore(&scq->lock, flags);
  1655. interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
  1656. ns_grab_scq_lock(card, scq, flags);
  1657. if (scq->full) {
  1658. spin_unlock_irqrestore(&scq->lock, flags);
  1659. printk("nicstar%d: Timeout pushing TBD.\n", card->index);
  1660. return 1;
  1661. }
  1662. }
  1663. *scq->next = *tbd;
  1664. index = (int) (scq->next - scq->base);
  1665. scq->skb[index] = skb;
  1666. XPRINTK("nicstar%d: sending skb at 0x%x (pos %d).\n",
  1667. card->index, (u32) skb, index);
  1668. XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
  1669. card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
  1670. le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
  1671. (u32) scq->next);
  1672. if (scq->next == scq->last)
  1673. scq->next = scq->base;
  1674. else
  1675. scq->next++;
  1676. vc->tbd_count++;
  1677. if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
  1678. {
  1679. scq->tbd_count++;
  1680. scq_is_vbr = 1;
  1681. }
  1682. else
  1683. scq_is_vbr = 0;
  1684. if (vc->tbd_count >= MAX_TBD_PER_VC || scq->tbd_count >= MAX_TBD_PER_SCQ)
  1685. {
  1686. int has_run = 0;
  1687. while (scq->tail == scq->next)
  1688. {
  1689. if (in_interrupt()) {
  1690. data = (u32) virt_to_bus(scq->next);
  1691. ns_write_sram(card, scq->scd, &data, 1);
  1692. spin_unlock_irqrestore(&scq->lock, flags);
  1693. printk("nicstar%d: Error pushing TSR.\n", card->index);
  1694. return 0;
  1695. }
  1696. scq->full = 1;
  1697. if (has_run++) break;
  1698. spin_unlock_irqrestore(&scq->lock, flags);
  1699. interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
  1700. ns_grab_scq_lock(card, scq, flags);
  1701. }
  1702. if (!scq->full)
  1703. {
  1704. tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
  1705. if (scq_is_vbr)
  1706. scdi = NS_TSR_SCDISVBR;
  1707. else
  1708. scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
  1709. scqi = scq->next - scq->base;
  1710. tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
  1711. tsr.word_3 = 0x00000000;
  1712. tsr.word_4 = 0x00000000;
  1713. *scq->next = tsr;
  1714. index = (int) scqi;
  1715. scq->skb[index] = NULL;
  1716. XPRINTK("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
  1717. card->index, le32_to_cpu(tsr.word_1), le32_to_cpu(tsr.word_2),
  1718. le32_to_cpu(tsr.word_3), le32_to_cpu(tsr.word_4),
  1719. (u32) scq->next);
  1720. if (scq->next == scq->last)
  1721. scq->next = scq->base;
  1722. else
  1723. scq->next++;
  1724. vc->tbd_count = 0;
  1725. scq->tbd_count = 0;
  1726. }
  1727. else
  1728. PRINTK("nicstar%d: Timeout pushing TSR.\n", card->index);
  1729. }
  1730. data = (u32) virt_to_bus(scq->next);
  1731. ns_write_sram(card, scq->scd, &data, 1);
  1732. spin_unlock_irqrestore(&scq->lock, flags);
  1733. return 0;
  1734. }
  1735. static void process_tsq(ns_dev *card)
  1736. {
  1737. u32 scdi;
  1738. scq_info *scq;
  1739. ns_tsi *previous = NULL, *one_ahead, *two_ahead;
  1740. int serviced_entries; /* flag indicating at least on entry was serviced */
  1741. serviced_entries = 0;
  1742. if (card->tsq.next == card->tsq.last)
  1743. one_ahead = card->tsq.base;
  1744. else
  1745. one_ahead = card->tsq.next + 1;
  1746. if (one_ahead == card->tsq.last)
  1747. two_ahead = card->tsq.base;
  1748. else
  1749. two_ahead = one_ahead + 1;
  1750. while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
  1751. !ns_tsi_isempty(two_ahead))
  1752. /* At most two empty, as stated in the 77201 errata */
  1753. {
  1754. serviced_entries = 1;
  1755. /* Skip the one or two possible empty entries */
  1756. while (ns_tsi_isempty(card->tsq.next)) {
  1757. if (card->tsq.next == card->tsq.last)
  1758. card->tsq.next = card->tsq.base;
  1759. else
  1760. card->tsq.next++;
  1761. }
  1762. if (!ns_tsi_tmrof(card->tsq.next))
  1763. {
  1764. scdi = ns_tsi_getscdindex(card->tsq.next);
  1765. if (scdi == NS_TSI_SCDISVBR)
  1766. scq = card->scq0;
  1767. else
  1768. {
  1769. if (card->scd2vc[scdi] == NULL)
  1770. {
  1771. printk("nicstar%d: could not find VC from SCD index.\n",
  1772. card->index);
  1773. ns_tsi_init(card->tsq.next);
  1774. return;
  1775. }
  1776. scq = card->scd2vc[scdi]->scq;
  1777. }
  1778. drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
  1779. scq->full = 0;
  1780. wake_up_interruptible(&(scq->scqfull_waitq));
  1781. }
  1782. ns_tsi_init(card->tsq.next);
  1783. previous = card->tsq.next;
  1784. if (card->tsq.next == card->tsq.last)
  1785. card->tsq.next = card->tsq.base;
  1786. else
  1787. card->tsq.next++;
  1788. if (card->tsq.next == card->tsq.last)
  1789. one_ahead = card->tsq.base;
  1790. else
  1791. one_ahead = card->tsq.next + 1;
  1792. if (one_ahead == card->tsq.last)
  1793. two_ahead = card->tsq.base;
  1794. else
  1795. two_ahead = one_ahead + 1;
  1796. }
  1797. if (serviced_entries) {
  1798. writel((((u32) previous) - ((u32) card->tsq.base)),
  1799. card->membase + TSQH);
  1800. }
  1801. }
  1802. static void drain_scq(ns_dev *card, scq_info *scq, int pos)
  1803. {
  1804. struct atm_vcc *vcc;
  1805. struct sk_buff *skb;
  1806. int i;
  1807. unsigned long flags;
  1808. XPRINTK("nicstar%d: drain_scq() called, scq at 0x%x, pos %d.\n",
  1809. card->index, (u32) scq, pos);
  1810. if (pos >= scq->num_entries)
  1811. {
  1812. printk("nicstar%d: Bad index on drain_scq().\n", card->index);
  1813. return;
  1814. }
  1815. ns_grab_scq_lock(card, scq, flags);
  1816. i = (int) (scq->tail - scq->base);
  1817. if (++i == scq->num_entries)
  1818. i = 0;
  1819. while (i != pos)
  1820. {
  1821. skb = scq->skb[i];
  1822. XPRINTK("nicstar%d: freeing skb at 0x%x (index %d).\n",
  1823. card->index, (u32) skb, i);
  1824. if (skb != NULL)
  1825. {
  1826. vcc = ATM_SKB(skb)->vcc;
  1827. if (vcc && vcc->pop != NULL) {
  1828. vcc->pop(vcc, skb);
  1829. } else {
  1830. dev_kfree_skb_irq(skb);
  1831. }
  1832. scq->skb[i] = NULL;
  1833. }
  1834. if (++i == scq->num_entries)
  1835. i = 0;
  1836. }
  1837. scq->tail = scq->base + pos;
  1838. spin_unlock_irqrestore(&scq->lock, flags);
  1839. }
  1840. static void process_rsq(ns_dev *card)
  1841. {
  1842. ns_rsqe *previous;
  1843. if (!ns_rsqe_valid(card->rsq.next))
  1844. return;
  1845. do {
  1846. dequeue_rx(card, card->rsq.next);
  1847. ns_rsqe_init(card->rsq.next);
  1848. previous = card->rsq.next;
  1849. if (card->rsq.next == card->rsq.last)
  1850. card->rsq.next = card->rsq.base;
  1851. else
  1852. card->rsq.next++;
  1853. } while (ns_rsqe_valid(card->rsq.next));
  1854. writel((((u32) previous) - ((u32) card->rsq.base)),
  1855. card->membase + RSQH);
  1856. }
  1857. static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
  1858. {
  1859. u32 vpi, vci;
  1860. vc_map *vc;
  1861. struct sk_buff *iovb;
  1862. struct iovec *iov;
  1863. struct atm_vcc *vcc;
  1864. struct sk_buff *skb;
  1865. unsigned short aal5_len;
  1866. int len;
  1867. u32 stat;
  1868. stat = readl(card->membase + STAT);
  1869. card->sbfqc = ns_stat_sfbqc_get(stat);
  1870. card->lbfqc = ns_stat_lfbqc_get(stat);
  1871. skb = (struct sk_buff *) le32_to_cpu(rsqe->buffer_handle);
  1872. vpi = ns_rsqe_vpi(rsqe);
  1873. vci = ns_rsqe_vci(rsqe);
  1874. if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits)
  1875. {
  1876. printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
  1877. card->index, vpi, vci);
  1878. recycle_rx_buf(card, skb);
  1879. return;
  1880. }
  1881. vc = &(card->vcmap[vpi << card->vcibits | vci]);
  1882. if (!vc->rx)
  1883. {
  1884. RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
  1885. card->index, vpi, vci);
  1886. recycle_rx_buf(card, skb);
  1887. return;
  1888. }
  1889. vcc = vc->rx_vcc;
  1890. if (vcc->qos.aal == ATM_AAL0)
  1891. {
  1892. struct sk_buff *sb;
  1893. unsigned char *cell;
  1894. int i;
  1895. cell = skb->data;
  1896. for (i = ns_rsqe_cellcount(rsqe); i; i--)
  1897. {
  1898. if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL)
  1899. {
  1900. printk("nicstar%d: Can't allocate buffers for aal0.\n",
  1901. card->index);
  1902. atomic_add(i,&vcc->stats->rx_drop);
  1903. break;
  1904. }
  1905. if (!atm_charge(vcc, sb->truesize))
  1906. {
  1907. RXPRINTK("nicstar%d: atm_charge() dropped aal0 packets.\n",
  1908. card->index);
  1909. atomic_add(i-1,&vcc->stats->rx_drop); /* already increased by 1 */
  1910. dev_kfree_skb_any(sb);
  1911. break;
  1912. }
  1913. /* Rebuild the header */
  1914. *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
  1915. (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
  1916. if (i == 1 && ns_rsqe_eopdu(rsqe))
  1917. *((u32 *) sb->data) |= 0x00000002;
  1918. skb_put(sb, NS_AAL0_HEADER);
  1919. memcpy(sb->tail, cell, ATM_CELL_PAYLOAD);
  1920. skb_put(sb, ATM_CELL_PAYLOAD);
  1921. ATM_SKB(sb)->vcc = vcc;
  1922. __net_timestamp(sb);
  1923. vcc->push(vcc, sb);
  1924. atomic_inc(&vcc->stats->rx);
  1925. cell += ATM_CELL_PAYLOAD;
  1926. }
  1927. recycle_rx_buf(card, skb);
  1928. return;
  1929. }
  1930. /* To reach this point, the AAL layer can only be AAL5 */
  1931. if ((iovb = vc->rx_iov) == NULL)
  1932. {
  1933. iovb = skb_dequeue(&(card->iovpool.queue));
  1934. if (iovb == NULL) /* No buffers in the queue */
  1935. {
  1936. iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
  1937. if (iovb == NULL)
  1938. {
  1939. printk("nicstar%d: Out of iovec buffers.\n", card->index);
  1940. atomic_inc(&vcc->stats->rx_drop);
  1941. recycle_rx_buf(card, skb);
  1942. return;
  1943. }
  1944. NS_SKB_CB(iovb)->buf_type = BUF_NONE;
  1945. }
  1946. else
  1947. if (--card->iovpool.count < card->iovnr.min)
  1948. {
  1949. struct sk_buff *new_iovb;
  1950. if ((new_iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL)
  1951. {
  1952. NS_SKB_CB(iovb)->buf_type = BUF_NONE;
  1953. skb_queue_tail(&card->iovpool.queue, new_iovb);
  1954. card->iovpool.count++;
  1955. }
  1956. }
  1957. vc->rx_iov = iovb;
  1958. NS_SKB(iovb)->iovcnt = 0;
  1959. iovb->len = 0;
  1960. iovb->tail = iovb->data = iovb->head;
  1961. NS_SKB(iovb)->vcc = vcc;
  1962. /* IMPORTANT: a pointer to the sk_buff containing the small or large
  1963. buffer is stored as iovec base, NOT a pointer to the
  1964. small or large buffer itself. */
  1965. }
  1966. else if (NS_SKB(iovb)->iovcnt >= NS_MAX_IOVECS)
  1967. {
  1968. printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
  1969. atomic_inc(&vcc->stats->rx_err);
  1970. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, NS_MAX_IOVECS);
  1971. NS_SKB(iovb)->iovcnt = 0;
  1972. iovb->len = 0;
  1973. iovb->tail = iovb->data = iovb->head;
  1974. NS_SKB(iovb)->vcc = vcc;
  1975. }
  1976. iov = &((struct iovec *) iovb->data)[NS_SKB(iovb)->iovcnt++];
  1977. iov->iov_base = (void *) skb;
  1978. iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
  1979. iovb->len += iov->iov_len;
  1980. if (NS_SKB(iovb)->iovcnt == 1)
  1981. {
  1982. if (NS_SKB_CB(skb)->buf_type != BUF_SM)
  1983. {
  1984. printk("nicstar%d: Expected a small buffer, and this is not one.\n",
  1985. card->index);
  1986. which_list(card, skb);
  1987. atomic_inc(&vcc->stats->rx_err);
  1988. recycle_rx_buf(card, skb);
  1989. vc->rx_iov = NULL;
  1990. recycle_iov_buf(card, iovb);
  1991. return;
  1992. }
  1993. }
  1994. else /* NS_SKB(iovb)->iovcnt >= 2 */
  1995. {
  1996. if (NS_SKB_CB(skb)->buf_type != BUF_LG)
  1997. {
  1998. printk("nicstar%d: Expected a large buffer, and this is not one.\n",
  1999. card->index);
  2000. which_list(card, skb);
  2001. atomic_inc(&vcc->stats->rx_err);
  2002. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  2003. NS_SKB(iovb)->iovcnt);
  2004. vc->rx_iov = NULL;
  2005. recycle_iov_buf(card, iovb);
  2006. return;
  2007. }
  2008. }
  2009. if (ns_rsqe_eopdu(rsqe))
  2010. {
  2011. /* This works correctly regardless of the endianness of the host */
  2012. unsigned char *L1L2 = (unsigned char *)((u32)skb->data +
  2013. iov->iov_len - 6);
  2014. aal5_len = L1L2[0] << 8 | L1L2[1];
  2015. len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
  2016. if (ns_rsqe_crcerr(rsqe) ||
  2017. len + 8 > iovb->len || len + (47 + 8) < iovb->len)
  2018. {
  2019. printk("nicstar%d: AAL5 CRC error", card->index);
  2020. if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
  2021. printk(" - PDU size mismatch.\n");
  2022. else
  2023. printk(".\n");
  2024. atomic_inc(&vcc->stats->rx_err);
  2025. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  2026. NS_SKB(iovb)->iovcnt);
  2027. vc->rx_iov = NULL;
  2028. recycle_iov_buf(card, iovb);
  2029. return;
  2030. }
  2031. /* By this point we (hopefully) have a complete SDU without errors. */
  2032. if (NS_SKB(iovb)->iovcnt == 1) /* Just a small buffer */
  2033. {
  2034. /* skb points to a small buffer */
  2035. if (!atm_charge(vcc, skb->truesize))
  2036. {
  2037. push_rxbufs(card, skb);
  2038. atomic_inc(&vcc->stats->rx_drop);
  2039. }
  2040. else
  2041. {
  2042. skb_put(skb, len);
  2043. dequeue_sm_buf(card, skb);
  2044. #ifdef NS_USE_DESTRUCTORS
  2045. skb->destructor = ns_sb_destructor;
  2046. #endif /* NS_USE_DESTRUCTORS */
  2047. ATM_SKB(skb)->vcc = vcc;
  2048. __net_timestamp(skb);
  2049. vcc->push(vcc, skb);
  2050. atomic_inc(&vcc->stats->rx);
  2051. }
  2052. }
  2053. else if (NS_SKB(iovb)->iovcnt == 2) /* One small plus one large buffer */
  2054. {
  2055. struct sk_buff *sb;
  2056. sb = (struct sk_buff *) (iov - 1)->iov_base;
  2057. /* skb points to a large buffer */
  2058. if (len <= NS_SMBUFSIZE)
  2059. {
  2060. if (!atm_charge(vcc, sb->truesize))
  2061. {
  2062. push_rxbufs(card, sb);
  2063. atomic_inc(&vcc->stats->rx_drop);
  2064. }
  2065. else
  2066. {
  2067. skb_put(sb, len);
  2068. dequeue_sm_buf(card, sb);
  2069. #ifdef NS_USE_DESTRUCTORS
  2070. sb->destructor = ns_sb_destructor;
  2071. #endif /* NS_USE_DESTRUCTORS */
  2072. ATM_SKB(sb)->vcc = vcc;
  2073. __net_timestamp(sb);
  2074. vcc->push(vcc, sb);
  2075. atomic_inc(&vcc->stats->rx);
  2076. }
  2077. push_rxbufs(card, skb);
  2078. }
  2079. else /* len > NS_SMBUFSIZE, the usual case */
  2080. {
  2081. if (!atm_charge(vcc, skb->truesize))
  2082. {
  2083. push_rxbufs(card, skb);
  2084. atomic_inc(&vcc->stats->rx_drop);
  2085. }
  2086. else
  2087. {
  2088. dequeue_lg_buf(card, skb);
  2089. #ifdef NS_USE_DESTRUCTORS
  2090. skb->destructor = ns_lb_destructor;
  2091. #endif /* NS_USE_DESTRUCTORS */
  2092. skb_push(skb, NS_SMBUFSIZE);
  2093. memcpy(skb->data, sb->data, NS_SMBUFSIZE);
  2094. skb_put(skb, len - NS_SMBUFSIZE);
  2095. ATM_SKB(skb)->vcc = vcc;
  2096. __net_timestamp(skb);
  2097. vcc->push(vcc, skb);
  2098. atomic_inc(&vcc->stats->rx);
  2099. }
  2100. push_rxbufs(card, sb);
  2101. }
  2102. }
  2103. else /* Must push a huge buffer */
  2104. {
  2105. struct sk_buff *hb, *sb, *lb;
  2106. int remaining, tocopy;
  2107. int j;
  2108. hb = skb_dequeue(&(card->hbpool.queue));
  2109. if (hb == NULL) /* No buffers in the queue */
  2110. {
  2111. hb = dev_alloc_skb(NS_HBUFSIZE);
  2112. if (hb == NULL)
  2113. {
  2114. printk("nicstar%d: Out of huge buffers.\n", card->index);
  2115. atomic_inc(&vcc->stats->rx_drop);
  2116. recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
  2117. NS_SKB(iovb)->iovcnt);
  2118. vc->rx_iov = NULL;
  2119. recycle_iov_buf(card, iovb);
  2120. return;
  2121. }
  2122. else if (card->hbpool.count < card->hbnr.min)
  2123. {
  2124. struct sk_buff *new_hb;
  2125. if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
  2126. {
  2127. skb_queue_tail(&card->hbpool.queue, new_hb);
  2128. card->hbpool.count++;
  2129. }
  2130. }
  2131. NS_SKB_CB(hb)->buf_type = BUF_NONE;
  2132. }
  2133. else
  2134. if (--card->hbpool.count < card->hbnr.min)
  2135. {
  2136. struct sk_buff *new_hb;
  2137. if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
  2138. {
  2139. NS_SKB_CB(new_hb)->buf_type = BUF_NONE;
  2140. skb_queue_tail(&card->hbpool.queue, new_hb);
  2141. card->hbpool.count++;
  2142. }
  2143. if (card->hbpool.count < card->hbnr.min)
  2144. {
  2145. if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
  2146. {
  2147. NS_SKB_CB(new_hb)->buf_type = BUF_NONE;
  2148. skb_queue_tail(&card->hbpool.queue, new_hb);
  2149. card->hbpool.count++;
  2150. }
  2151. }
  2152. }
  2153. iov = (struct iovec *) iovb->data;
  2154. if (!atm_charge(vcc, hb->truesize))
  2155. {
  2156. recycle_iovec_rx_bufs(card, iov, NS_SKB(iovb)->iovcnt);
  2157. if (card->hbpool.count < card->hbnr.max)
  2158. {
  2159. skb_queue_tail(&card->hbpool.queue, hb);
  2160. card->hbpool.count++;
  2161. }
  2162. else
  2163. dev_kfree_skb_any(hb);
  2164. atomic_inc(&vcc->stats->rx_drop);
  2165. }
  2166. else
  2167. {
  2168. /* Copy the small buffer to the huge buffer */
  2169. sb = (struct sk_buff *) iov->iov_base;
  2170. memcpy(hb->data, sb->data, iov->iov_len);
  2171. skb_put(hb, iov->iov_len);
  2172. remaining = len - iov->iov_len;
  2173. iov++;
  2174. /* Free the small buffer */
  2175. push_rxbufs(card, sb);
  2176. /* Copy all large buffers to the huge buffer and free them */
  2177. for (j = 1; j < NS_SKB(iovb)->iovcnt; j++)
  2178. {
  2179. lb = (struct sk_buff *) iov->iov_base;
  2180. tocopy = min_t(int, remaining, iov->iov_len);
  2181. memcpy(hb->tail, lb->data, tocopy);
  2182. skb_put(hb, tocopy);
  2183. iov++;
  2184. remaining -= tocopy;
  2185. push_rxbufs(card, lb);
  2186. }
  2187. #ifdef EXTRA_DEBUG
  2188. if (remaining != 0 || hb->len != len)
  2189. printk("nicstar%d: Huge buffer len mismatch.\n", card->index);
  2190. #endif /* EXTRA_DEBUG */
  2191. ATM_SKB(hb)->vcc = vcc;
  2192. #ifdef NS_USE_DESTRUCTORS
  2193. hb->destructor = ns_hb_destructor;
  2194. #endif /* NS_USE_DESTRUCTORS */
  2195. __net_timestamp(hb);
  2196. vcc->push(vcc, hb);
  2197. atomic_inc(&vcc->stats->rx);
  2198. }
  2199. }
  2200. vc->rx_iov = NULL;
  2201. recycle_iov_buf(card, iovb);
  2202. }
  2203. }
  2204. #ifdef NS_USE_DESTRUCTORS
  2205. static void ns_sb_destructor(struct sk_buff *sb)
  2206. {
  2207. ns_dev *card;
  2208. u32 stat;
  2209. card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data;
  2210. stat = readl(card->membase + STAT);
  2211. card->sbfqc = ns_stat_sfbqc_get(stat);
  2212. card->lbfqc = ns_stat_lfbqc_get(stat);
  2213. do
  2214. {
  2215. sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
  2216. if (sb == NULL)
  2217. break;
  2218. NS_SKB_CB(sb)->buf_type = BUF_SM;
  2219. skb_queue_tail(&card->sbpool.queue, sb);
  2220. skb_reserve(sb, NS_AAL0_HEADER);
  2221. push_rxbufs(card, sb);
  2222. } while (card->sbfqc < card->sbnr.min);
  2223. }
  2224. static void ns_lb_destructor(struct sk_buff *lb)
  2225. {
  2226. ns_dev *card;
  2227. u32 stat;
  2228. card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data;
  2229. stat = readl(card->membase + STAT);
  2230. card->sbfqc = ns_stat_sfbqc_get(stat);
  2231. card->lbfqc = ns_stat_lfbqc_get(stat);
  2232. do
  2233. {
  2234. lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
  2235. if (lb == NULL)
  2236. break;
  2237. NS_SKB_CB(lb)->buf_type = BUF_LG;
  2238. skb_queue_tail(&card->lbpool.queue, lb);
  2239. skb_reserve(lb, NS_SMBUFSIZE);
  2240. push_rxbufs(card, lb);
  2241. } while (card->lbfqc < card->lbnr.min);
  2242. }
  2243. static void ns_hb_destructor(struct sk_buff *hb)
  2244. {
  2245. ns_dev *card;
  2246. card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data;
  2247. while (card->hbpool.count < card->hbnr.init)
  2248. {
  2249. hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
  2250. if (hb == NULL)
  2251. break;
  2252. NS_SKB_CB(hb)->buf_type = BUF_NONE;
  2253. skb_queue_tail(&card->hbpool.queue, hb);
  2254. card->hbpool.count++;
  2255. }
  2256. }
  2257. #endif /* NS_USE_DESTRUCTORS */
  2258. static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb)
  2259. {
  2260. struct ns_skb_cb *cb = NS_SKB_CB(skb);
  2261. if (unlikely(cb->buf_type == BUF_NONE)) {
  2262. printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
  2263. dev_kfree_skb_any(skb);
  2264. } else
  2265. push_rxbufs(card, skb);
  2266. }
  2267. static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count)
  2268. {
  2269. while (count-- > 0)
  2270. recycle_rx_buf(card, (struct sk_buff *) (iov++)->iov_base);
  2271. }
  2272. static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb)
  2273. {
  2274. if (card->iovpool.count < card->iovnr.max)
  2275. {
  2276. skb_queue_tail(&card->iovpool.queue, iovb);
  2277. card->iovpool.count++;
  2278. }
  2279. else
  2280. dev_kfree_skb_any(iovb);
  2281. }
  2282. static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb)
  2283. {
  2284. skb_unlink(sb, &card->sbpool.queue);
  2285. #ifdef NS_USE_DESTRUCTORS
  2286. if (card->sbfqc < card->sbnr.min)
  2287. #else
  2288. if (card->sbfqc < card->sbnr.init)
  2289. {
  2290. struct sk_buff *new_sb;
  2291. if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
  2292. {
  2293. NS_SKB_CB(new_sb)->buf_type = BUF_SM;
  2294. skb_queue_tail(&card->sbpool.queue, new_sb);
  2295. skb_reserve(new_sb, NS_AAL0_HEADER);
  2296. push_rxbufs(card, new_sb);
  2297. }
  2298. }
  2299. if (card->sbfqc < card->sbnr.init)
  2300. #endif /* NS_USE_DESTRUCTORS */
  2301. {
  2302. struct sk_buff *new_sb;
  2303. if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
  2304. {
  2305. NS_SKB_CB(new_sb)->buf_type = BUF_SM;
  2306. skb_queue_tail(&card->sbpool.queue, new_sb);
  2307. skb_reserve(new_sb, NS_AAL0_HEADER);
  2308. push_rxbufs(card, new_sb);
  2309. }
  2310. }
  2311. }
  2312. static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb)
  2313. {
  2314. skb_unlink(lb, &card->lbpool.queue);
  2315. #ifdef NS_USE_DESTRUCTORS
  2316. if (card->lbfqc < card->lbnr.min)
  2317. #else
  2318. if (card->lbfqc < card->lbnr.init)
  2319. {
  2320. struct sk_buff *new_lb;
  2321. if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
  2322. {
  2323. NS_SKB_CB(new_lb)->buf_type = BUF_LG;
  2324. skb_queue_tail(&card->lbpool.queue, new_lb);
  2325. skb_reserve(new_lb, NS_SMBUFSIZE);
  2326. push_rxbufs(card, new_lb);
  2327. }
  2328. }
  2329. if (card->lbfqc < card->lbnr.init)
  2330. #endif /* NS_USE_DESTRUCTORS */
  2331. {
  2332. struct sk_buff *new_lb;
  2333. if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
  2334. {
  2335. NS_SKB_CB(new_lb)->buf_type = BUF_LG;
  2336. skb_queue_tail(&card->lbpool.queue, new_lb);
  2337. skb_reserve(new_lb, NS_SMBUFSIZE);
  2338. push_rxbufs(card, new_lb);
  2339. }
  2340. }
  2341. }
  2342. static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
  2343. {
  2344. u32 stat;
  2345. ns_dev *card;
  2346. int left;
  2347. left = (int) *pos;
  2348. card = (ns_dev *) dev->dev_data;
  2349. stat = readl(card->membase + STAT);
  2350. if (!left--)
  2351. return sprintf(page, "Pool count min init max \n");
  2352. if (!left--)
  2353. return sprintf(page, "Small %5d %5d %5d %5d \n",
  2354. ns_stat_sfbqc_get(stat), card->sbnr.min, card->sbnr.init,
  2355. card->sbnr.max);
  2356. if (!left--)
  2357. return sprintf(page, "Large %5d %5d %5d %5d \n",
  2358. ns_stat_lfbqc_get(stat), card->lbnr.min, card->lbnr.init,
  2359. card->lbnr.max);
  2360. if (!left--)
  2361. return sprintf(page, "Huge %5d %5d %5d %5d \n", card->hbpool.count,
  2362. card->hbnr.min, card->hbnr.init, card->hbnr.max);
  2363. if (!left--)
  2364. return sprintf(page, "Iovec %5d %5d %5d %5d \n", card->iovpool.count,
  2365. card->iovnr.min, card->iovnr.init, card->iovnr.max);
  2366. if (!left--)
  2367. {
  2368. int retval;
  2369. retval = sprintf(page, "Interrupt counter: %u \n", card->intcnt);
  2370. card->intcnt = 0;
  2371. return retval;
  2372. }
  2373. #if 0
  2374. /* Dump 25.6 Mbps PHY registers */
  2375. /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
  2376. here just in case it's needed for debugging. */
  2377. if (card->max_pcr == ATM_25_PCR && !left--)
  2378. {
  2379. u32 phy_regs[4];
  2380. u32 i;
  2381. for (i = 0; i < 4; i++)
  2382. {
  2383. while (CMD_BUSY(card));
  2384. writel(NS_CMD_READ_UTILITY | 0x00000200 | i, card->membase + CMD);
  2385. while (CMD_BUSY(card));
  2386. phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
  2387. }
  2388. return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
  2389. phy_regs[0], phy_regs[1], phy_regs[2], phy_regs[3]);
  2390. }
  2391. #endif /* 0 - Dump 25.6 Mbps PHY registers */
  2392. #if 0
  2393. /* Dump TST */
  2394. if (left-- < NS_TST_NUM_ENTRIES)
  2395. {
  2396. if (card->tste2vc[left + 1] == NULL)
  2397. return sprintf(page, "%5d - VBR/UBR \n", left + 1);
  2398. else
  2399. return sprintf(page, "%5d - %d %d \n", left + 1,
  2400. card->tste2vc[left + 1]->tx_vcc->vpi,
  2401. card->tste2vc[left + 1]->tx_vcc->vci);
  2402. }
  2403. #endif /* 0 */
  2404. return 0;
  2405. }
  2406. static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
  2407. {
  2408. ns_dev *card;
  2409. pool_levels pl;
  2410. int btype;
  2411. unsigned long flags;
  2412. card = dev->dev_data;
  2413. switch (cmd)
  2414. {
  2415. case NS_GETPSTAT:
  2416. if (get_user(pl.buftype, &((pool_levels __user *) arg)->buftype))
  2417. return -EFAULT;
  2418. switch (pl.buftype)
  2419. {
  2420. case NS_BUFTYPE_SMALL:
  2421. pl.count = ns_stat_sfbqc_get(readl(card->membase + STAT));
  2422. pl.level.min = card->sbnr.min;
  2423. pl.level.init = card->sbnr.init;
  2424. pl.level.max = card->sbnr.max;
  2425. break;
  2426. case NS_BUFTYPE_LARGE:
  2427. pl.count = ns_stat_lfbqc_get(readl(card->membase + STAT));
  2428. pl.level.min = card->lbnr.min;
  2429. pl.level.init = card->lbnr.init;
  2430. pl.level.max = card->lbnr.max;
  2431. break;
  2432. case NS_BUFTYPE_HUGE:
  2433. pl.count = card->hbpool.count;
  2434. pl.level.min = card->hbnr.min;
  2435. pl.level.init = card->hbnr.init;
  2436. pl.level.max = card->hbnr.max;
  2437. break;
  2438. case NS_BUFTYPE_IOVEC:
  2439. pl.count = card->iovpool.count;
  2440. pl.level.min = card->iovnr.min;
  2441. pl.level.init = card->iovnr.init;
  2442. pl.level.max = card->iovnr.max;
  2443. break;
  2444. default:
  2445. return -ENOIOCTLCMD;
  2446. }
  2447. if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
  2448. return (sizeof(pl));
  2449. else
  2450. return -EFAULT;
  2451. case NS_SETBUFLEV:
  2452. if (!capable(CAP_NET_ADMIN))
  2453. return -EPERM;
  2454. if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
  2455. return -EFAULT;
  2456. if (pl.level.min >= pl.level.init || pl.level.init >= pl.level.max)
  2457. return -EINVAL;
  2458. if (pl.level.min == 0)
  2459. return -EINVAL;
  2460. switch (pl.buftype)
  2461. {
  2462. case NS_BUFTYPE_SMALL:
  2463. if (pl.level.max > TOP_SB)
  2464. return -EINVAL;
  2465. card->sbnr.min = pl.level.min;
  2466. card->sbnr.init = pl.level.init;
  2467. card->sbnr.max = pl.level.max;
  2468. break;
  2469. case NS_BUFTYPE_LARGE:
  2470. if (pl.level.max > TOP_LB)
  2471. return -EINVAL;
  2472. card->lbnr.min = pl.level.min;
  2473. card->lbnr.init = pl.level.init;
  2474. card->lbnr.max = pl.level.max;
  2475. break;
  2476. case NS_BUFTYPE_HUGE:
  2477. if (pl.level.max > TOP_HB)
  2478. return -EINVAL;
  2479. card->hbnr.min = pl.level.min;
  2480. card->hbnr.init = pl.level.init;
  2481. card->hbnr.max = pl.level.max;
  2482. break;
  2483. case NS_BUFTYPE_IOVEC:
  2484. if (pl.level.max > TOP_IOVB)
  2485. return -EINVAL;
  2486. card->iovnr.min = pl.level.min;
  2487. card->iovnr.init = pl.level.init;
  2488. card->iovnr.max = pl.level.max;
  2489. break;
  2490. default:
  2491. return -EINVAL;
  2492. }
  2493. return 0;
  2494. case NS_ADJBUFLEV:
  2495. if (!capable(CAP_NET_ADMIN))
  2496. return -EPERM;
  2497. btype = (int) arg; /* an int is the same size as a pointer */
  2498. switch (btype)
  2499. {
  2500. case NS_BUFTYPE_SMALL:
  2501. while (card->sbfqc < card->sbnr.init)
  2502. {
  2503. struct sk_buff *sb;
  2504. sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
  2505. if (sb == NULL)
  2506. return -ENOMEM;
  2507. NS_SKB_CB(sb)->buf_type = BUF_SM;
  2508. skb_queue_tail(&card->sbpool.queue, sb);
  2509. skb_reserve(sb, NS_AAL0_HEADER);
  2510. push_rxbufs(card, sb);
  2511. }
  2512. break;
  2513. case NS_BUFTYPE_LARGE:
  2514. while (card->lbfqc < card->lbnr.init)
  2515. {
  2516. struct sk_buff *lb;
  2517. lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
  2518. if (lb == NULL)
  2519. return -ENOMEM;
  2520. NS_SKB_CB(lb)->buf_type = BUF_LG;
  2521. skb_queue_tail(&card->lbpool.queue, lb);
  2522. skb_reserve(lb, NS_SMBUFSIZE);
  2523. push_rxbufs(card, lb);
  2524. }
  2525. break;
  2526. case NS_BUFTYPE_HUGE:
  2527. while (card->hbpool.count > card->hbnr.init)
  2528. {
  2529. struct sk_buff *hb;
  2530. ns_grab_int_lock(card, flags);
  2531. hb = skb_dequeue(&card->hbpool.queue);
  2532. card->hbpool.count--;
  2533. spin_unlock_irqrestore(&card->int_lock, flags);
  2534. if (hb == NULL)
  2535. printk("nicstar%d: huge buffer count inconsistent.\n",
  2536. card->index);
  2537. else
  2538. dev_kfree_skb_any(hb);
  2539. }
  2540. while (card->hbpool.count < card->hbnr.init)
  2541. {
  2542. struct sk_buff *hb;
  2543. hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
  2544. if (hb == NULL)
  2545. return -ENOMEM;
  2546. NS_SKB_CB(hb)->buf_type = BUF_NONE;
  2547. ns_grab_int_lock(card, flags);
  2548. skb_queue_tail(&card->hbpool.queue, hb);
  2549. card->hbpool.count++;
  2550. spin_unlock_irqrestore(&card->int_lock, flags);
  2551. }
  2552. break;
  2553. case NS_BUFTYPE_IOVEC:
  2554. while (card->iovpool.count > card->iovnr.init)
  2555. {
  2556. struct sk_buff *iovb;
  2557. ns_grab_int_lock(card, flags);
  2558. iovb = skb_dequeue(&card->iovpool.queue);
  2559. card->iovpool.count--;
  2560. spin_unlock_irqrestore(&card->int_lock, flags);
  2561. if (iovb == NULL)
  2562. printk("nicstar%d: iovec buffer count inconsistent.\n",
  2563. card->index);
  2564. else
  2565. dev_kfree_skb_any(iovb);
  2566. }
  2567. while (card->iovpool.count < card->iovnr.init)
  2568. {
  2569. struct sk_buff *iovb;
  2570. iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
  2571. if (iovb == NULL)
  2572. return -ENOMEM;
  2573. NS_SKB_CB(iovb)->buf_type = BUF_NONE;
  2574. ns_grab_int_lock(card, flags);
  2575. skb_queue_tail(&card->iovpool.queue, iovb);
  2576. card->iovpool.count++;
  2577. spin_unlock_irqrestore(&card->int_lock, flags);
  2578. }
  2579. break;
  2580. default:
  2581. return -EINVAL;
  2582. }
  2583. return 0;
  2584. default:
  2585. if (dev->phy && dev->phy->ioctl) {
  2586. return dev->phy->ioctl(dev, cmd, arg);
  2587. }
  2588. else {
  2589. printk("nicstar%d: %s == NULL \n", card->index,
  2590. dev->phy ? "dev->phy->ioctl" : "dev->phy");
  2591. return -ENOIOCTLCMD;
  2592. }
  2593. }
  2594. }
  2595. static void which_list(ns_dev *card, struct sk_buff *skb)
  2596. {
  2597. printk("skb buf_type: 0x%08x\n", NS_SKB_CB(skb)->buf_type);
  2598. }
  2599. static void ns_poll(unsigned long arg)
  2600. {
  2601. int i;
  2602. ns_dev *card;
  2603. unsigned long flags;
  2604. u32 stat_r, stat_w;
  2605. PRINTK("nicstar: Entering ns_poll().\n");
  2606. for (i = 0; i < num_cards; i++)
  2607. {
  2608. card = cards[i];
  2609. if (spin_is_locked(&card->int_lock)) {
  2610. /* Probably it isn't worth spinning */
  2611. continue;
  2612. }
  2613. ns_grab_int_lock(card, flags);
  2614. stat_w = 0;
  2615. stat_r = readl(card->membase + STAT);
  2616. if (stat_r & NS_STAT_TSIF)
  2617. stat_w |= NS_STAT_TSIF;
  2618. if (stat_r & NS_STAT_EOPDU)
  2619. stat_w |= NS_STAT_EOPDU;
  2620. process_tsq(card);
  2621. process_rsq(card);
  2622. writel(stat_w, card->membase + STAT);
  2623. spin_unlock_irqrestore(&card->int_lock, flags);
  2624. }
  2625. mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
  2626. PRINTK("nicstar: Leaving ns_poll().\n");
  2627. }
  2628. static int ns_parse_mac(char *mac, unsigned char *esi)
  2629. {
  2630. int i, j;
  2631. short byte1, byte0;
  2632. if (mac == NULL || esi == NULL)
  2633. return -1;
  2634. j = 0;
  2635. for (i = 0; i < 6; i++)
  2636. {
  2637. if ((byte1 = ns_h2i(mac[j++])) < 0)
  2638. return -1;
  2639. if ((byte0 = ns_h2i(mac[j++])) < 0)
  2640. return -1;
  2641. esi[i] = (unsigned char) (byte1 * 16 + byte0);
  2642. if (i < 5)
  2643. {
  2644. if (mac[j++] != ':')
  2645. return -1;
  2646. }
  2647. }
  2648. return 0;
  2649. }
  2650. static short ns_h2i(char c)
  2651. {
  2652. if (c >= '0' && c <= '9')
  2653. return (short) (c - '0');
  2654. if (c >= 'A' && c <= 'F')
  2655. return (short) (c - 'A' + 10);
  2656. if (c >= 'a' && c <= 'f')
  2657. return (short) (c - 'a' + 10);
  2658. return -1;
  2659. }
  2660. static void ns_phy_put(struct atm_dev *dev, unsigned char value,
  2661. unsigned long addr)
  2662. {
  2663. ns_dev *card;
  2664. unsigned long flags;
  2665. card = dev->dev_data;
  2666. ns_grab_res_lock(card, flags);
  2667. while(CMD_BUSY(card));
  2668. writel((unsigned long) value, card->membase + DR0);
  2669. writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
  2670. card->membase + CMD);
  2671. spin_unlock_irqrestore(&card->res_lock, flags);
  2672. }
  2673. static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
  2674. {
  2675. ns_dev *card;
  2676. unsigned long flags;
  2677. unsigned long data;
  2678. card = dev->dev_data;
  2679. ns_grab_res_lock(card, flags);
  2680. while(CMD_BUSY(card));
  2681. writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
  2682. card->membase + CMD);
  2683. while(CMD_BUSY(card));
  2684. data = readl(card->membase + DR0) & 0x000000FF;
  2685. spin_unlock_irqrestore(&card->res_lock, flags);
  2686. return (unsigned char) data;
  2687. }
  2688. module_init(nicstar_init);
  2689. module_exit(nicstar_cleanup);