unaligned.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662
  1. /* $Id: unaligned.c,v 1.24 2002/02/09 19:49:31 davem Exp $
  2. * unaligned.c: Unaligned load/store trap handling with special
  3. * cases for the kernel to do them more quickly.
  4. *
  5. * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
  6. * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/sched.h>
  10. #include <linux/mm.h>
  11. #include <linux/module.h>
  12. #include <asm/asi.h>
  13. #include <asm/ptrace.h>
  14. #include <asm/pstate.h>
  15. #include <asm/processor.h>
  16. #include <asm/system.h>
  17. #include <asm/uaccess.h>
  18. #include <linux/smp.h>
  19. #include <linux/smp_lock.h>
  20. #include <linux/bitops.h>
  21. #include <asm/fpumacro.h>
  22. /* #define DEBUG_MNA */
  23. enum direction {
  24. load, /* ld, ldd, ldh, ldsh */
  25. store, /* st, std, sth, stsh */
  26. both, /* Swap, ldstub, cas, ... */
  27. fpld,
  28. fpst,
  29. invalid,
  30. };
  31. #ifdef DEBUG_MNA
  32. static char *dirstrings[] = {
  33. "load", "store", "both", "fpload", "fpstore", "invalid"
  34. };
  35. #endif
  36. static inline enum direction decode_direction(unsigned int insn)
  37. {
  38. unsigned long tmp = (insn >> 21) & 1;
  39. if (!tmp)
  40. return load;
  41. else {
  42. switch ((insn>>19)&0xf) {
  43. case 15: /* swap* */
  44. return both;
  45. default:
  46. return store;
  47. }
  48. }
  49. }
  50. /* 16 = double-word, 8 = extra-word, 4 = word, 2 = half-word */
  51. static inline int decode_access_size(unsigned int insn)
  52. {
  53. unsigned int tmp;
  54. tmp = ((insn >> 19) & 0xf);
  55. if (tmp == 11 || tmp == 14) /* ldx/stx */
  56. return 8;
  57. tmp &= 3;
  58. if (!tmp)
  59. return 4;
  60. else if (tmp == 3)
  61. return 16; /* ldd/std - Although it is actually 8 */
  62. else if (tmp == 2)
  63. return 2;
  64. else {
  65. printk("Impossible unaligned trap. insn=%08x\n", insn);
  66. die_if_kernel("Byte sized unaligned access?!?!", current_thread_info()->kregs);
  67. /* GCC should never warn that control reaches the end
  68. * of this function without returning a value because
  69. * die_if_kernel() is marked with attribute 'noreturn'.
  70. * Alas, some versions do...
  71. */
  72. return 0;
  73. }
  74. }
  75. static inline int decode_asi(unsigned int insn, struct pt_regs *regs)
  76. {
  77. if (insn & 0x800000) {
  78. if (insn & 0x2000)
  79. return (unsigned char)(regs->tstate >> 24); /* %asi */
  80. else
  81. return (unsigned char)(insn >> 5); /* imm_asi */
  82. } else
  83. return ASI_P;
  84. }
  85. /* 0x400000 = signed, 0 = unsigned */
  86. static inline int decode_signedness(unsigned int insn)
  87. {
  88. return (insn & 0x400000);
  89. }
  90. static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
  91. unsigned int rd, int from_kernel)
  92. {
  93. if (rs2 >= 16 || rs1 >= 16 || rd >= 16) {
  94. if (from_kernel != 0)
  95. __asm__ __volatile__("flushw");
  96. else
  97. flushw_user();
  98. }
  99. }
  100. static inline long sign_extend_imm13(long imm)
  101. {
  102. return imm << 51 >> 51;
  103. }
  104. static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
  105. {
  106. unsigned long value;
  107. if (reg < 16)
  108. return (!reg ? 0 : regs->u_regs[reg]);
  109. if (regs->tstate & TSTATE_PRIV) {
  110. struct reg_window *win;
  111. win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
  112. value = win->locals[reg - 16];
  113. } else if (test_thread_flag(TIF_32BIT)) {
  114. struct reg_window32 __user *win32;
  115. win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
  116. get_user(value, &win32->locals[reg - 16]);
  117. } else {
  118. struct reg_window __user *win;
  119. win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
  120. get_user(value, &win->locals[reg - 16]);
  121. }
  122. return value;
  123. }
  124. static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
  125. {
  126. if (reg < 16)
  127. return &regs->u_regs[reg];
  128. if (regs->tstate & TSTATE_PRIV) {
  129. struct reg_window *win;
  130. win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
  131. return &win->locals[reg - 16];
  132. } else if (test_thread_flag(TIF_32BIT)) {
  133. struct reg_window32 *win32;
  134. win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
  135. return (unsigned long *)&win32->locals[reg - 16];
  136. } else {
  137. struct reg_window *win;
  138. win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
  139. return &win->locals[reg - 16];
  140. }
  141. }
  142. unsigned long compute_effective_address(struct pt_regs *regs,
  143. unsigned int insn, unsigned int rd)
  144. {
  145. unsigned int rs1 = (insn >> 14) & 0x1f;
  146. unsigned int rs2 = insn & 0x1f;
  147. int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
  148. if (insn & 0x2000) {
  149. maybe_flush_windows(rs1, 0, rd, from_kernel);
  150. return (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
  151. } else {
  152. maybe_flush_windows(rs1, rs2, rd, from_kernel);
  153. return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
  154. }
  155. }
  156. /* This is just to make gcc think die_if_kernel does return... */
  157. static void __attribute_used__ unaligned_panic(char *str, struct pt_regs *regs)
  158. {
  159. die_if_kernel(str, regs);
  160. }
  161. extern int do_int_load(unsigned long *dest_reg, int size,
  162. unsigned long *saddr, int is_signed, int asi);
  163. extern int __do_int_store(unsigned long *dst_addr, int size,
  164. unsigned long src_val, int asi);
  165. static inline int do_int_store(int reg_num, int size, unsigned long *dst_addr,
  166. struct pt_regs *regs, int asi, int orig_asi)
  167. {
  168. unsigned long zero = 0;
  169. unsigned long *src_val_p = &zero;
  170. unsigned long src_val;
  171. if (size == 16) {
  172. size = 8;
  173. zero = (((long)(reg_num ?
  174. (unsigned)fetch_reg(reg_num, regs) : 0)) << 32) |
  175. (unsigned)fetch_reg(reg_num + 1, regs);
  176. } else if (reg_num) {
  177. src_val_p = fetch_reg_addr(reg_num, regs);
  178. }
  179. src_val = *src_val_p;
  180. if (unlikely(asi != orig_asi)) {
  181. switch (size) {
  182. case 2:
  183. src_val = swab16(src_val);
  184. break;
  185. case 4:
  186. src_val = swab32(src_val);
  187. break;
  188. case 8:
  189. src_val = swab64(src_val);
  190. break;
  191. case 16:
  192. default:
  193. BUG();
  194. break;
  195. };
  196. }
  197. return __do_int_store(dst_addr, size, src_val, asi);
  198. }
  199. static inline void advance(struct pt_regs *regs)
  200. {
  201. regs->tpc = regs->tnpc;
  202. regs->tnpc += 4;
  203. if (test_thread_flag(TIF_32BIT)) {
  204. regs->tpc &= 0xffffffff;
  205. regs->tnpc &= 0xffffffff;
  206. }
  207. }
  208. static inline int floating_point_load_or_store_p(unsigned int insn)
  209. {
  210. return (insn >> 24) & 1;
  211. }
  212. static inline int ok_for_kernel(unsigned int insn)
  213. {
  214. return !floating_point_load_or_store_p(insn);
  215. }
  216. static void kernel_mna_trap_fault(void)
  217. {
  218. struct pt_regs *regs = current_thread_info()->kern_una_regs;
  219. unsigned int insn = current_thread_info()->kern_una_insn;
  220. const struct exception_table_entry *entry;
  221. entry = search_exception_tables(regs->tpc);
  222. if (!entry) {
  223. unsigned long address;
  224. address = compute_effective_address(regs, insn,
  225. ((insn >> 25) & 0x1f));
  226. if (address < PAGE_SIZE) {
  227. printk(KERN_ALERT "Unable to handle kernel NULL "
  228. "pointer dereference in mna handler");
  229. } else
  230. printk(KERN_ALERT "Unable to handle kernel paging "
  231. "request in mna handler");
  232. printk(KERN_ALERT " at virtual address %016lx\n",address);
  233. printk(KERN_ALERT "current->{active_,}mm->context = %016lx\n",
  234. (current->mm ? CTX_HWBITS(current->mm->context) :
  235. CTX_HWBITS(current->active_mm->context)));
  236. printk(KERN_ALERT "current->{active_,}mm->pgd = %016lx\n",
  237. (current->mm ? (unsigned long) current->mm->pgd :
  238. (unsigned long) current->active_mm->pgd));
  239. die_if_kernel("Oops", regs);
  240. /* Not reached */
  241. }
  242. regs->tpc = entry->fixup;
  243. regs->tnpc = regs->tpc + 4;
  244. regs->tstate &= ~TSTATE_ASI;
  245. regs->tstate |= (ASI_AIUS << 24UL);
  246. }
  247. asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
  248. {
  249. enum direction dir = decode_direction(insn);
  250. int size = decode_access_size(insn);
  251. current_thread_info()->kern_una_regs = regs;
  252. current_thread_info()->kern_una_insn = insn;
  253. if (!ok_for_kernel(insn) || dir == both) {
  254. printk("Unsupported unaligned load/store trap for kernel "
  255. "at <%016lx>.\n", regs->tpc);
  256. unaligned_panic("Kernel does fpu/atomic "
  257. "unaligned load/store.", regs);
  258. kernel_mna_trap_fault();
  259. } else {
  260. unsigned long addr, *reg_addr;
  261. int orig_asi, asi, err;
  262. addr = compute_effective_address(regs, insn,
  263. ((insn >> 25) & 0x1f));
  264. #ifdef DEBUG_MNA
  265. printk("KMNA: pc=%016lx [dir=%s addr=%016lx size=%d] "
  266. "retpc[%016lx]\n",
  267. regs->tpc, dirstrings[dir], addr, size,
  268. regs->u_regs[UREG_RETPC]);
  269. #endif
  270. orig_asi = asi = decode_asi(insn, regs);
  271. switch (asi) {
  272. case ASI_NL:
  273. case ASI_AIUPL:
  274. case ASI_AIUSL:
  275. case ASI_PL:
  276. case ASI_SL:
  277. case ASI_PNFL:
  278. case ASI_SNFL:
  279. asi &= ~0x08;
  280. break;
  281. };
  282. switch (dir) {
  283. case load:
  284. reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs);
  285. err = do_int_load(reg_addr, size,
  286. (unsigned long *) addr,
  287. decode_signedness(insn), asi);
  288. if (likely(!err) && unlikely(asi != orig_asi)) {
  289. unsigned long val_in = *reg_addr;
  290. switch (size) {
  291. case 2:
  292. val_in = swab16(val_in);
  293. break;
  294. case 4:
  295. val_in = swab32(val_in);
  296. break;
  297. case 8:
  298. val_in = swab64(val_in);
  299. break;
  300. case 16:
  301. default:
  302. BUG();
  303. break;
  304. };
  305. *reg_addr = val_in;
  306. }
  307. break;
  308. case store:
  309. err = do_int_store(((insn>>25)&0x1f), size,
  310. (unsigned long *) addr, regs,
  311. asi, orig_asi);
  312. break;
  313. default:
  314. panic("Impossible kernel unaligned trap.");
  315. /* Not reached... */
  316. }
  317. if (unlikely(err))
  318. kernel_mna_trap_fault();
  319. else
  320. advance(regs);
  321. }
  322. }
  323. static char popc_helper[] = {
  324. 0, 1, 1, 2, 1, 2, 2, 3,
  325. 1, 2, 2, 3, 2, 3, 3, 4,
  326. };
  327. int handle_popc(u32 insn, struct pt_regs *regs)
  328. {
  329. u64 value;
  330. int ret, i, rd = ((insn >> 25) & 0x1f);
  331. int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
  332. if (insn & 0x2000) {
  333. maybe_flush_windows(0, 0, rd, from_kernel);
  334. value = sign_extend_imm13(insn);
  335. } else {
  336. maybe_flush_windows(0, insn & 0x1f, rd, from_kernel);
  337. value = fetch_reg(insn & 0x1f, regs);
  338. }
  339. for (ret = 0, i = 0; i < 16; i++) {
  340. ret += popc_helper[value & 0xf];
  341. value >>= 4;
  342. }
  343. if (rd < 16) {
  344. if (rd)
  345. regs->u_regs[rd] = ret;
  346. } else {
  347. if (test_thread_flag(TIF_32BIT)) {
  348. struct reg_window32 __user *win32;
  349. win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
  350. put_user(ret, &win32->locals[rd - 16]);
  351. } else {
  352. struct reg_window __user *win;
  353. win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
  354. put_user(ret, &win->locals[rd - 16]);
  355. }
  356. }
  357. advance(regs);
  358. return 1;
  359. }
  360. extern void do_fpother(struct pt_regs *regs);
  361. extern void do_privact(struct pt_regs *regs);
  362. extern void spitfire_data_access_exception(struct pt_regs *regs,
  363. unsigned long sfsr,
  364. unsigned long sfar);
  365. extern void sun4v_data_access_exception(struct pt_regs *regs,
  366. unsigned long addr,
  367. unsigned long type_ctx);
  368. int handle_ldf_stq(u32 insn, struct pt_regs *regs)
  369. {
  370. unsigned long addr = compute_effective_address(regs, insn, 0);
  371. int freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
  372. struct fpustate *f = FPUSTATE;
  373. int asi = decode_asi(insn, regs);
  374. int flag = (freg < 32) ? FPRS_DL : FPRS_DU;
  375. save_and_clear_fpu();
  376. current_thread_info()->xfsr[0] &= ~0x1c000;
  377. if (freg & 3) {
  378. current_thread_info()->xfsr[0] |= (6 << 14) /* invalid_fp_register */;
  379. do_fpother(regs);
  380. return 0;
  381. }
  382. if (insn & 0x200000) {
  383. /* STQ */
  384. u64 first = 0, second = 0;
  385. if (current_thread_info()->fpsaved[0] & flag) {
  386. first = *(u64 *)&f->regs[freg];
  387. second = *(u64 *)&f->regs[freg+2];
  388. }
  389. if (asi < 0x80) {
  390. do_privact(regs);
  391. return 1;
  392. }
  393. switch (asi) {
  394. case ASI_P:
  395. case ASI_S: break;
  396. case ASI_PL:
  397. case ASI_SL:
  398. {
  399. /* Need to convert endians */
  400. u64 tmp = __swab64p(&first);
  401. first = __swab64p(&second);
  402. second = tmp;
  403. break;
  404. }
  405. default:
  406. if (tlb_type == hypervisor)
  407. sun4v_data_access_exception(regs, addr, 0);
  408. else
  409. spitfire_data_access_exception(regs, 0, addr);
  410. return 1;
  411. }
  412. if (put_user (first >> 32, (u32 __user *)addr) ||
  413. __put_user ((u32)first, (u32 __user *)(addr + 4)) ||
  414. __put_user (second >> 32, (u32 __user *)(addr + 8)) ||
  415. __put_user ((u32)second, (u32 __user *)(addr + 12))) {
  416. if (tlb_type == hypervisor)
  417. sun4v_data_access_exception(regs, addr, 0);
  418. else
  419. spitfire_data_access_exception(regs, 0, addr);
  420. return 1;
  421. }
  422. } else {
  423. /* LDF, LDDF, LDQF */
  424. u32 data[4] __attribute__ ((aligned(8)));
  425. int size, i;
  426. int err;
  427. if (asi < 0x80) {
  428. do_privact(regs);
  429. return 1;
  430. } else if (asi > ASI_SNFL) {
  431. if (tlb_type == hypervisor)
  432. sun4v_data_access_exception(regs, addr, 0);
  433. else
  434. spitfire_data_access_exception(regs, 0, addr);
  435. return 1;
  436. }
  437. switch (insn & 0x180000) {
  438. case 0x000000: size = 1; break;
  439. case 0x100000: size = 4; break;
  440. default: size = 2; break;
  441. }
  442. for (i = 0; i < size; i++)
  443. data[i] = 0;
  444. err = get_user (data[0], (u32 __user *) addr);
  445. if (!err) {
  446. for (i = 1; i < size; i++)
  447. err |= __get_user (data[i], (u32 __user *)(addr + 4*i));
  448. }
  449. if (err && !(asi & 0x2 /* NF */)) {
  450. if (tlb_type == hypervisor)
  451. sun4v_data_access_exception(regs, addr, 0);
  452. else
  453. spitfire_data_access_exception(regs, 0, addr);
  454. return 1;
  455. }
  456. if (asi & 0x8) /* Little */ {
  457. u64 tmp;
  458. switch (size) {
  459. case 1: data[0] = le32_to_cpup(data + 0); break;
  460. default:*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 0));
  461. break;
  462. case 4: tmp = le64_to_cpup((u64 *)(data + 0));
  463. *(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 2));
  464. *(u64 *)(data + 2) = tmp;
  465. break;
  466. }
  467. }
  468. if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
  469. current_thread_info()->fpsaved[0] = FPRS_FEF;
  470. current_thread_info()->gsr[0] = 0;
  471. }
  472. if (!(current_thread_info()->fpsaved[0] & flag)) {
  473. if (freg < 32)
  474. memset(f->regs, 0, 32*sizeof(u32));
  475. else
  476. memset(f->regs+32, 0, 32*sizeof(u32));
  477. }
  478. memcpy(f->regs + freg, data, size * 4);
  479. current_thread_info()->fpsaved[0] |= flag;
  480. }
  481. advance(regs);
  482. return 1;
  483. }
  484. void handle_ld_nf(u32 insn, struct pt_regs *regs)
  485. {
  486. int rd = ((insn >> 25) & 0x1f);
  487. int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
  488. unsigned long *reg;
  489. maybe_flush_windows(0, 0, rd, from_kernel);
  490. reg = fetch_reg_addr(rd, regs);
  491. if (from_kernel || rd < 16) {
  492. reg[0] = 0;
  493. if ((insn & 0x780000) == 0x180000)
  494. reg[1] = 0;
  495. } else if (test_thread_flag(TIF_32BIT)) {
  496. put_user(0, (int __user *) reg);
  497. if ((insn & 0x780000) == 0x180000)
  498. put_user(0, ((int __user *) reg) + 1);
  499. } else {
  500. put_user(0, (unsigned long __user *) reg);
  501. if ((insn & 0x780000) == 0x180000)
  502. put_user(0, (unsigned long __user *) reg + 1);
  503. }
  504. advance(regs);
  505. }
  506. void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
  507. {
  508. unsigned long pc = regs->tpc;
  509. unsigned long tstate = regs->tstate;
  510. u32 insn;
  511. u32 first, second;
  512. u64 value;
  513. u8 freg;
  514. int flag;
  515. struct fpustate *f = FPUSTATE;
  516. if (tstate & TSTATE_PRIV)
  517. die_if_kernel("lddfmna from kernel", regs);
  518. if (test_thread_flag(TIF_32BIT))
  519. pc = (u32)pc;
  520. if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
  521. int asi = decode_asi(insn, regs);
  522. if ((asi > ASI_SNFL) ||
  523. (asi < ASI_P))
  524. goto daex;
  525. if (get_user(first, (u32 __user *)sfar) ||
  526. get_user(second, (u32 __user *)(sfar + 4))) {
  527. if (asi & 0x2) /* NF */ {
  528. first = 0; second = 0;
  529. } else
  530. goto daex;
  531. }
  532. save_and_clear_fpu();
  533. freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
  534. value = (((u64)first) << 32) | second;
  535. if (asi & 0x8) /* Little */
  536. value = __swab64p(&value);
  537. flag = (freg < 32) ? FPRS_DL : FPRS_DU;
  538. if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
  539. current_thread_info()->fpsaved[0] = FPRS_FEF;
  540. current_thread_info()->gsr[0] = 0;
  541. }
  542. if (!(current_thread_info()->fpsaved[0] & flag)) {
  543. if (freg < 32)
  544. memset(f->regs, 0, 32*sizeof(u32));
  545. else
  546. memset(f->regs+32, 0, 32*sizeof(u32));
  547. }
  548. *(u64 *)(f->regs + freg) = value;
  549. current_thread_info()->fpsaved[0] |= flag;
  550. } else {
  551. daex:
  552. if (tlb_type == hypervisor)
  553. sun4v_data_access_exception(regs, sfar, sfsr);
  554. else
  555. spitfire_data_access_exception(regs, sfsr, sfar);
  556. return;
  557. }
  558. advance(regs);
  559. return;
  560. }
  561. void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
  562. {
  563. unsigned long pc = regs->tpc;
  564. unsigned long tstate = regs->tstate;
  565. u32 insn;
  566. u64 value;
  567. u8 freg;
  568. int flag;
  569. struct fpustate *f = FPUSTATE;
  570. if (tstate & TSTATE_PRIV)
  571. die_if_kernel("stdfmna from kernel", regs);
  572. if (test_thread_flag(TIF_32BIT))
  573. pc = (u32)pc;
  574. if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
  575. int asi = decode_asi(insn, regs);
  576. freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
  577. value = 0;
  578. flag = (freg < 32) ? FPRS_DL : FPRS_DU;
  579. if ((asi > ASI_SNFL) ||
  580. (asi < ASI_P))
  581. goto daex;
  582. save_and_clear_fpu();
  583. if (current_thread_info()->fpsaved[0] & flag)
  584. value = *(u64 *)&f->regs[freg];
  585. switch (asi) {
  586. case ASI_P:
  587. case ASI_S: break;
  588. case ASI_PL:
  589. case ASI_SL:
  590. value = __swab64p(&value); break;
  591. default: goto daex;
  592. }
  593. if (put_user (value >> 32, (u32 __user *) sfar) ||
  594. __put_user ((u32)value, (u32 __user *)(sfar + 4)))
  595. goto daex;
  596. } else {
  597. daex:
  598. if (tlb_type == hypervisor)
  599. sun4v_data_access_exception(regs, sfar, sfsr);
  600. else
  601. spitfire_data_access_exception(regs, sfsr, sfar);
  602. return;
  603. }
  604. advance(regs);
  605. return;
  606. }