sun4d_irq.c 14 KB

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  1. /* $Id: sun4d_irq.c,v 1.29 2001/12/11 04:55:51 davem Exp $
  2. * arch/sparc/kernel/sun4d_irq.c:
  3. * SS1000/SC2000 interrupt handling.
  4. *
  5. * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  6. * Heavily based on arch/sparc/kernel/irq.c.
  7. */
  8. #include <linux/config.h>
  9. #include <linux/errno.h>
  10. #include <linux/linkage.h>
  11. #include <linux/kernel_stat.h>
  12. #include <linux/signal.h>
  13. #include <linux/sched.h>
  14. #include <linux/ptrace.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/slab.h>
  17. #include <linux/random.h>
  18. #include <linux/init.h>
  19. #include <linux/smp.h>
  20. #include <linux/smp_lock.h>
  21. #include <linux/spinlock.h>
  22. #include <linux/seq_file.h>
  23. #include <asm/ptrace.h>
  24. #include <asm/processor.h>
  25. #include <asm/system.h>
  26. #include <asm/psr.h>
  27. #include <asm/smp.h>
  28. #include <asm/vaddrs.h>
  29. #include <asm/timer.h>
  30. #include <asm/openprom.h>
  31. #include <asm/oplib.h>
  32. #include <asm/traps.h>
  33. #include <asm/irq.h>
  34. #include <asm/io.h>
  35. #include <asm/pgalloc.h>
  36. #include <asm/pgtable.h>
  37. #include <asm/sbus.h>
  38. #include <asm/sbi.h>
  39. #include <asm/cacheflush.h>
  40. /* If you trust current SCSI layer to handle different SCSI IRQs, enable this. I don't trust it... -jj */
  41. /* #define DISTRIBUTE_IRQS */
  42. struct sun4d_timer_regs *sun4d_timers;
  43. #define TIMER_IRQ 10
  44. #define MAX_STATIC_ALLOC 4
  45. extern struct irqaction static_irqaction[MAX_STATIC_ALLOC];
  46. extern int static_irq_count;
  47. unsigned char cpu_leds[32];
  48. #ifdef CONFIG_SMP
  49. unsigned char sbus_tid[32];
  50. #endif
  51. static struct irqaction *irq_action[NR_IRQS];
  52. extern spinlock_t irq_action_lock;
  53. struct sbus_action {
  54. struct irqaction *action;
  55. /* For SMP this needs to be extended */
  56. } *sbus_actions;
  57. static int pil_to_sbus[] = {
  58. 0, 0, 1, 2, 0, 3, 0, 4, 0, 5, 0, 6, 0, 7, 0, 0,
  59. };
  60. static int sbus_to_pil[] = {
  61. 0, 2, 3, 5, 7, 9, 11, 13,
  62. };
  63. static int nsbi;
  64. #ifdef CONFIG_SMP
  65. DEFINE_SPINLOCK(sun4d_imsk_lock);
  66. #endif
  67. int show_sun4d_interrupts(struct seq_file *p, void *v)
  68. {
  69. int i = *(loff_t *) v, j = 0, k = 0, sbusl;
  70. struct irqaction * action;
  71. unsigned long flags;
  72. #ifdef CONFIG_SMP
  73. int x;
  74. #endif
  75. spin_lock_irqsave(&irq_action_lock, flags);
  76. if (i < NR_IRQS) {
  77. sbusl = pil_to_sbus[i];
  78. if (!sbusl) {
  79. action = *(i + irq_action);
  80. if (!action)
  81. goto out_unlock;
  82. } else {
  83. for (j = 0; j < nsbi; j++) {
  84. for (k = 0; k < 4; k++)
  85. if ((action = sbus_actions [(j << 5) + (sbusl << 2) + k].action))
  86. goto found_it;
  87. }
  88. goto out_unlock;
  89. }
  90. found_it: seq_printf(p, "%3d: ", i);
  91. #ifndef CONFIG_SMP
  92. seq_printf(p, "%10u ", kstat_irqs(i));
  93. #else
  94. for_each_online_cpu(x)
  95. seq_printf(p, "%10u ",
  96. kstat_cpu(cpu_logical_map(x)).irqs[i]);
  97. #endif
  98. seq_printf(p, "%c %s",
  99. (action->flags & SA_INTERRUPT) ? '+' : ' ',
  100. action->name);
  101. action = action->next;
  102. for (;;) {
  103. for (; action; action = action->next) {
  104. seq_printf(p, ",%s %s",
  105. (action->flags & SA_INTERRUPT) ? " +" : "",
  106. action->name);
  107. }
  108. if (!sbusl) break;
  109. k++;
  110. if (k < 4)
  111. action = sbus_actions [(j << 5) + (sbusl << 2) + k].action;
  112. else {
  113. j++;
  114. if (j == nsbi) break;
  115. k = 0;
  116. action = sbus_actions [(j << 5) + (sbusl << 2)].action;
  117. }
  118. }
  119. seq_putc(p, '\n');
  120. }
  121. out_unlock:
  122. spin_unlock_irqrestore(&irq_action_lock, flags);
  123. return 0;
  124. }
  125. void sun4d_free_irq(unsigned int irq, void *dev_id)
  126. {
  127. struct irqaction *action, **actionp;
  128. struct irqaction *tmp = NULL;
  129. unsigned long flags;
  130. spin_lock_irqsave(&irq_action_lock, flags);
  131. if (irq < 15)
  132. actionp = irq + irq_action;
  133. else
  134. actionp = &(sbus_actions[irq - (1 << 5)].action);
  135. action = *actionp;
  136. if (!action) {
  137. printk("Trying to free free IRQ%d\n",irq);
  138. goto out_unlock;
  139. }
  140. if (dev_id) {
  141. for (; action; action = action->next) {
  142. if (action->dev_id == dev_id)
  143. break;
  144. tmp = action;
  145. }
  146. if (!action) {
  147. printk("Trying to free free shared IRQ%d\n",irq);
  148. goto out_unlock;
  149. }
  150. } else if (action->flags & SA_SHIRQ) {
  151. printk("Trying to free shared IRQ%d with NULL device ID\n", irq);
  152. goto out_unlock;
  153. }
  154. if (action->flags & SA_STATIC_ALLOC)
  155. {
  156. /* This interrupt is marked as specially allocated
  157. * so it is a bad idea to free it.
  158. */
  159. printk("Attempt to free statically allocated IRQ%d (%s)\n",
  160. irq, action->name);
  161. goto out_unlock;
  162. }
  163. if (action && tmp)
  164. tmp->next = action->next;
  165. else
  166. *actionp = action->next;
  167. spin_unlock_irqrestore(&irq_action_lock, flags);
  168. synchronize_irq(irq);
  169. spin_lock_irqsave(&irq_action_lock, flags);
  170. kfree(action);
  171. if (!(*actionp))
  172. disable_irq(irq);
  173. out_unlock:
  174. spin_unlock_irqrestore(&irq_action_lock, flags);
  175. }
  176. extern void unexpected_irq(int, void *, struct pt_regs *);
  177. void sun4d_handler_irq(int irq, struct pt_regs * regs)
  178. {
  179. struct irqaction * action;
  180. int cpu = smp_processor_id();
  181. /* SBUS IRQ level (1 - 7) */
  182. int sbusl = pil_to_sbus[irq];
  183. /* FIXME: Is this necessary?? */
  184. cc_get_ipen();
  185. cc_set_iclr(1 << irq);
  186. irq_enter();
  187. kstat_cpu(cpu).irqs[irq]++;
  188. if (!sbusl) {
  189. action = *(irq + irq_action);
  190. if (!action)
  191. unexpected_irq(irq, NULL, regs);
  192. do {
  193. action->handler(irq, action->dev_id, regs);
  194. action = action->next;
  195. } while (action);
  196. } else {
  197. int bus_mask = bw_get_intr_mask(sbusl) & 0x3ffff;
  198. int sbino;
  199. struct sbus_action *actionp;
  200. unsigned mask, slot;
  201. int sbil = (sbusl << 2);
  202. bw_clear_intr_mask(sbusl, bus_mask);
  203. /* Loop for each pending SBI */
  204. for (sbino = 0; bus_mask; sbino++, bus_mask >>= 1)
  205. if (bus_mask & 1) {
  206. mask = acquire_sbi(SBI2DEVID(sbino), 0xf << sbil);
  207. mask &= (0xf << sbil);
  208. actionp = sbus_actions + (sbino << 5) + (sbil);
  209. /* Loop for each pending SBI slot */
  210. for (slot = (1 << sbil); mask; slot <<= 1, actionp++)
  211. if (mask & slot) {
  212. mask &= ~slot;
  213. action = actionp->action;
  214. if (!action)
  215. unexpected_irq(irq, NULL, regs);
  216. do {
  217. action->handler(irq, action->dev_id, regs);
  218. action = action->next;
  219. } while (action);
  220. release_sbi(SBI2DEVID(sbino), slot);
  221. }
  222. }
  223. }
  224. irq_exit();
  225. }
  226. unsigned int sun4d_build_irq(struct sbus_dev *sdev, int irq)
  227. {
  228. int sbusl = pil_to_sbus[irq];
  229. if (sbusl)
  230. return ((sdev->bus->board + 1) << 5) + (sbusl << 2) + sdev->slot;
  231. else
  232. return irq;
  233. }
  234. unsigned int sun4d_sbint_to_irq(struct sbus_dev *sdev, unsigned int sbint)
  235. {
  236. if (sbint >= sizeof(sbus_to_pil)) {
  237. printk(KERN_ERR "%s: bogus SBINT %d\n", sdev->prom_name, sbint);
  238. BUG();
  239. }
  240. return sun4d_build_irq(sdev, sbus_to_pil[sbint]);
  241. }
  242. int sun4d_request_irq(unsigned int irq,
  243. irqreturn_t (*handler)(int, void *, struct pt_regs *),
  244. unsigned long irqflags, const char * devname, void *dev_id)
  245. {
  246. struct irqaction *action, *tmp = NULL, **actionp;
  247. unsigned long flags;
  248. int ret;
  249. if(irq > 14 && irq < (1 << 5)) {
  250. ret = -EINVAL;
  251. goto out;
  252. }
  253. if (!handler) {
  254. ret = -EINVAL;
  255. goto out;
  256. }
  257. spin_lock_irqsave(&irq_action_lock, flags);
  258. if (irq >= (1 << 5))
  259. actionp = &(sbus_actions[irq - (1 << 5)].action);
  260. else
  261. actionp = irq + irq_action;
  262. action = *actionp;
  263. if (action) {
  264. if ((action->flags & SA_SHIRQ) && (irqflags & SA_SHIRQ)) {
  265. for (tmp = action; tmp->next; tmp = tmp->next);
  266. } else {
  267. ret = -EBUSY;
  268. goto out_unlock;
  269. }
  270. if ((action->flags & SA_INTERRUPT) ^ (irqflags & SA_INTERRUPT)) {
  271. printk("Attempt to mix fast and slow interrupts on IRQ%d denied\n", irq);
  272. ret = -EBUSY;
  273. goto out_unlock;
  274. }
  275. action = NULL; /* Or else! */
  276. }
  277. /* If this is flagged as statically allocated then we use our
  278. * private struct which is never freed.
  279. */
  280. if (irqflags & SA_STATIC_ALLOC) {
  281. if (static_irq_count < MAX_STATIC_ALLOC)
  282. action = &static_irqaction[static_irq_count++];
  283. else
  284. printk("Request for IRQ%d (%s) SA_STATIC_ALLOC failed using kmalloc\n", irq, devname);
  285. }
  286. if (action == NULL)
  287. action = (struct irqaction *)kmalloc(sizeof(struct irqaction),
  288. GFP_ATOMIC);
  289. if (!action) {
  290. ret = -ENOMEM;
  291. goto out_unlock;
  292. }
  293. action->handler = handler;
  294. action->flags = irqflags;
  295. cpus_clear(action->mask);
  296. action->name = devname;
  297. action->next = NULL;
  298. action->dev_id = dev_id;
  299. if (tmp)
  300. tmp->next = action;
  301. else
  302. *actionp = action;
  303. enable_irq(irq);
  304. ret = 0;
  305. out_unlock:
  306. spin_unlock_irqrestore(&irq_action_lock, flags);
  307. out:
  308. return ret;
  309. }
  310. static void sun4d_disable_irq(unsigned int irq)
  311. {
  312. #ifdef CONFIG_SMP
  313. int tid = sbus_tid[(irq >> 5) - 1];
  314. unsigned long flags;
  315. #endif
  316. if (irq < NR_IRQS) return;
  317. #ifdef CONFIG_SMP
  318. spin_lock_irqsave(&sun4d_imsk_lock, flags);
  319. cc_set_imsk_other(tid, cc_get_imsk_other(tid) | (1 << sbus_to_pil[(irq >> 2) & 7]));
  320. spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
  321. #else
  322. cc_set_imsk(cc_get_imsk() | (1 << sbus_to_pil[(irq >> 2) & 7]));
  323. #endif
  324. }
  325. static void sun4d_enable_irq(unsigned int irq)
  326. {
  327. #ifdef CONFIG_SMP
  328. int tid = sbus_tid[(irq >> 5) - 1];
  329. unsigned long flags;
  330. #endif
  331. if (irq < NR_IRQS) return;
  332. #ifdef CONFIG_SMP
  333. spin_lock_irqsave(&sun4d_imsk_lock, flags);
  334. cc_set_imsk_other(tid, cc_get_imsk_other(tid) & ~(1 << sbus_to_pil[(irq >> 2) & 7]));
  335. spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
  336. #else
  337. cc_set_imsk(cc_get_imsk() & ~(1 << sbus_to_pil[(irq >> 2) & 7]));
  338. #endif
  339. }
  340. #ifdef CONFIG_SMP
  341. static void sun4d_set_cpu_int(int cpu, int level)
  342. {
  343. sun4d_send_ipi(cpu, level);
  344. }
  345. static void sun4d_clear_ipi(int cpu, int level)
  346. {
  347. }
  348. static void sun4d_set_udt(int cpu)
  349. {
  350. }
  351. /* Setup IRQ distribution scheme. */
  352. void __init sun4d_distribute_irqs(void)
  353. {
  354. #ifdef DISTRIBUTE_IRQS
  355. struct sbus_bus *sbus;
  356. unsigned long sbus_serving_map;
  357. sbus_serving_map = cpu_present_map;
  358. for_each_sbus(sbus) {
  359. if ((sbus->board * 2) == boot_cpu_id && (cpu_present_map & (1 << (sbus->board * 2 + 1))))
  360. sbus_tid[sbus->board] = (sbus->board * 2 + 1);
  361. else if (cpu_present_map & (1 << (sbus->board * 2)))
  362. sbus_tid[sbus->board] = (sbus->board * 2);
  363. else if (cpu_present_map & (1 << (sbus->board * 2 + 1)))
  364. sbus_tid[sbus->board] = (sbus->board * 2 + 1);
  365. else
  366. sbus_tid[sbus->board] = 0xff;
  367. if (sbus_tid[sbus->board] != 0xff)
  368. sbus_serving_map &= ~(1 << sbus_tid[sbus->board]);
  369. }
  370. for_each_sbus(sbus)
  371. if (sbus_tid[sbus->board] == 0xff) {
  372. int i = 31;
  373. if (!sbus_serving_map)
  374. sbus_serving_map = cpu_present_map;
  375. while (!(sbus_serving_map & (1 << i)))
  376. i--;
  377. sbus_tid[sbus->board] = i;
  378. sbus_serving_map &= ~(1 << i);
  379. }
  380. for_each_sbus(sbus) {
  381. printk("sbus%d IRQs directed to CPU%d\n", sbus->board, sbus_tid[sbus->board]);
  382. set_sbi_tid(sbus->devid, sbus_tid[sbus->board] << 3);
  383. }
  384. #else
  385. struct sbus_bus *sbus;
  386. int cpuid = cpu_logical_map(1);
  387. if (cpuid == -1)
  388. cpuid = cpu_logical_map(0);
  389. for_each_sbus(sbus) {
  390. sbus_tid[sbus->board] = cpuid;
  391. set_sbi_tid(sbus->devid, cpuid << 3);
  392. }
  393. printk("All sbus IRQs directed to CPU%d\n", cpuid);
  394. #endif
  395. }
  396. #endif
  397. static void sun4d_clear_clock_irq(void)
  398. {
  399. volatile unsigned int clear_intr;
  400. clear_intr = sun4d_timers->l10_timer_limit;
  401. }
  402. static void sun4d_clear_profile_irq(int cpu)
  403. {
  404. bw_get_prof_limit(cpu);
  405. }
  406. static void sun4d_load_profile_irq(int cpu, unsigned int limit)
  407. {
  408. bw_set_prof_limit(cpu, limit);
  409. }
  410. static void __init sun4d_init_timers(irqreturn_t (*counter_fn)(int, void *, struct pt_regs *))
  411. {
  412. int irq;
  413. int cpu;
  414. struct resource r;
  415. int mid;
  416. /* Map the User Timer registers. */
  417. memset(&r, 0, sizeof(r));
  418. #ifdef CONFIG_SMP
  419. r.start = CSR_BASE(boot_cpu_id)+BW_TIMER_LIMIT;
  420. #else
  421. r.start = CSR_BASE(0)+BW_TIMER_LIMIT;
  422. #endif
  423. r.flags = 0xf;
  424. sun4d_timers = (struct sun4d_timer_regs *) sbus_ioremap(&r, 0,
  425. PAGE_SIZE, "user timer");
  426. sun4d_timers->l10_timer_limit = (((1000000/HZ) + 1) << 10);
  427. master_l10_counter = &sun4d_timers->l10_cur_count;
  428. master_l10_limit = &sun4d_timers->l10_timer_limit;
  429. irq = request_irq(TIMER_IRQ,
  430. counter_fn,
  431. (SA_INTERRUPT | SA_STATIC_ALLOC),
  432. "timer", NULL);
  433. if (irq) {
  434. prom_printf("time_init: unable to attach IRQ%d\n",TIMER_IRQ);
  435. prom_halt();
  436. }
  437. /* Enable user timer free run for CPU 0 in BW */
  438. /* bw_set_ctrl(0, bw_get_ctrl(0) | BW_CTRL_USER_TIMER); */
  439. cpu = 0;
  440. while (!cpu_find_by_instance(cpu, NULL, &mid)) {
  441. sun4d_load_profile_irq(mid >> 3, 0);
  442. cpu++;
  443. }
  444. #ifdef CONFIG_SMP
  445. {
  446. unsigned long flags;
  447. extern unsigned long lvl14_save[4];
  448. struct tt_entry *trap_table = &sparc_ttable[SP_TRAP_IRQ1 + (14 - 1)];
  449. extern unsigned int real_irq_entry[], smp4d_ticker[];
  450. extern unsigned int patchme_maybe_smp_msg[];
  451. /* Adjust so that we jump directly to smp4d_ticker */
  452. lvl14_save[2] += smp4d_ticker - real_irq_entry;
  453. /* For SMP we use the level 14 ticker, however the bootup code
  454. * has copied the firmwares level 14 vector into boot cpu's
  455. * trap table, we must fix this now or we get squashed.
  456. */
  457. local_irq_save(flags);
  458. patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */
  459. trap_table->inst_one = lvl14_save[0];
  460. trap_table->inst_two = lvl14_save[1];
  461. trap_table->inst_three = lvl14_save[2];
  462. trap_table->inst_four = lvl14_save[3];
  463. local_flush_cache_all();
  464. local_irq_restore(flags);
  465. }
  466. #endif
  467. }
  468. void __init sun4d_init_sbi_irq(void)
  469. {
  470. struct sbus_bus *sbus;
  471. unsigned mask;
  472. nsbi = 0;
  473. for_each_sbus(sbus)
  474. nsbi++;
  475. sbus_actions = (struct sbus_action *)kmalloc (nsbi * 8 * 4 * sizeof(struct sbus_action), GFP_ATOMIC);
  476. memset (sbus_actions, 0, (nsbi * 8 * 4 * sizeof(struct sbus_action)));
  477. for_each_sbus(sbus) {
  478. #ifdef CONFIG_SMP
  479. extern unsigned char boot_cpu_id;
  480. set_sbi_tid(sbus->devid, boot_cpu_id << 3);
  481. sbus_tid[sbus->board] = boot_cpu_id;
  482. #endif
  483. /* Get rid of pending irqs from PROM */
  484. mask = acquire_sbi(sbus->devid, 0xffffffff);
  485. if (mask) {
  486. printk ("Clearing pending IRQs %08x on SBI %d\n", mask, sbus->board);
  487. release_sbi(sbus->devid, mask);
  488. }
  489. }
  490. }
  491. static char *sun4d_irq_itoa(unsigned int irq)
  492. {
  493. static char buff[16];
  494. if (irq < (1 << 5))
  495. sprintf(buff, "%d", irq);
  496. else
  497. sprintf(buff, "%d,%x", sbus_to_pil[(irq >> 2) & 7], irq);
  498. return buff;
  499. }
  500. void __init sun4d_init_IRQ(void)
  501. {
  502. local_irq_disable();
  503. BTFIXUPSET_CALL(sbint_to_irq, sun4d_sbint_to_irq, BTFIXUPCALL_NORM);
  504. BTFIXUPSET_CALL(enable_irq, sun4d_enable_irq, BTFIXUPCALL_NORM);
  505. BTFIXUPSET_CALL(disable_irq, sun4d_disable_irq, BTFIXUPCALL_NORM);
  506. BTFIXUPSET_CALL(clear_clock_irq, sun4d_clear_clock_irq, BTFIXUPCALL_NORM);
  507. BTFIXUPSET_CALL(clear_profile_irq, sun4d_clear_profile_irq, BTFIXUPCALL_NORM);
  508. BTFIXUPSET_CALL(load_profile_irq, sun4d_load_profile_irq, BTFIXUPCALL_NORM);
  509. BTFIXUPSET_CALL(__irq_itoa, sun4d_irq_itoa, BTFIXUPCALL_NORM);
  510. sparc_init_timers = sun4d_init_timers;
  511. #ifdef CONFIG_SMP
  512. BTFIXUPSET_CALL(set_cpu_int, sun4d_set_cpu_int, BTFIXUPCALL_NORM);
  513. BTFIXUPSET_CALL(clear_cpu_int, sun4d_clear_ipi, BTFIXUPCALL_NOP);
  514. BTFIXUPSET_CALL(set_irq_udt, sun4d_set_udt, BTFIXUPCALL_NOP);
  515. #endif
  516. /* Cannot enable interrupts until OBP ticker is disabled. */
  517. }