head31.S 8.6 KB

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  1. /*
  2. * arch/s390/kernel/head31.S
  3. *
  4. * (C) Copyright IBM Corp. 2005
  5. *
  6. * Author(s): Hartmut Penner <hp@de.ibm.com>
  7. * Martin Schwidefsky <schwidefsky@de.ibm.com>
  8. * Rob van der Heij <rvdhei@iae.nl>
  9. * Heiko Carstens <heiko.carstens@de.ibm.com>
  10. *
  11. */
  12. #
  13. # startup-code at 0x10000, running in absolute addressing mode
  14. # this is called either by the ipl loader or directly by PSW restart
  15. # or linload or SALIPL
  16. #
  17. .org 0x10000
  18. startup:basr %r13,0 # get base
  19. .LPG1: l %r1, .Lget_ipl_device_addr-.LPG1(%r13)
  20. basr %r14, %r1
  21. lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
  22. la %r12,_pstart-.LPG1(%r13) # pointer to parameter area
  23. # move IPL device to lowcore
  24. mvc __LC_IPLDEV(4),IPL_DEVICE-PARMAREA(%r12)
  25. #
  26. # clear bss memory
  27. #
  28. l %r2,.Lbss_bgn-.LPG1(%r13) # start of bss
  29. l %r3,.Lbss_end-.LPG1(%r13) # end of bss
  30. sr %r3,%r2 # length of bss
  31. sr %r4,%r4
  32. sr %r5,%r5 # set src,length and pad to zero
  33. sr %r0,%r0
  34. mvcle %r2,%r4,0 # clear mem
  35. jo .-4 # branch back, if not finish
  36. l %r2,.Lrcp-.LPG1(%r13) # Read SCP forced command word
  37. .Lservicecall:
  38. stosm .Lpmask-.LPG1(%r13),0x01 # authorize ext interrupts
  39. stctl %r0, %r0,.Lcr-.LPG1(%r13) # get cr0
  40. la %r1,0x200 # set bit 22
  41. o %r1,.Lcr-.LPG1(%r13) # or old cr0 with r1
  42. st %r1,.Lcr-.LPG1(%r13)
  43. lctl %r0, %r0,.Lcr-.LPG1(%r13) # load modified cr0
  44. mvc __LC_EXT_NEW_PSW(8),.Lpcext-.LPG1(%r13) # set postcall psw
  45. la %r1, .Lsclph-.LPG1(%r13)
  46. a %r1,__LC_EXT_NEW_PSW+4 # set handler
  47. st %r1,__LC_EXT_NEW_PSW+4
  48. la %r4,_pstart-.LPG1(%r13) # %r4 is our index for sccb stuff
  49. la %r1, .Lsccb-PARMAREA(%r4) # our sccb
  50. .insn rre,0xb2200000,%r2,%r1 # service call
  51. ipm %r1
  52. srl %r1,28 # get cc code
  53. xr %r3, %r3
  54. chi %r1,3
  55. be .Lfchunk-.LPG1(%r13) # leave
  56. chi %r1,2
  57. be .Lservicecall-.LPG1(%r13)
  58. lpsw .Lwaitsclp-.LPG1(%r13)
  59. .Lsclph:
  60. lh %r1,.Lsccbr-PARMAREA(%r4)
  61. chi %r1,0x10 # 0x0010 is the sucess code
  62. je .Lprocsccb # let's process the sccb
  63. chi %r1,0x1f0
  64. bne .Lfchunk-.LPG1(%r13) # unhandled error code
  65. c %r2, .Lrcp-.LPG1(%r13) # Did we try Read SCP forced
  66. bne .Lfchunk-.LPG1(%r13) # if no, give up
  67. l %r2, .Lrcp2-.LPG1(%r13) # try with Read SCP
  68. b .Lservicecall-.LPG1(%r13)
  69. .Lprocsccb:
  70. lhi %r1,0
  71. icm %r1,3,.Lscpincr1-PARMAREA(%r4) # use this one if != 0
  72. jnz .Lscnd
  73. lhi %r1,0x800 # otherwise report 2GB
  74. .Lscnd:
  75. lhi %r3,0x800 # limit reported memory size to 2GB
  76. cr %r1,%r3
  77. jl .Lno2gb
  78. lr %r1,%r3
  79. .Lno2gb:
  80. xr %r3,%r3 # same logic
  81. ic %r3,.Lscpa1-PARMAREA(%r4)
  82. chi %r3,0x00
  83. jne .Lcompmem
  84. l %r3,.Lscpa2-PARMAREA(%r13)
  85. .Lcompmem:
  86. mr %r2,%r1 # mem in MB on 128-bit
  87. l %r1,.Lonemb-.LPG1(%r13)
  88. mr %r2,%r1 # mem size in bytes in %r3
  89. b .Lfchunk-.LPG1(%r13)
  90. .align 4
  91. .Lget_ipl_device_addr:
  92. .long .Lget_ipl_device
  93. .Lpmask:
  94. .byte 0
  95. .align 8
  96. .Lpcext:.long 0x00080000,0x80000000
  97. .Lcr:
  98. .long 0x00 # place holder for cr0
  99. .Lwaitsclp:
  100. .long 0x010a0000,0x80000000 + .Lsclph
  101. .Lrcp:
  102. .int 0x00120001 # Read SCP forced code
  103. .Lrcp2:
  104. .int 0x00020001 # Read SCP code
  105. .Lonemb:
  106. .int 0x100000
  107. .Lfchunk:
  108. #
  109. # find memory chunks.
  110. #
  111. lr %r9,%r3 # end of mem
  112. mvc __LC_PGM_NEW_PSW(8),.Lpcmem-.LPG1(%r13)
  113. la %r1,1 # test in increments of 128KB
  114. sll %r1,17
  115. l %r3,.Lmchunk-.LPG1(%r13) # get pointer to memory_chunk array
  116. slr %r4,%r4 # set start of chunk to zero
  117. slr %r5,%r5 # set end of chunk to zero
  118. slr %r6,%r6 # set access code to zero
  119. la %r10, MEMORY_CHUNKS # number of chunks
  120. .Lloop:
  121. tprot 0(%r5),0 # test protection of first byte
  122. ipm %r7
  123. srl %r7,28
  124. clr %r6,%r7 # compare cc with last access code
  125. be .Lsame-.LPG1(%r13)
  126. b .Lchkmem-.LPG1(%r13)
  127. .Lsame:
  128. ar %r5,%r1 # add 128KB to end of chunk
  129. bno .Lloop-.LPG1(%r13) # r1 < 0x80000000 -> loop
  130. .Lchkmem: # > 2GB or tprot got a program check
  131. clr %r4,%r5 # chunk size > 0?
  132. be .Lchkloop-.LPG1(%r13)
  133. st %r4,0(%r3) # store start address of chunk
  134. lr %r0,%r5
  135. slr %r0,%r4
  136. st %r0,4(%r3) # store size of chunk
  137. st %r6,8(%r3) # store type of chunk
  138. la %r3,12(%r3)
  139. l %r4,.Lmemsize-.LPG1(%r13) # address of variable memory_size
  140. st %r5,0(%r4) # store last end to memory size
  141. ahi %r10,-1 # update chunk number
  142. .Lchkloop:
  143. lr %r6,%r7 # set access code to last cc
  144. # we got an exception or we're starting a new
  145. # chunk , we must check if we should
  146. # still try to find valid memory (if we detected
  147. # the amount of available storage), and if we
  148. # have chunks left
  149. xr %r0,%r0
  150. clr %r0,%r9 # did we detect memory?
  151. je .Ldonemem # if not, leave
  152. chi %r10,0 # do we have chunks left?
  153. je .Ldonemem
  154. alr %r5,%r1 # add 128KB to end of chunk
  155. lr %r4,%r5 # potential new chunk
  156. clr %r5,%r9 # should we go on?
  157. jl .Lloop
  158. .Ldonemem:
  159. l %r12,.Lmflags-.LPG1(%r13) # get address of machine_flags
  160. #
  161. # find out if we are running under VM
  162. #
  163. stidp __LC_CPUID # store cpuid
  164. tm __LC_CPUID,0xff # running under VM ?
  165. bno .Lnovm-.LPG1(%r13)
  166. oi 3(%r12),1 # set VM flag
  167. .Lnovm:
  168. lh %r0,__LC_CPUID+4 # get cpu version
  169. chi %r0,0x7490 # running on a P/390 ?
  170. bne .Lnop390-.LPG1(%r13)
  171. oi 3(%r12),4 # set P/390 flag
  172. .Lnop390:
  173. #
  174. # find out if we have an IEEE fpu
  175. #
  176. mvc __LC_PGM_NEW_PSW(8),.Lpcfpu-.LPG1(%r13)
  177. efpc %r0,0 # test IEEE extract fpc instruction
  178. oi 3(%r12),2 # set IEEE fpu flag
  179. .Lchkfpu:
  180. #
  181. # find out if we have the CSP instruction
  182. #
  183. mvc __LC_PGM_NEW_PSW(8),.Lpccsp-.LPG1(%r13)
  184. la %r0,0
  185. lr %r1,%r0
  186. la %r2,4
  187. csp %r0,%r2 # Test CSP instruction
  188. oi 3(%r12),8 # set CSP flag
  189. .Lchkcsp:
  190. #
  191. # find out if we have the MVPG instruction
  192. #
  193. mvc __LC_PGM_NEW_PSW(8),.Lpcmvpg-.LPG1(%r13)
  194. sr %r0,%r0
  195. la %r1,0
  196. la %r2,0
  197. mvpg %r1,%r2 # Test CSP instruction
  198. oi 3(%r12),16 # set MVPG flag
  199. .Lchkmvpg:
  200. #
  201. # find out if we have the IDTE instruction
  202. #
  203. mvc __LC_PGM_NEW_PSW(8),.Lpcidte-.LPG1(%r13)
  204. .long 0xb2b10000 # store facility list
  205. tm 0xc8,0x08 # check bit for clearing-by-ASCE
  206. bno .Lchkidte-.LPG1(%r13)
  207. lhi %r1,2094
  208. lhi %r2,0
  209. .long 0xb98e2001
  210. oi 3(%r12),0x80 # set IDTE flag
  211. .Lchkidte:
  212. lpsw .Lentry-.LPG1(13) # jump to _stext in primary-space,
  213. # virtual and never return ...
  214. .align 8
  215. .Lentry:.long 0x00080000,0x80000000 + _stext
  216. .Lctl: .long 0x04b50002 # cr0: various things
  217. .long 0 # cr1: primary space segment table
  218. .long .Lduct # cr2: dispatchable unit control table
  219. .long 0 # cr3: instruction authorization
  220. .long 0 # cr4: instruction authorization
  221. .long 0xffffffff # cr5: primary-aste origin
  222. .long 0 # cr6: I/O interrupts
  223. .long 0 # cr7: secondary space segment table
  224. .long 0 # cr8: access registers translation
  225. .long 0 # cr9: tracing off
  226. .long 0 # cr10: tracing off
  227. .long 0 # cr11: tracing off
  228. .long 0 # cr12: tracing off
  229. .long 0 # cr13: home space segment table
  230. .long 0xc0000000 # cr14: machine check handling off
  231. .long 0 # cr15: linkage stack operations
  232. .Lpcmem:.long 0x00080000,0x80000000 + .Lchkmem
  233. .Lpcfpu:.long 0x00080000,0x80000000 + .Lchkfpu
  234. .Lpccsp:.long 0x00080000,0x80000000 + .Lchkcsp
  235. .Lpcmvpg:.long 0x00080000,0x80000000 + .Lchkmvpg
  236. .Lpcidte:.long 0x00080000,0x80000000 + .Lchkidte
  237. .Lmemsize:.long memory_size
  238. .Lmchunk:.long memory_chunk
  239. .Lmflags:.long machine_flags
  240. .Lbss_bgn: .long __bss_start
  241. .Lbss_end: .long _end
  242. .org PARMAREA-64
  243. .Lduct: .long 0,0,0,0,0,0,0,0
  244. .long 0,0,0,0,0,0,0,0
  245. #
  246. # params at 10400 (setup.h)
  247. #
  248. .org PARMAREA
  249. .global _pstart
  250. _pstart:
  251. .long 0,0 # IPL_DEVICE
  252. .long 0,RAMDISK_ORIGIN # INITRD_START
  253. .long 0,RAMDISK_SIZE # INITRD_SIZE
  254. .org COMMAND_LINE
  255. .byte "root=/dev/ram0 ro"
  256. .byte 0
  257. .org 0x11000
  258. .Lsccb:
  259. .hword 0x1000 # length, one page
  260. .byte 0x00,0x00,0x00
  261. .byte 0x80 # variable response bit set
  262. .Lsccbr:
  263. .hword 0x00 # response code
  264. .Lscpincr1:
  265. .hword 0x00
  266. .Lscpa1:
  267. .byte 0x00
  268. .fill 89,1,0
  269. .Lscpa2:
  270. .int 0x00
  271. .Lscpincr2:
  272. .quad 0x00
  273. .fill 3984,1,0
  274. .org 0x12000
  275. .global _pend
  276. _pend:
  277. GET_IPL_DEVICE
  278. #ifdef CONFIG_SHARED_KERNEL
  279. .org 0x100000
  280. #endif
  281. #
  282. # startup-code, running in virtual mode
  283. #
  284. .globl _stext
  285. _stext: basr %r13,0 # get base
  286. .LPG3:
  287. #
  288. # Setup stack
  289. #
  290. l %r15,.Linittu-.LPG3(%r13)
  291. mvc __LC_CURRENT(4),__TI_task(%r15)
  292. ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE
  293. st %r15,__LC_KERNEL_STACK # set end of kernel stack
  294. ahi %r15,-96
  295. xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain
  296. # check control registers
  297. stctl %c0,%c15,0(%r15)
  298. oi 2(%r15),0x40 # enable sigp emergency signal
  299. oi 0(%r15),0x10 # switch on low address protection
  300. lctl %c0,%c15,0(%r15)
  301. #
  302. lam 0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess
  303. l %r14,.Lstart-.LPG3(%r13)
  304. basr %r14,%r14 # call start_kernel
  305. #
  306. # We returned from start_kernel ?!? PANIK
  307. #
  308. basr %r13,0
  309. lpsw .Ldw-.(%r13) # load disabled wait psw
  310. #
  311. .align 8
  312. .Ldw: .long 0x000a0000,0x00000000
  313. .Linittu:.long init_thread_union
  314. .Lstart:.long start_kernel
  315. .Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0