ppc85xx_rio.c 25 KB

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  1. /*
  2. * MPC85xx RapidIO support
  3. *
  4. * Copyright 2005 MontaVista Software, Inc.
  5. * Matt Porter <mporter@kernel.crashing.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. */
  12. #include <linux/config.h>
  13. #include <linux/init.h>
  14. #include <linux/module.h>
  15. #include <linux/types.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/rio.h>
  19. #include <linux/rio_drv.h>
  20. #include <asm/io.h>
  21. #define RIO_REGS_BASE (CCSRBAR + 0xc0000)
  22. #define RIO_ATMU_REGS_OFFSET 0x10c00
  23. #define RIO_MSG_REGS_OFFSET 0x11000
  24. #define RIO_MAINT_WIN_SIZE 0x400000
  25. #define RIO_DBELL_WIN_SIZE 0x1000
  26. #define RIO_MSG_OMR_MUI 0x00000002
  27. #define RIO_MSG_OSR_TE 0x00000080
  28. #define RIO_MSG_OSR_QOI 0x00000020
  29. #define RIO_MSG_OSR_QFI 0x00000010
  30. #define RIO_MSG_OSR_MUB 0x00000004
  31. #define RIO_MSG_OSR_EOMI 0x00000002
  32. #define RIO_MSG_OSR_QEI 0x00000001
  33. #define RIO_MSG_IMR_MI 0x00000002
  34. #define RIO_MSG_ISR_TE 0x00000080
  35. #define RIO_MSG_ISR_QFI 0x00000010
  36. #define RIO_MSG_ISR_DIQI 0x00000001
  37. #define RIO_MSG_DESC_SIZE 32
  38. #define RIO_MSG_BUFFER_SIZE 4096
  39. #define RIO_MIN_TX_RING_SIZE 2
  40. #define RIO_MAX_TX_RING_SIZE 2048
  41. #define RIO_MIN_RX_RING_SIZE 2
  42. #define RIO_MAX_RX_RING_SIZE 2048
  43. #define DOORBELL_DMR_DI 0x00000002
  44. #define DOORBELL_DSR_TE 0x00000080
  45. #define DOORBELL_DSR_QFI 0x00000010
  46. #define DOORBELL_DSR_DIQI 0x00000001
  47. #define DOORBELL_TID_OFFSET 0x03
  48. #define DOORBELL_SID_OFFSET 0x05
  49. #define DOORBELL_INFO_OFFSET 0x06
  50. #define DOORBELL_MESSAGE_SIZE 0x08
  51. #define DBELL_SID(x) (*(u8 *)(x + DOORBELL_SID_OFFSET))
  52. #define DBELL_TID(x) (*(u8 *)(x + DOORBELL_TID_OFFSET))
  53. #define DBELL_INF(x) (*(u16 *)(x + DOORBELL_INFO_OFFSET))
  54. #define is_power_of_2(x) (((x) & ((x) - 1)) == 0)
  55. struct rio_atmu_regs {
  56. u32 rowtar;
  57. u32 pad1;
  58. u32 rowbar;
  59. u32 pad2;
  60. u32 rowar;
  61. u32 pad3[3];
  62. };
  63. struct rio_msg_regs {
  64. u32 omr;
  65. u32 osr;
  66. u32 pad1;
  67. u32 odqdpar;
  68. u32 pad2;
  69. u32 osar;
  70. u32 odpr;
  71. u32 odatr;
  72. u32 odcr;
  73. u32 pad3;
  74. u32 odqepar;
  75. u32 pad4[13];
  76. u32 imr;
  77. u32 isr;
  78. u32 pad5;
  79. u32 ifqdpar;
  80. u32 pad6;
  81. u32 ifqepar;
  82. u32 pad7[250];
  83. u32 dmr;
  84. u32 dsr;
  85. u32 pad8;
  86. u32 dqdpar;
  87. u32 pad9;
  88. u32 dqepar;
  89. u32 pad10[26];
  90. u32 pwmr;
  91. u32 pwsr;
  92. u32 pad11;
  93. u32 pwqbar;
  94. };
  95. struct rio_tx_desc {
  96. u32 res1;
  97. u32 saddr;
  98. u32 dport;
  99. u32 dattr;
  100. u32 res2;
  101. u32 res3;
  102. u32 dwcnt;
  103. u32 res4;
  104. };
  105. static u32 regs_win;
  106. static struct rio_atmu_regs *atmu_regs;
  107. static struct rio_atmu_regs *maint_atmu_regs;
  108. static struct rio_atmu_regs *dbell_atmu_regs;
  109. static u32 dbell_win;
  110. static u32 maint_win;
  111. static struct rio_msg_regs *msg_regs;
  112. static struct rio_dbell_ring {
  113. void *virt;
  114. dma_addr_t phys;
  115. } dbell_ring;
  116. static struct rio_msg_tx_ring {
  117. void *virt;
  118. dma_addr_t phys;
  119. void *virt_buffer[RIO_MAX_TX_RING_SIZE];
  120. dma_addr_t phys_buffer[RIO_MAX_TX_RING_SIZE];
  121. int tx_slot;
  122. int size;
  123. void *dev_id;
  124. } msg_tx_ring;
  125. static struct rio_msg_rx_ring {
  126. void *virt;
  127. dma_addr_t phys;
  128. void *virt_buffer[RIO_MAX_RX_RING_SIZE];
  129. int rx_slot;
  130. int size;
  131. void *dev_id;
  132. } msg_rx_ring;
  133. /**
  134. * mpc85xx_rio_doorbell_send - Send a MPC85xx doorbell message
  135. * @index: ID of RapidIO interface
  136. * @destid: Destination ID of target device
  137. * @data: 16-bit info field of RapidIO doorbell message
  138. *
  139. * Sends a MPC85xx doorbell message. Returns %0 on success or
  140. * %-EINVAL on failure.
  141. */
  142. static int mpc85xx_rio_doorbell_send(int index, u16 destid, u16 data)
  143. {
  144. pr_debug("mpc85xx_doorbell_send: index %d destid %4.4x data %4.4x\n",
  145. index, destid, data);
  146. out_be32((void *)&dbell_atmu_regs->rowtar, destid << 22);
  147. out_be16((void *)(dbell_win), data);
  148. return 0;
  149. }
  150. /**
  151. * mpc85xx_local_config_read - Generate a MPC85xx local config space read
  152. * @index: ID of RapdiIO interface
  153. * @offset: Offset into configuration space
  154. * @len: Length (in bytes) of the maintenance transaction
  155. * @data: Value to be read into
  156. *
  157. * Generates a MPC85xx local configuration space read. Returns %0 on
  158. * success or %-EINVAL on failure.
  159. */
  160. static int mpc85xx_local_config_read(int index, u32 offset, int len, u32 * data)
  161. {
  162. pr_debug("mpc85xx_local_config_read: index %d offset %8.8x\n", index,
  163. offset);
  164. *data = in_be32((void *)(regs_win + offset));
  165. return 0;
  166. }
  167. /**
  168. * mpc85xx_local_config_write - Generate a MPC85xx local config space write
  169. * @index: ID of RapdiIO interface
  170. * @offset: Offset into configuration space
  171. * @len: Length (in bytes) of the maintenance transaction
  172. * @data: Value to be written
  173. *
  174. * Generates a MPC85xx local configuration space write. Returns %0 on
  175. * success or %-EINVAL on failure.
  176. */
  177. static int mpc85xx_local_config_write(int index, u32 offset, int len, u32 data)
  178. {
  179. pr_debug
  180. ("mpc85xx_local_config_write: index %d offset %8.8x data %8.8x\n",
  181. index, offset, data);
  182. out_be32((void *)(regs_win + offset), data);
  183. return 0;
  184. }
  185. /**
  186. * mpc85xx_rio_config_read - Generate a MPC85xx read maintenance transaction
  187. * @index: ID of RapdiIO interface
  188. * @destid: Destination ID of transaction
  189. * @hopcount: Number of hops to target device
  190. * @offset: Offset into configuration space
  191. * @len: Length (in bytes) of the maintenance transaction
  192. * @val: Location to be read into
  193. *
  194. * Generates a MPC85xx read maintenance transaction. Returns %0 on
  195. * success or %-EINVAL on failure.
  196. */
  197. static int
  198. mpc85xx_rio_config_read(int index, u16 destid, u8 hopcount, u32 offset, int len,
  199. u32 * val)
  200. {
  201. u8 *data;
  202. pr_debug
  203. ("mpc85xx_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n",
  204. index, destid, hopcount, offset, len);
  205. out_be32((void *)&maint_atmu_regs->rowtar,
  206. (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9));
  207. data = (u8 *) maint_win + offset;
  208. switch (len) {
  209. case 1:
  210. *val = in_8((u8 *) data);
  211. break;
  212. case 2:
  213. *val = in_be16((u16 *) data);
  214. break;
  215. default:
  216. *val = in_be32((u32 *) data);
  217. break;
  218. }
  219. return 0;
  220. }
  221. /**
  222. * mpc85xx_rio_config_write - Generate a MPC85xx write maintenance transaction
  223. * @index: ID of RapdiIO interface
  224. * @destid: Destination ID of transaction
  225. * @hopcount: Number of hops to target device
  226. * @offset: Offset into configuration space
  227. * @len: Length (in bytes) of the maintenance transaction
  228. * @val: Value to be written
  229. *
  230. * Generates an MPC85xx write maintenance transaction. Returns %0 on
  231. * success or %-EINVAL on failure.
  232. */
  233. static int
  234. mpc85xx_rio_config_write(int index, u16 destid, u8 hopcount, u32 offset,
  235. int len, u32 val)
  236. {
  237. u8 *data;
  238. pr_debug
  239. ("mpc85xx_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n",
  240. index, destid, hopcount, offset, len, val);
  241. out_be32((void *)&maint_atmu_regs->rowtar,
  242. (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9));
  243. data = (u8 *) maint_win + offset;
  244. switch (len) {
  245. case 1:
  246. out_8((u8 *) data, val);
  247. break;
  248. case 2:
  249. out_be16((u16 *) data, val);
  250. break;
  251. default:
  252. out_be32((u32 *) data, val);
  253. break;
  254. }
  255. return 0;
  256. }
  257. /**
  258. * rio_hw_add_outb_message - Add message to the MPC85xx outbound message queue
  259. * @mport: Master port with outbound message queue
  260. * @rdev: Target of outbound message
  261. * @mbox: Outbound mailbox
  262. * @buffer: Message to add to outbound queue
  263. * @len: Length of message
  264. *
  265. * Adds the @buffer message to the MPC85xx outbound message queue. Returns
  266. * %0 on success or %-EINVAL on failure.
  267. */
  268. int
  269. rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
  270. void *buffer, size_t len)
  271. {
  272. u32 omr;
  273. struct rio_tx_desc *desc =
  274. (struct rio_tx_desc *)msg_tx_ring.virt + msg_tx_ring.tx_slot;
  275. int ret = 0;
  276. pr_debug
  277. ("RIO: rio_hw_add_outb_message(): destid %4.4x mbox %d buffer %8.8x len %8.8x\n",
  278. rdev->destid, mbox, (int)buffer, len);
  279. if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) {
  280. ret = -EINVAL;
  281. goto out;
  282. }
  283. /* Copy and clear rest of buffer */
  284. memcpy(msg_tx_ring.virt_buffer[msg_tx_ring.tx_slot], buffer, len);
  285. if (len < (RIO_MAX_MSG_SIZE - 4))
  286. memset((void *)((u32) msg_tx_ring.
  287. virt_buffer[msg_tx_ring.tx_slot] + len), 0,
  288. RIO_MAX_MSG_SIZE - len);
  289. /* Set mbox field for message */
  290. desc->dport = mbox & 0x3;
  291. /* Enable EOMI interrupt, set priority, and set destid */
  292. desc->dattr = 0x28000000 | (rdev->destid << 2);
  293. /* Set transfer size aligned to next power of 2 (in double words) */
  294. desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len);
  295. /* Set snooping and source buffer address */
  296. desc->saddr = 0x00000004 | msg_tx_ring.phys_buffer[msg_tx_ring.tx_slot];
  297. /* Increment enqueue pointer */
  298. omr = in_be32((void *)&msg_regs->omr);
  299. out_be32((void *)&msg_regs->omr, omr | RIO_MSG_OMR_MUI);
  300. /* Go to next descriptor */
  301. if (++msg_tx_ring.tx_slot == msg_tx_ring.size)
  302. msg_tx_ring.tx_slot = 0;
  303. out:
  304. return ret;
  305. }
  306. EXPORT_SYMBOL_GPL(rio_hw_add_outb_message);
  307. /**
  308. * mpc85xx_rio_tx_handler - MPC85xx outbound message interrupt handler
  309. * @irq: Linux interrupt number
  310. * @dev_instance: Pointer to interrupt-specific data
  311. * @regs: Register context
  312. *
  313. * Handles outbound message interrupts. Executes a register outbound
  314. * mailbox event handler and acks the interrupt occurence.
  315. */
  316. static irqreturn_t
  317. mpc85xx_rio_tx_handler(int irq, void *dev_instance, struct pt_regs *regs)
  318. {
  319. int osr;
  320. struct rio_mport *port = (struct rio_mport *)dev_instance;
  321. osr = in_be32((void *)&msg_regs->osr);
  322. if (osr & RIO_MSG_OSR_TE) {
  323. pr_info("RIO: outbound message transmission error\n");
  324. out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_TE);
  325. goto out;
  326. }
  327. if (osr & RIO_MSG_OSR_QOI) {
  328. pr_info("RIO: outbound message queue overflow\n");
  329. out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_QOI);
  330. goto out;
  331. }
  332. if (osr & RIO_MSG_OSR_EOMI) {
  333. u32 dqp = in_be32((void *)&msg_regs->odqdpar);
  334. int slot = (dqp - msg_tx_ring.phys) >> 5;
  335. port->outb_msg[0].mcback(port, msg_tx_ring.dev_id, -1, slot);
  336. /* Ack the end-of-message interrupt */
  337. out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_EOMI);
  338. }
  339. out:
  340. return IRQ_HANDLED;
  341. }
  342. /**
  343. * rio_open_outb_mbox - Initialize MPC85xx outbound mailbox
  344. * @mport: Master port implementing the outbound message unit
  345. * @dev_id: Device specific pointer to pass on event
  346. * @mbox: Mailbox to open
  347. * @entries: Number of entries in the outbound mailbox ring
  348. *
  349. * Initializes buffer ring, request the outbound message interrupt,
  350. * and enables the outbound message unit. Returns %0 on success and
  351. * %-EINVAL or %-ENOMEM on failure.
  352. */
  353. int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
  354. {
  355. int i, j, rc = 0;
  356. if ((entries < RIO_MIN_TX_RING_SIZE) ||
  357. (entries > RIO_MAX_TX_RING_SIZE) || (!is_power_of_2(entries))) {
  358. rc = -EINVAL;
  359. goto out;
  360. }
  361. /* Initialize shadow copy ring */
  362. msg_tx_ring.dev_id = dev_id;
  363. msg_tx_ring.size = entries;
  364. for (i = 0; i < msg_tx_ring.size; i++) {
  365. if (!
  366. (msg_tx_ring.virt_buffer[i] =
  367. dma_alloc_coherent(NULL, RIO_MSG_BUFFER_SIZE,
  368. &msg_tx_ring.phys_buffer[i],
  369. GFP_KERNEL))) {
  370. rc = -ENOMEM;
  371. for (j = 0; j < msg_tx_ring.size; j++)
  372. if (msg_tx_ring.virt_buffer[j])
  373. dma_free_coherent(NULL,
  374. RIO_MSG_BUFFER_SIZE,
  375. msg_tx_ring.
  376. virt_buffer[j],
  377. msg_tx_ring.
  378. phys_buffer[j]);
  379. goto out;
  380. }
  381. }
  382. /* Initialize outbound message descriptor ring */
  383. if (!(msg_tx_ring.virt = dma_alloc_coherent(NULL,
  384. msg_tx_ring.size *
  385. RIO_MSG_DESC_SIZE,
  386. &msg_tx_ring.phys,
  387. GFP_KERNEL))) {
  388. rc = -ENOMEM;
  389. goto out_dma;
  390. }
  391. memset(msg_tx_ring.virt, 0, msg_tx_ring.size * RIO_MSG_DESC_SIZE);
  392. msg_tx_ring.tx_slot = 0;
  393. /* Point dequeue/enqueue pointers at first entry in ring */
  394. out_be32((void *)&msg_regs->odqdpar, msg_tx_ring.phys);
  395. out_be32((void *)&msg_regs->odqepar, msg_tx_ring.phys);
  396. /* Configure for snooping */
  397. out_be32((void *)&msg_regs->osar, 0x00000004);
  398. /* Clear interrupt status */
  399. out_be32((void *)&msg_regs->osr, 0x000000b3);
  400. /* Hook up outbound message handler */
  401. if ((rc =
  402. request_irq(MPC85xx_IRQ_RIO_TX, mpc85xx_rio_tx_handler, 0,
  403. "msg_tx", (void *)mport)) < 0)
  404. goto out_irq;
  405. /*
  406. * Configure outbound message unit
  407. * Snooping
  408. * Interrupts (all enabled, except QEIE)
  409. * Chaining mode
  410. * Disable
  411. */
  412. out_be32((void *)&msg_regs->omr, 0x00100220);
  413. /* Set number of entries */
  414. out_be32((void *)&msg_regs->omr,
  415. in_be32((void *)&msg_regs->omr) |
  416. ((get_bitmask_order(entries) - 2) << 12));
  417. /* Now enable the unit */
  418. out_be32((void *)&msg_regs->omr, in_be32((void *)&msg_regs->omr) | 0x1);
  419. out:
  420. return rc;
  421. out_irq:
  422. dma_free_coherent(NULL, msg_tx_ring.size * RIO_MSG_DESC_SIZE,
  423. msg_tx_ring.virt, msg_tx_ring.phys);
  424. out_dma:
  425. for (i = 0; i < msg_tx_ring.size; i++)
  426. dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
  427. msg_tx_ring.virt_buffer[i],
  428. msg_tx_ring.phys_buffer[i]);
  429. return rc;
  430. }
  431. /**
  432. * rio_close_outb_mbox - Shut down MPC85xx outbound mailbox
  433. * @mport: Master port implementing the outbound message unit
  434. * @mbox: Mailbox to close
  435. *
  436. * Disables the outbound message unit, free all buffers, and
  437. * frees the outbound message interrupt.
  438. */
  439. void rio_close_outb_mbox(struct rio_mport *mport, int mbox)
  440. {
  441. /* Disable inbound message unit */
  442. out_be32((void *)&msg_regs->omr, 0);
  443. /* Free ring */
  444. dma_free_coherent(NULL, msg_tx_ring.size * RIO_MSG_DESC_SIZE,
  445. msg_tx_ring.virt, msg_tx_ring.phys);
  446. /* Free interrupt */
  447. free_irq(MPC85xx_IRQ_RIO_TX, (void *)mport);
  448. }
  449. /**
  450. * mpc85xx_rio_rx_handler - MPC85xx inbound message interrupt handler
  451. * @irq: Linux interrupt number
  452. * @dev_instance: Pointer to interrupt-specific data
  453. * @regs: Register context
  454. *
  455. * Handles inbound message interrupts. Executes a registered inbound
  456. * mailbox event handler and acks the interrupt occurence.
  457. */
  458. static irqreturn_t
  459. mpc85xx_rio_rx_handler(int irq, void *dev_instance, struct pt_regs *regs)
  460. {
  461. int isr;
  462. struct rio_mport *port = (struct rio_mport *)dev_instance;
  463. isr = in_be32((void *)&msg_regs->isr);
  464. if (isr & RIO_MSG_ISR_TE) {
  465. pr_info("RIO: inbound message reception error\n");
  466. out_be32((void *)&msg_regs->isr, RIO_MSG_ISR_TE);
  467. goto out;
  468. }
  469. /* XXX Need to check/dispatch until queue empty */
  470. if (isr & RIO_MSG_ISR_DIQI) {
  471. /*
  472. * We implement *only* mailbox 0, but can receive messages
  473. * for any mailbox/letter to that mailbox destination. So,
  474. * make the callback with an unknown/invalid mailbox number
  475. * argument.
  476. */
  477. port->inb_msg[0].mcback(port, msg_rx_ring.dev_id, -1, -1);
  478. /* Ack the queueing interrupt */
  479. out_be32((void *)&msg_regs->isr, RIO_MSG_ISR_DIQI);
  480. }
  481. out:
  482. return IRQ_HANDLED;
  483. }
  484. /**
  485. * rio_open_inb_mbox - Initialize MPC85xx inbound mailbox
  486. * @mport: Master port implementing the inbound message unit
  487. * @dev_id: Device specific pointer to pass on event
  488. * @mbox: Mailbox to open
  489. * @entries: Number of entries in the inbound mailbox ring
  490. *
  491. * Initializes buffer ring, request the inbound message interrupt,
  492. * and enables the inbound message unit. Returns %0 on success
  493. * and %-EINVAL or %-ENOMEM on failure.
  494. */
  495. int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
  496. {
  497. int i, rc = 0;
  498. if ((entries < RIO_MIN_RX_RING_SIZE) ||
  499. (entries > RIO_MAX_RX_RING_SIZE) || (!is_power_of_2(entries))) {
  500. rc = -EINVAL;
  501. goto out;
  502. }
  503. /* Initialize client buffer ring */
  504. msg_rx_ring.dev_id = dev_id;
  505. msg_rx_ring.size = entries;
  506. msg_rx_ring.rx_slot = 0;
  507. for (i = 0; i < msg_rx_ring.size; i++)
  508. msg_rx_ring.virt_buffer[i] = NULL;
  509. /* Initialize inbound message ring */
  510. if (!(msg_rx_ring.virt = dma_alloc_coherent(NULL,
  511. msg_rx_ring.size *
  512. RIO_MAX_MSG_SIZE,
  513. &msg_rx_ring.phys,
  514. GFP_KERNEL))) {
  515. rc = -ENOMEM;
  516. goto out;
  517. }
  518. /* Point dequeue/enqueue pointers at first entry in ring */
  519. out_be32((void *)&msg_regs->ifqdpar, (u32) msg_rx_ring.phys);
  520. out_be32((void *)&msg_regs->ifqepar, (u32) msg_rx_ring.phys);
  521. /* Clear interrupt status */
  522. out_be32((void *)&msg_regs->isr, 0x00000091);
  523. /* Hook up inbound message handler */
  524. if ((rc =
  525. request_irq(MPC85xx_IRQ_RIO_RX, mpc85xx_rio_rx_handler, 0,
  526. "msg_rx", (void *)mport)) < 0) {
  527. dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
  528. msg_tx_ring.virt_buffer[i],
  529. msg_tx_ring.phys_buffer[i]);
  530. goto out;
  531. }
  532. /*
  533. * Configure inbound message unit:
  534. * Snooping
  535. * 4KB max message size
  536. * Unmask all interrupt sources
  537. * Disable
  538. */
  539. out_be32((void *)&msg_regs->imr, 0x001b0060);
  540. /* Set number of queue entries */
  541. out_be32((void *)&msg_regs->imr,
  542. in_be32((void *)&msg_regs->imr) |
  543. ((get_bitmask_order(entries) - 2) << 12));
  544. /* Now enable the unit */
  545. out_be32((void *)&msg_regs->imr, in_be32((void *)&msg_regs->imr) | 0x1);
  546. out:
  547. return rc;
  548. }
  549. /**
  550. * rio_close_inb_mbox - Shut down MPC85xx inbound mailbox
  551. * @mport: Master port implementing the inbound message unit
  552. * @mbox: Mailbox to close
  553. *
  554. * Disables the inbound message unit, free all buffers, and
  555. * frees the inbound message interrupt.
  556. */
  557. void rio_close_inb_mbox(struct rio_mport *mport, int mbox)
  558. {
  559. /* Disable inbound message unit */
  560. out_be32((void *)&msg_regs->imr, 0);
  561. /* Free ring */
  562. dma_free_coherent(NULL, msg_rx_ring.size * RIO_MAX_MSG_SIZE,
  563. msg_rx_ring.virt, msg_rx_ring.phys);
  564. /* Free interrupt */
  565. free_irq(MPC85xx_IRQ_RIO_RX, (void *)mport);
  566. }
  567. /**
  568. * rio_hw_add_inb_buffer - Add buffer to the MPC85xx inbound message queue
  569. * @mport: Master port implementing the inbound message unit
  570. * @mbox: Inbound mailbox number
  571. * @buf: Buffer to add to inbound queue
  572. *
  573. * Adds the @buf buffer to the MPC85xx inbound message queue. Returns
  574. * %0 on success or %-EINVAL on failure.
  575. */
  576. int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf)
  577. {
  578. int rc = 0;
  579. pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n",
  580. msg_rx_ring.rx_slot);
  581. if (msg_rx_ring.virt_buffer[msg_rx_ring.rx_slot]) {
  582. printk(KERN_ERR
  583. "RIO: error adding inbound buffer %d, buffer exists\n",
  584. msg_rx_ring.rx_slot);
  585. rc = -EINVAL;
  586. goto out;
  587. }
  588. msg_rx_ring.virt_buffer[msg_rx_ring.rx_slot] = buf;
  589. if (++msg_rx_ring.rx_slot == msg_rx_ring.size)
  590. msg_rx_ring.rx_slot = 0;
  591. out:
  592. return rc;
  593. }
  594. EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer);
  595. /**
  596. * rio_hw_get_inb_message - Fetch inbound message from the MPC85xx message unit
  597. * @mport: Master port implementing the inbound message unit
  598. * @mbox: Inbound mailbox number
  599. *
  600. * Gets the next available inbound message from the inbound message queue.
  601. * A pointer to the message is returned on success or NULL on failure.
  602. */
  603. void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox)
  604. {
  605. u32 imr;
  606. u32 phys_buf, virt_buf;
  607. void *buf = NULL;
  608. int buf_idx;
  609. phys_buf = in_be32((void *)&msg_regs->ifqdpar);
  610. /* If no more messages, then bail out */
  611. if (phys_buf == in_be32((void *)&msg_regs->ifqepar))
  612. goto out2;
  613. virt_buf = (u32) msg_rx_ring.virt + (phys_buf - msg_rx_ring.phys);
  614. buf_idx = (phys_buf - msg_rx_ring.phys) / RIO_MAX_MSG_SIZE;
  615. buf = msg_rx_ring.virt_buffer[buf_idx];
  616. if (!buf) {
  617. printk(KERN_ERR
  618. "RIO: inbound message copy failed, no buffers\n");
  619. goto out1;
  620. }
  621. /* Copy max message size, caller is expected to allocate that big */
  622. memcpy(buf, (void *)virt_buf, RIO_MAX_MSG_SIZE);
  623. /* Clear the available buffer */
  624. msg_rx_ring.virt_buffer[buf_idx] = NULL;
  625. out1:
  626. imr = in_be32((void *)&msg_regs->imr);
  627. out_be32((void *)&msg_regs->imr, imr | RIO_MSG_IMR_MI);
  628. out2:
  629. return buf;
  630. }
  631. EXPORT_SYMBOL_GPL(rio_hw_get_inb_message);
  632. /**
  633. * mpc85xx_rio_dbell_handler - MPC85xx doorbell interrupt handler
  634. * @irq: Linux interrupt number
  635. * @dev_instance: Pointer to interrupt-specific data
  636. * @regs: Register context
  637. *
  638. * Handles doorbell interrupts. Parses a list of registered
  639. * doorbell event handlers and executes a matching event handler.
  640. */
  641. static irqreturn_t
  642. mpc85xx_rio_dbell_handler(int irq, void *dev_instance, struct pt_regs *regs)
  643. {
  644. int dsr;
  645. struct rio_mport *port = (struct rio_mport *)dev_instance;
  646. dsr = in_be32((void *)&msg_regs->dsr);
  647. if (dsr & DOORBELL_DSR_TE) {
  648. pr_info("RIO: doorbell reception error\n");
  649. out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_TE);
  650. goto out;
  651. }
  652. if (dsr & DOORBELL_DSR_QFI) {
  653. pr_info("RIO: doorbell queue full\n");
  654. out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_QFI);
  655. goto out;
  656. }
  657. /* XXX Need to check/dispatch until queue empty */
  658. if (dsr & DOORBELL_DSR_DIQI) {
  659. u32 dmsg =
  660. (u32) dbell_ring.virt +
  661. (in_be32((void *)&msg_regs->dqdpar) & 0xfff);
  662. u32 dmr;
  663. struct rio_dbell *dbell;
  664. int found = 0;
  665. pr_debug
  666. ("RIO: processing doorbell, sid %2.2x tid %2.2x info %4.4x\n",
  667. DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
  668. list_for_each_entry(dbell, &port->dbells, node) {
  669. if ((dbell->res->start <= DBELL_INF(dmsg)) &&
  670. (dbell->res->end >= DBELL_INF(dmsg))) {
  671. found = 1;
  672. break;
  673. }
  674. }
  675. if (found) {
  676. dbell->dinb(port, dbell->dev_id, DBELL_SID(dmsg), DBELL_TID(dmsg),
  677. DBELL_INF(dmsg));
  678. } else {
  679. pr_debug
  680. ("RIO: spurious doorbell, sid %2.2x tid %2.2x info %4.4x\n",
  681. DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
  682. }
  683. dmr = in_be32((void *)&msg_regs->dmr);
  684. out_be32((void *)&msg_regs->dmr, dmr | DOORBELL_DMR_DI);
  685. out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_DIQI);
  686. }
  687. out:
  688. return IRQ_HANDLED;
  689. }
  690. /**
  691. * mpc85xx_rio_doorbell_init - MPC85xx doorbell interface init
  692. * @mport: Master port implementing the inbound doorbell unit
  693. *
  694. * Initializes doorbell unit hardware and inbound DMA buffer
  695. * ring. Called from mpc85xx_rio_setup(). Returns %0 on success
  696. * or %-ENOMEM on failure.
  697. */
  698. static int mpc85xx_rio_doorbell_init(struct rio_mport *mport)
  699. {
  700. int rc = 0;
  701. /* Map outbound doorbell window immediately after maintenance window */
  702. if (!(dbell_win =
  703. (u32) ioremap(mport->iores.start + RIO_MAINT_WIN_SIZE,
  704. RIO_DBELL_WIN_SIZE))) {
  705. printk(KERN_ERR
  706. "RIO: unable to map outbound doorbell window\n");
  707. rc = -ENOMEM;
  708. goto out;
  709. }
  710. /* Initialize inbound doorbells */
  711. if (!(dbell_ring.virt = dma_alloc_coherent(NULL,
  712. 512 * DOORBELL_MESSAGE_SIZE,
  713. &dbell_ring.phys,
  714. GFP_KERNEL))) {
  715. printk(KERN_ERR "RIO: unable allocate inbound doorbell ring\n");
  716. rc = -ENOMEM;
  717. iounmap((void *)dbell_win);
  718. goto out;
  719. }
  720. /* Point dequeue/enqueue pointers at first entry in ring */
  721. out_be32((void *)&msg_regs->dqdpar, (u32) dbell_ring.phys);
  722. out_be32((void *)&msg_regs->dqepar, (u32) dbell_ring.phys);
  723. /* Clear interrupt status */
  724. out_be32((void *)&msg_regs->dsr, 0x00000091);
  725. /* Hook up doorbell handler */
  726. if ((rc =
  727. request_irq(MPC85xx_IRQ_RIO_BELL, mpc85xx_rio_dbell_handler, 0,
  728. "dbell_rx", (void *)mport) < 0)) {
  729. iounmap((void *)dbell_win);
  730. dma_free_coherent(NULL, 512 * DOORBELL_MESSAGE_SIZE,
  731. dbell_ring.virt, dbell_ring.phys);
  732. printk(KERN_ERR
  733. "MPC85xx RIO: unable to request inbound doorbell irq");
  734. goto out;
  735. }
  736. /* Configure doorbells for snooping, 512 entries, and enable */
  737. out_be32((void *)&msg_regs->dmr, 0x00108161);
  738. out:
  739. return rc;
  740. }
  741. static char *cmdline = NULL;
  742. static int mpc85xx_rio_get_hdid(int index)
  743. {
  744. /* XXX Need to parse multiple entries in some format */
  745. if (!cmdline)
  746. return -1;
  747. return simple_strtol(cmdline, NULL, 0);
  748. }
  749. static int mpc85xx_rio_get_cmdline(char *s)
  750. {
  751. if (!s)
  752. return 0;
  753. cmdline = s;
  754. return 1;
  755. }
  756. __setup("riohdid=", mpc85xx_rio_get_cmdline);
  757. /**
  758. * mpc85xx_rio_setup - Setup MPC85xx RapidIO interface
  759. * @law_start: Starting physical address of RapidIO LAW
  760. * @law_size: Size of RapidIO LAW
  761. *
  762. * Initializes MPC85xx RapidIO hardware interface, configures
  763. * master port with system-specific info, and registers the
  764. * master port with the RapidIO subsystem.
  765. */
  766. void mpc85xx_rio_setup(int law_start, int law_size)
  767. {
  768. struct rio_ops *ops;
  769. struct rio_mport *port;
  770. ops = kmalloc(sizeof(struct rio_ops), GFP_KERNEL);
  771. ops->lcread = mpc85xx_local_config_read;
  772. ops->lcwrite = mpc85xx_local_config_write;
  773. ops->cread = mpc85xx_rio_config_read;
  774. ops->cwrite = mpc85xx_rio_config_write;
  775. ops->dsend = mpc85xx_rio_doorbell_send;
  776. port = kmalloc(sizeof(struct rio_mport), GFP_KERNEL);
  777. port->id = 0;
  778. port->index = 0;
  779. INIT_LIST_HEAD(&port->dbells);
  780. port->iores.start = law_start;
  781. port->iores.end = law_start + law_size;
  782. port->iores.flags = IORESOURCE_MEM;
  783. rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff);
  784. rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0);
  785. rio_init_mbox_res(&port->riores[RIO_OUTB_MBOX_RESOURCE], 0, 0);
  786. strcpy(port->name, "RIO0 mport");
  787. port->ops = ops;
  788. port->host_deviceid = mpc85xx_rio_get_hdid(port->id);
  789. rio_register_mport(port);
  790. regs_win = (u32) ioremap(RIO_REGS_BASE, 0x20000);
  791. atmu_regs = (struct rio_atmu_regs *)(regs_win + RIO_ATMU_REGS_OFFSET);
  792. maint_atmu_regs = atmu_regs + 1;
  793. dbell_atmu_regs = atmu_regs + 2;
  794. msg_regs = (struct rio_msg_regs *)(regs_win + RIO_MSG_REGS_OFFSET);
  795. /* Configure maintenance transaction window */
  796. out_be32((void *)&maint_atmu_regs->rowbar, 0x000c0000);
  797. out_be32((void *)&maint_atmu_regs->rowar, 0x80077015);
  798. maint_win = (u32) ioremap(law_start, RIO_MAINT_WIN_SIZE);
  799. /* Configure outbound doorbell window */
  800. out_be32((void *)&dbell_atmu_regs->rowbar, 0x000c0400);
  801. out_be32((void *)&dbell_atmu_regs->rowar, 0x8004200b);
  802. mpc85xx_rio_doorbell_init(port);
  803. }