spruce.c 8.2 KB

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  1. /*
  2. * Board and PCI setup routines for IBM Spruce
  3. *
  4. * Author: MontaVista Software <source@mvista.com>
  5. *
  6. * 2000-2004 (c) MontaVista, Software, Inc. This file is licensed under
  7. * the terms of the GNU General Public License version 2. This program
  8. * is licensed "as is" without any warranty of any kind, whether express
  9. * or implied.
  10. */
  11. #include <linux/config.h>
  12. #include <linux/stddef.h>
  13. #include <linux/kernel.h>
  14. #include <linux/init.h>
  15. #include <linux/errno.h>
  16. #include <linux/reboot.h>
  17. #include <linux/pci.h>
  18. #include <linux/kdev_t.h>
  19. #include <linux/types.h>
  20. #include <linux/major.h>
  21. #include <linux/initrd.h>
  22. #include <linux/console.h>
  23. #include <linux/delay.h>
  24. #include <linux/seq_file.h>
  25. #include <linux/ide.h>
  26. #include <linux/root_dev.h>
  27. #include <linux/serial.h>
  28. #include <linux/tty.h>
  29. #include <linux/serial_core.h>
  30. #include <asm/system.h>
  31. #include <asm/pgtable.h>
  32. #include <asm/page.h>
  33. #include <asm/dma.h>
  34. #include <asm/io.h>
  35. #include <asm/machdep.h>
  36. #include <asm/time.h>
  37. #include <asm/todc.h>
  38. #include <asm/bootinfo.h>
  39. #include <asm/kgdb.h>
  40. #include <syslib/cpc700.h>
  41. #include "spruce.h"
  42. static inline int
  43. spruce_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
  44. {
  45. static char pci_irq_table[][4] =
  46. /*
  47. * PCI IDSEL/INTPIN->INTLINE
  48. * A B C D
  49. */
  50. {
  51. {23, 24, 25, 26}, /* IDSEL 1 - PCI slot 3 */
  52. {24, 25, 26, 23}, /* IDSEL 2 - PCI slot 2 */
  53. {25, 26, 23, 24}, /* IDSEL 3 - PCI slot 1 */
  54. {26, 23, 24, 25}, /* IDSEL 4 - PCI slot 0 */
  55. };
  56. const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
  57. return PCI_IRQ_TABLE_LOOKUP;
  58. }
  59. static void __init
  60. spruce_setup_hose(void)
  61. {
  62. struct pci_controller *hose;
  63. /* Setup hose */
  64. hose = pcibios_alloc_controller();
  65. if (!hose)
  66. return;
  67. hose->first_busno = 0;
  68. hose->last_busno = 0xff;
  69. pci_init_resource(&hose->io_resource,
  70. SPRUCE_PCI_LOWER_IO,
  71. SPRUCE_PCI_UPPER_IO,
  72. IORESOURCE_IO,
  73. "PCI host bridge");
  74. pci_init_resource(&hose->mem_resources[0],
  75. SPRUCE_PCI_LOWER_MEM,
  76. SPRUCE_PCI_UPPER_MEM,
  77. IORESOURCE_MEM,
  78. "PCI host bridge");
  79. hose->io_space.start = SPRUCE_PCI_LOWER_IO;
  80. hose->io_space.end = SPRUCE_PCI_UPPER_IO;
  81. hose->mem_space.start = SPRUCE_PCI_LOWER_MEM;
  82. hose->mem_space.end = SPRUCE_PCI_UPPER_MEM;
  83. hose->io_base_virt = (void *)SPRUCE_ISA_IO_BASE;
  84. setup_indirect_pci(hose,
  85. SPRUCE_PCI_CONFIG_ADDR,
  86. SPRUCE_PCI_CONFIG_DATA);
  87. hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
  88. ppc_md.pci_swizzle = common_swizzle;
  89. ppc_md.pci_map_irq = spruce_map_irq;
  90. }
  91. /*
  92. * CPC700 PIC interrupt programming table
  93. *
  94. * First entry is the sensitivity (level/edge), second is the polarity.
  95. */
  96. unsigned int cpc700_irq_assigns[32][2] = {
  97. { 1, 1 }, /* IRQ 0: ECC Correctable Error - rising edge */
  98. { 1, 1 }, /* IRQ 1: PCI Write Mem Range - rising edge */
  99. { 0, 1 }, /* IRQ 2: PCI Write Command Reg - active high */
  100. { 0, 1 }, /* IRQ 3: UART 0 - active high */
  101. { 0, 1 }, /* IRQ 4: UART 1 - active high */
  102. { 0, 1 }, /* IRQ 5: ICC 0 - active high */
  103. { 0, 1 }, /* IRQ 6: ICC 1 - active high */
  104. { 0, 1 }, /* IRQ 7: GPT Compare 0 - active high */
  105. { 0, 1 }, /* IRQ 8: GPT Compare 1 - active high */
  106. { 0, 1 }, /* IRQ 9: GPT Compare 2 - active high */
  107. { 0, 1 }, /* IRQ 10: GPT Compare 3 - active high */
  108. { 0, 1 }, /* IRQ 11: GPT Compare 4 - active high */
  109. { 0, 1 }, /* IRQ 12: GPT Capture 0 - active high */
  110. { 0, 1 }, /* IRQ 13: GPT Capture 1 - active high */
  111. { 0, 1 }, /* IRQ 14: GPT Capture 2 - active high */
  112. { 0, 1 }, /* IRQ 15: GPT Capture 3 - active high */
  113. { 0, 1 }, /* IRQ 16: GPT Capture 4 - active high */
  114. { 0, 0 }, /* IRQ 17: Reserved */
  115. { 0, 0 }, /* IRQ 18: Reserved */
  116. { 0, 0 }, /* IRQ 19: Reserved */
  117. { 0, 1 }, /* IRQ 20: FPGA EXT_IRQ0 - active high */
  118. { 1, 1 }, /* IRQ 21: Mouse - rising edge */
  119. { 1, 1 }, /* IRQ 22: Keyboard - rising edge */
  120. { 0, 0 }, /* IRQ 23: PCI Slot 3 - active low */
  121. { 0, 0 }, /* IRQ 24: PCI Slot 2 - active low */
  122. { 0, 0 }, /* IRQ 25: PCI Slot 1 - active low */
  123. { 0, 0 }, /* IRQ 26: PCI Slot 0 - active low */
  124. };
  125. static void __init
  126. spruce_calibrate_decr(void)
  127. {
  128. int freq, divisor = 4;
  129. /* determine processor bus speed */
  130. freq = SPRUCE_BUS_SPEED;
  131. tb_ticks_per_jiffy = freq / HZ / divisor;
  132. tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
  133. }
  134. static int
  135. spruce_show_cpuinfo(struct seq_file *m)
  136. {
  137. seq_printf(m, "vendor\t\t: IBM\n");
  138. seq_printf(m, "machine\t\t: Spruce\n");
  139. return 0;
  140. }
  141. static void __init
  142. spruce_early_serial_map(void)
  143. {
  144. u32 uart_clk;
  145. struct uart_port serial_req;
  146. if (SPRUCE_UARTCLK_IS_33M(readb(SPRUCE_FPGA_REG_A)))
  147. uart_clk = SPRUCE_BAUD_33M * 16;
  148. else
  149. uart_clk = SPRUCE_BAUD_30M * 16;
  150. /* Setup serial port access */
  151. memset(&serial_req, 0, sizeof(serial_req));
  152. serial_req.uartclk = uart_clk;
  153. serial_req.irq = UART0_INT;
  154. serial_req.flags = UPF_BOOT_AUTOCONF;
  155. serial_req.iotype = UPIO_MEM;
  156. serial_req.membase = (u_char *)UART0_IO_BASE;
  157. serial_req.regshift = 0;
  158. #if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG)
  159. gen550_init(0, &serial_req);
  160. #endif
  161. #ifdef CONFIG_SERIAL_8250
  162. if (early_serial_setup(&serial_req) != 0)
  163. printk("Early serial init of port 0 failed\n");
  164. #endif
  165. /* Assume early_serial_setup() doesn't modify serial_req */
  166. serial_req.line = 1;
  167. serial_req.irq = UART1_INT;
  168. serial_req.membase = (u_char *)UART1_IO_BASE;
  169. #if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG)
  170. gen550_init(1, &serial_req);
  171. #endif
  172. #ifdef CONFIG_SERIAL_8250
  173. if (early_serial_setup(&serial_req) != 0)
  174. printk("Early serial init of port 1 failed\n");
  175. #endif
  176. }
  177. TODC_ALLOC();
  178. static void __init
  179. spruce_setup_arch(void)
  180. {
  181. /* Setup TODC access */
  182. TODC_INIT(TODC_TYPE_DS1643, 0, 0, SPRUCE_RTC_BASE_ADDR, 8);
  183. /* init to some ~sane value until calibrate_delay() runs */
  184. loops_per_jiffy = 50000000 / HZ;
  185. /* Setup PCI host bridge */
  186. spruce_setup_hose();
  187. #ifdef CONFIG_BLK_DEV_INITRD
  188. if (initrd_start)
  189. ROOT_DEV = Root_RAM0;
  190. else
  191. #endif
  192. #ifdef CONFIG_ROOT_NFS
  193. ROOT_DEV = Root_NFS;
  194. #else
  195. ROOT_DEV = Root_SDA1;
  196. #endif
  197. /* Identify the system */
  198. printk(KERN_INFO "System Identification: IBM Spruce\n");
  199. printk(KERN_INFO "Port by MontaVista Software, Inc. (source@mvista.com)\n");
  200. }
  201. static void
  202. spruce_restart(char *cmd)
  203. {
  204. local_irq_disable();
  205. /* SRR0 has system reset vector, SRR1 has default MSR value */
  206. /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
  207. __asm__ __volatile__
  208. ("\n\
  209. lis 3,0xfff0 \n\
  210. ori 3,3,0x0100 \n\
  211. mtspr 26,3 \n\
  212. li 3,0 \n\
  213. mtspr 27,3 \n\
  214. rfi \n\
  215. ");
  216. for(;;);
  217. }
  218. static void
  219. spruce_power_off(void)
  220. {
  221. for(;;);
  222. }
  223. static void
  224. spruce_halt(void)
  225. {
  226. spruce_restart(NULL);
  227. }
  228. static void __init
  229. spruce_map_io(void)
  230. {
  231. io_block_mapping(SPRUCE_PCI_IO_BASE, SPRUCE_PCI_PHY_IO_BASE,
  232. 0x08000000, _PAGE_IO);
  233. }
  234. /*
  235. * Set BAT 3 to map 0xf8000000 to end of physical memory space 1-to-1.
  236. */
  237. static __inline__ void
  238. spruce_set_bat(void)
  239. {
  240. mb();
  241. mtspr(SPRN_DBAT1U, 0xf8000ffe);
  242. mtspr(SPRN_DBAT1L, 0xf800002a);
  243. mb();
  244. }
  245. void __init
  246. platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
  247. unsigned long r6, unsigned long r7)
  248. {
  249. parse_bootinfo(find_bootinfo());
  250. /* Map in board regs, etc. */
  251. spruce_set_bat();
  252. isa_io_base = SPRUCE_ISA_IO_BASE;
  253. pci_dram_offset = SPRUCE_PCI_SYS_MEM_BASE;
  254. ppc_md.setup_arch = spruce_setup_arch;
  255. ppc_md.show_cpuinfo = spruce_show_cpuinfo;
  256. ppc_md.init_IRQ = cpc700_init_IRQ;
  257. ppc_md.get_irq = cpc700_get_irq;
  258. ppc_md.setup_io_mappings = spruce_map_io;
  259. ppc_md.restart = spruce_restart;
  260. ppc_md.power_off = spruce_power_off;
  261. ppc_md.halt = spruce_halt;
  262. ppc_md.time_init = todc_time_init;
  263. ppc_md.set_rtc_time = todc_set_rtc_time;
  264. ppc_md.get_rtc_time = todc_get_rtc_time;
  265. ppc_md.calibrate_decr = spruce_calibrate_decr;
  266. ppc_md.nvram_read_val = todc_direct_read_val;
  267. ppc_md.nvram_write_val = todc_direct_write_val;
  268. spruce_early_serial_map();
  269. #ifdef CONFIG_SERIAL_TEXT_DEBUG
  270. ppc_md.progress = gen550_progress;
  271. #endif /* CONFIG_SERIAL_TEXT_DEBUG */
  272. #ifdef CONFIG_KGDB
  273. ppc_md.kgdb_map_scc = gen550_kgdb_map_scc;
  274. #endif
  275. }