ppc_htab.c 11 KB

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  1. /*
  2. * PowerPC hash table management proc entry. Will show information
  3. * about the current hash table and will allow changes to it.
  4. *
  5. * Written by Cort Dougan (cort@cs.nmt.edu)
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/config.h>
  13. #include <linux/errno.h>
  14. #include <linux/sched.h>
  15. #include <linux/proc_fs.h>
  16. #include <linux/stat.h>
  17. #include <linux/sysctl.h>
  18. #include <linux/capability.h>
  19. #include <linux/ctype.h>
  20. #include <linux/threads.h>
  21. #include <linux/smp_lock.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/init.h>
  24. #include <linux/bitops.h>
  25. #include <asm/uaccess.h>
  26. #include <asm/mmu.h>
  27. #include <asm/residual.h>
  28. #include <asm/io.h>
  29. #include <asm/pgtable.h>
  30. #include <asm/cputable.h>
  31. #include <asm/system.h>
  32. #include <asm/reg.h>
  33. static int ppc_htab_show(struct seq_file *m, void *v);
  34. static ssize_t ppc_htab_write(struct file * file, const char __user * buffer,
  35. size_t count, loff_t *ppos);
  36. extern PTE *Hash, *Hash_end;
  37. extern unsigned long Hash_size, Hash_mask;
  38. extern unsigned long _SDR1;
  39. extern unsigned long htab_reloads;
  40. extern unsigned long htab_preloads;
  41. extern unsigned long htab_evicts;
  42. extern unsigned long pte_misses;
  43. extern unsigned long pte_errors;
  44. extern unsigned int primary_pteg_full;
  45. extern unsigned int htab_hash_searches;
  46. static int ppc_htab_open(struct inode *inode, struct file *file)
  47. {
  48. return single_open(file, ppc_htab_show, NULL);
  49. }
  50. const struct file_operations ppc_htab_operations = {
  51. .open = ppc_htab_open,
  52. .read = seq_read,
  53. .llseek = seq_lseek,
  54. .write = ppc_htab_write,
  55. .release = single_release,
  56. };
  57. static char *pmc1_lookup(unsigned long mmcr0)
  58. {
  59. switch ( mmcr0 & (0x7f<<7) )
  60. {
  61. case 0x0:
  62. return "none";
  63. case MMCR0_PMC1_CYCLES:
  64. return "cycles";
  65. case MMCR0_PMC1_ICACHEMISS:
  66. return "ic miss";
  67. case MMCR0_PMC1_DTLB:
  68. return "dtlb miss";
  69. default:
  70. return "unknown";
  71. }
  72. }
  73. static char *pmc2_lookup(unsigned long mmcr0)
  74. {
  75. switch ( mmcr0 & 0x3f )
  76. {
  77. case 0x0:
  78. return "none";
  79. case MMCR0_PMC2_CYCLES:
  80. return "cycles";
  81. case MMCR0_PMC2_DCACHEMISS:
  82. return "dc miss";
  83. case MMCR0_PMC2_ITLB:
  84. return "itlb miss";
  85. case MMCR0_PMC2_LOADMISSTIME:
  86. return "load miss time";
  87. default:
  88. return "unknown";
  89. }
  90. }
  91. /*
  92. * print some useful info about the hash table. This function
  93. * is _REALLY_ slow (see the nested for loops below) but nothing
  94. * in here should be really timing critical. -- Cort
  95. */
  96. static int ppc_htab_show(struct seq_file *m, void *v)
  97. {
  98. unsigned long mmcr0 = 0, pmc1 = 0, pmc2 = 0;
  99. #if defined(CONFIG_PPC_STD_MMU)
  100. unsigned int kptes = 0, uptes = 0;
  101. PTE *ptr;
  102. #endif /* CONFIG_PPC_STD_MMU */
  103. if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
  104. mmcr0 = mfspr(SPRN_MMCR0);
  105. pmc1 = mfspr(SPRN_PMC1);
  106. pmc2 = mfspr(SPRN_PMC2);
  107. seq_printf(m,
  108. "604 Performance Monitoring\n"
  109. "MMCR0\t\t: %08lx %s%s ",
  110. mmcr0,
  111. ( mmcr0>>28 & 0x2 ) ? "(user mode counted)" : "",
  112. ( mmcr0>>28 & 0x4 ) ? "(kernel mode counted)" : "");
  113. seq_printf(m,
  114. "\nPMC1\t\t: %08lx (%s)\n"
  115. "PMC2\t\t: %08lx (%s)\n",
  116. pmc1, pmc1_lookup(mmcr0),
  117. pmc2, pmc2_lookup(mmcr0));
  118. }
  119. #ifdef CONFIG_PPC_STD_MMU
  120. /* if we don't have a htab */
  121. if ( Hash_size == 0 ) {
  122. seq_printf(m, "No Hash Table used\n");
  123. return 0;
  124. }
  125. for (ptr = Hash; ptr < Hash_end; ptr++) {
  126. unsigned int mctx, vsid;
  127. if (!ptr->v)
  128. continue;
  129. /* undo the esid skew */
  130. vsid = ptr->vsid;
  131. mctx = ((vsid - (vsid & 0xf) * 0x111) >> 4) & 0xfffff;
  132. if (mctx == 0)
  133. kptes++;
  134. else
  135. uptes++;
  136. }
  137. seq_printf(m,
  138. "PTE Hash Table Information\n"
  139. "Size\t\t: %luKb\n"
  140. "Buckets\t\t: %lu\n"
  141. "Address\t\t: %08lx\n"
  142. "Entries\t\t: %lu\n"
  143. "User ptes\t: %u\n"
  144. "Kernel ptes\t: %u\n"
  145. "Percent full\t: %lu%%\n"
  146. , (unsigned long)(Hash_size>>10),
  147. (Hash_size/(sizeof(PTE)*8)),
  148. (unsigned long)Hash,
  149. Hash_size/sizeof(PTE)
  150. , uptes,
  151. kptes,
  152. ((kptes+uptes)*100) / (Hash_size/sizeof(PTE))
  153. );
  154. seq_printf(m,
  155. "Reloads\t\t: %lu\n"
  156. "Preloads\t: %lu\n"
  157. "Searches\t: %u\n"
  158. "Overflows\t: %u\n"
  159. "Evicts\t\t: %lu\n",
  160. htab_reloads, htab_preloads, htab_hash_searches,
  161. primary_pteg_full, htab_evicts);
  162. #endif /* CONFIG_PPC_STD_MMU */
  163. seq_printf(m,
  164. "Non-error misses: %lu\n"
  165. "Error misses\t: %lu\n",
  166. pte_misses, pte_errors);
  167. return 0;
  168. }
  169. /*
  170. * Allow user to define performance counters and resize the hash table
  171. */
  172. static ssize_t ppc_htab_write(struct file * file, const char __user * ubuffer,
  173. size_t count, loff_t *ppos)
  174. {
  175. #ifdef CONFIG_PPC_STD_MMU
  176. unsigned long tmp;
  177. char buffer[16];
  178. if (!capable(CAP_SYS_ADMIN))
  179. return -EACCES;
  180. if (strncpy_from_user(buffer, ubuffer, 15))
  181. return -EFAULT;
  182. buffer[15] = 0;
  183. /* don't set the htab size for now */
  184. if ( !strncmp( buffer, "size ", 5) )
  185. return -EBUSY;
  186. if ( !strncmp( buffer, "reset", 5) )
  187. {
  188. if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
  189. /* reset PMC1 and PMC2 */
  190. mtspr(SPRN_PMC1, 0);
  191. mtspr(SPRN_PMC2, 0);
  192. }
  193. htab_reloads = 0;
  194. htab_evicts = 0;
  195. pte_misses = 0;
  196. pte_errors = 0;
  197. }
  198. /* Everything below here requires the performance monitor feature. */
  199. if (!cpu_has_feature(CPU_FTR_604_PERF_MON))
  200. return count;
  201. /* turn off performance monitoring */
  202. if ( !strncmp( buffer, "off", 3) )
  203. {
  204. mtspr(SPRN_MMCR0, 0);
  205. mtspr(SPRN_PMC1, 0);
  206. mtspr(SPRN_PMC2, 0);
  207. }
  208. if ( !strncmp( buffer, "user", 4) )
  209. {
  210. /* setup mmcr0 and clear the correct pmc */
  211. tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x20000000;
  212. mtspr(SPRN_MMCR0, tmp);
  213. mtspr(SPRN_PMC1, 0);
  214. mtspr(SPRN_PMC2, 0);
  215. }
  216. if ( !strncmp( buffer, "kernel", 6) )
  217. {
  218. /* setup mmcr0 and clear the correct pmc */
  219. tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x40000000;
  220. mtspr(SPRN_MMCR0, tmp);
  221. mtspr(SPRN_PMC1, 0);
  222. mtspr(SPRN_PMC2, 0);
  223. }
  224. /* PMC1 values */
  225. if ( !strncmp( buffer, "dtlb", 4) )
  226. {
  227. /* setup mmcr0 and clear the correct pmc */
  228. tmp = (mfspr(SPRN_MMCR0) & ~(0x7F << 7)) | MMCR0_PMC1_DTLB;
  229. mtspr(SPRN_MMCR0, tmp);
  230. mtspr(SPRN_PMC1, 0);
  231. }
  232. if ( !strncmp( buffer, "ic miss", 7) )
  233. {
  234. /* setup mmcr0 and clear the correct pmc */
  235. tmp = (mfspr(SPRN_MMCR0) & ~(0x7F<<7)) | MMCR0_PMC1_ICACHEMISS;
  236. mtspr(SPRN_MMCR0, tmp);
  237. mtspr(SPRN_PMC1, 0);
  238. }
  239. /* PMC2 values */
  240. if ( !strncmp( buffer, "load miss time", 14) )
  241. {
  242. /* setup mmcr0 and clear the correct pmc */
  243. asm volatile(
  244. "mfspr %0,%1\n\t" /* get current mccr0 */
  245. "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
  246. "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
  247. "mtspr %1,%0 \n\t" /* set new mccr0 */
  248. "mtspr %3,%4 \n\t" /* reset the pmc */
  249. : "=r" (tmp)
  250. : "i" (SPRN_MMCR0),
  251. "i" (MMCR0_PMC2_LOADMISSTIME),
  252. "i" (SPRN_PMC2), "r" (0) );
  253. }
  254. if ( !strncmp( buffer, "itlb", 4) )
  255. {
  256. /* setup mmcr0 and clear the correct pmc */
  257. asm volatile(
  258. "mfspr %0,%1\n\t" /* get current mccr0 */
  259. "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
  260. "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
  261. "mtspr %1,%0 \n\t" /* set new mccr0 */
  262. "mtspr %3,%4 \n\t" /* reset the pmc */
  263. : "=r" (tmp)
  264. : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_ITLB),
  265. "i" (SPRN_PMC2), "r" (0) );
  266. }
  267. if ( !strncmp( buffer, "dc miss", 7) )
  268. {
  269. /* setup mmcr0 and clear the correct pmc */
  270. asm volatile(
  271. "mfspr %0,%1\n\t" /* get current mccr0 */
  272. "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
  273. "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
  274. "mtspr %1,%0 \n\t" /* set new mccr0 */
  275. "mtspr %3,%4 \n\t" /* reset the pmc */
  276. : "=r" (tmp)
  277. : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_DCACHEMISS),
  278. "i" (SPRN_PMC2), "r" (0) );
  279. }
  280. return count;
  281. #else /* CONFIG_PPC_STD_MMU */
  282. return 0;
  283. #endif /* CONFIG_PPC_STD_MMU */
  284. }
  285. int proc_dol2crvec(ctl_table *table, int write, struct file *filp,
  286. void __user *buffer_arg, size_t *lenp, loff_t *ppos)
  287. {
  288. int vleft, first=1, len, left, val;
  289. char __user *buffer = (char __user *) buffer_arg;
  290. #define TMPBUFLEN 256
  291. char buf[TMPBUFLEN], *p;
  292. static const char *sizestrings[4] = {
  293. "2MB", "256KB", "512KB", "1MB"
  294. };
  295. static const char *clockstrings[8] = {
  296. "clock disabled", "+1 clock", "+1.5 clock", "reserved(3)",
  297. "+2 clock", "+2.5 clock", "+3 clock", "reserved(7)"
  298. };
  299. static const char *typestrings[4] = {
  300. "flow-through burst SRAM", "reserved SRAM",
  301. "pipelined burst SRAM", "pipelined late-write SRAM"
  302. };
  303. static const char *holdstrings[4] = {
  304. "0.5", "1.0", "(reserved2)", "(reserved3)"
  305. };
  306. if (!cpu_has_feature(CPU_FTR_L2CR))
  307. return -EFAULT;
  308. if ( /*!table->maxlen ||*/ (*ppos && !write)) {
  309. *lenp = 0;
  310. return 0;
  311. }
  312. vleft = table->maxlen / sizeof(int);
  313. left = *lenp;
  314. for (; left /*&& vleft--*/; first=0) {
  315. if (write) {
  316. while (left) {
  317. char c;
  318. if(get_user(c, buffer))
  319. return -EFAULT;
  320. if (!isspace(c))
  321. break;
  322. left--;
  323. buffer++;
  324. }
  325. if (!left)
  326. break;
  327. len = left;
  328. if (len > TMPBUFLEN-1)
  329. len = TMPBUFLEN-1;
  330. if(copy_from_user(buf, buffer, len))
  331. return -EFAULT;
  332. buf[len] = 0;
  333. p = buf;
  334. if (*p < '0' || *p > '9')
  335. break;
  336. val = simple_strtoul(p, &p, 0);
  337. len = p-buf;
  338. if ((len < left) && *p && !isspace(*p))
  339. break;
  340. buffer += len;
  341. left -= len;
  342. _set_L2CR(val);
  343. } else {
  344. p = buf;
  345. if (!first)
  346. *p++ = '\t';
  347. val = _get_L2CR();
  348. p += sprintf(p, "0x%08x: ", val);
  349. p += sprintf(p, " %s", (val >> 31) & 1 ? "enabled" :
  350. "disabled");
  351. p += sprintf(p, ", %sparity", (val>>30)&1 ? "" : "no ");
  352. p += sprintf(p, ", %s", sizestrings[(val >> 28) & 3]);
  353. p += sprintf(p, ", %s", clockstrings[(val >> 25) & 7]);
  354. p += sprintf(p, ", %s", typestrings[(val >> 23) & 2]);
  355. p += sprintf(p, "%s", (val>>22)&1 ? ", data only" : "");
  356. p += sprintf(p, "%s", (val>>20)&1 ? ", ZZ enabled": "");
  357. p += sprintf(p, ", %s", (val>>19)&1 ? "write-through" :
  358. "copy-back");
  359. p += sprintf(p, "%s", (val>>18)&1 ? ", testing" : "");
  360. p += sprintf(p, ", %sns hold",holdstrings[(val>>16)&3]);
  361. p += sprintf(p, "%s", (val>>15)&1 ? ", DLL slow" : "");
  362. p += sprintf(p, "%s", (val>>14)&1 ? ", diff clock" :"");
  363. p += sprintf(p, "%s", (val>>13)&1 ? ", DLL bypass" :"");
  364. p += sprintf(p,"\n");
  365. len = strlen(buf);
  366. if (len > left)
  367. len = left;
  368. if (copy_to_user(buffer, buf, len))
  369. return -EFAULT;
  370. left -= len;
  371. buffer += len;
  372. break;
  373. }
  374. }
  375. if (!write && !first && left) {
  376. if(put_user('\n', (char __user *) buffer))
  377. return -EFAULT;
  378. left--, buffer++;
  379. }
  380. if (write) {
  381. char __user *s = (char __user *) buffer;
  382. while (left) {
  383. char c;
  384. if(get_user(c, s++))
  385. return -EFAULT;
  386. if (!isspace(c))
  387. break;
  388. left--;
  389. }
  390. }
  391. if (write && first)
  392. return -EINVAL;
  393. *lenp -= left;
  394. *ppos += *lenp;
  395. return 0;
  396. }
  397. #ifdef CONFIG_SYSCTL
  398. /*
  399. * Register our sysctl.
  400. */
  401. static ctl_table htab_ctl_table[]={
  402. {
  403. .ctl_name = KERN_PPC_L2CR,
  404. .procname = "l2cr",
  405. .mode = 0644,
  406. .proc_handler = &proc_dol2crvec,
  407. },
  408. { 0, },
  409. };
  410. static ctl_table htab_sysctl_root[] = {
  411. { 1, "kernel", NULL, 0, 0755, htab_ctl_table, },
  412. { 0,},
  413. };
  414. static int __init
  415. register_ppc_htab_sysctl(void)
  416. {
  417. register_sysctl_table(htab_sysctl_root, 0);
  418. return 0;
  419. }
  420. __initcall(register_ppc_htab_sysctl);
  421. #endif