ras.c 10 KB

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  1. /*
  2. * Copyright (C) 2001 Dave Engebretsen IBM Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17. */
  18. /* Change Activity:
  19. * 2001/09/21 : engebret : Created with minimal EPOW and HW exception support.
  20. * End Change Activity
  21. */
  22. #include <linux/errno.h>
  23. #include <linux/threads.h>
  24. #include <linux/kernel_stat.h>
  25. #include <linux/signal.h>
  26. #include <linux/sched.h>
  27. #include <linux/ioport.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/timex.h>
  30. #include <linux/init.h>
  31. #include <linux/slab.h>
  32. #include <linux/pci.h>
  33. #include <linux/delay.h>
  34. #include <linux/irq.h>
  35. #include <linux/random.h>
  36. #include <linux/sysrq.h>
  37. #include <linux/bitops.h>
  38. #include <asm/uaccess.h>
  39. #include <asm/system.h>
  40. #include <asm/io.h>
  41. #include <asm/pgtable.h>
  42. #include <asm/irq.h>
  43. #include <asm/cache.h>
  44. #include <asm/prom.h>
  45. #include <asm/ptrace.h>
  46. #include <asm/machdep.h>
  47. #include <asm/rtas.h>
  48. #include <asm/udbg.h>
  49. #include <asm/firmware.h>
  50. #include "ras.h"
  51. static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX];
  52. static DEFINE_SPINLOCK(ras_log_buf_lock);
  53. char mce_data_buf[RTAS_ERROR_LOG_MAX];
  54. static int ras_get_sensor_state_token;
  55. static int ras_check_exception_token;
  56. #define EPOW_SENSOR_TOKEN 9
  57. #define EPOW_SENSOR_INDEX 0
  58. #define RAS_VECTOR_OFFSET 0x500
  59. static irqreturn_t ras_epow_interrupt(int irq, void *dev_id,
  60. struct pt_regs * regs);
  61. static irqreturn_t ras_error_interrupt(int irq, void *dev_id,
  62. struct pt_regs * regs);
  63. /* #define DEBUG */
  64. static void request_ras_irqs(struct device_node *np, char *propname,
  65. irqreturn_t (*handler)(int, void *, struct pt_regs *),
  66. const char *name)
  67. {
  68. unsigned int *ireg, len, i;
  69. int virq, n_intr;
  70. ireg = (unsigned int *)get_property(np, propname, &len);
  71. if (ireg == NULL)
  72. return;
  73. n_intr = prom_n_intr_cells(np);
  74. len /= n_intr * sizeof(*ireg);
  75. for (i = 0; i < len; i++) {
  76. virq = virt_irq_create_mapping(*ireg);
  77. if (virq == NO_IRQ) {
  78. printk(KERN_ERR "Unable to allocate interrupt "
  79. "number for %s\n", np->full_name);
  80. return;
  81. }
  82. if (request_irq(irq_offset_up(virq), handler, 0, name, NULL)) {
  83. printk(KERN_ERR "Unable to request interrupt %d for "
  84. "%s\n", irq_offset_up(virq), np->full_name);
  85. return;
  86. }
  87. ireg += n_intr;
  88. }
  89. }
  90. /*
  91. * Initialize handlers for the set of interrupts caused by hardware errors
  92. * and power system events.
  93. */
  94. static int __init init_ras_IRQ(void)
  95. {
  96. struct device_node *np;
  97. ras_get_sensor_state_token = rtas_token("get-sensor-state");
  98. ras_check_exception_token = rtas_token("check-exception");
  99. /* Internal Errors */
  100. np = of_find_node_by_path("/event-sources/internal-errors");
  101. if (np != NULL) {
  102. request_ras_irqs(np, "open-pic-interrupt", ras_error_interrupt,
  103. "RAS_ERROR");
  104. request_ras_irqs(np, "interrupts", ras_error_interrupt,
  105. "RAS_ERROR");
  106. of_node_put(np);
  107. }
  108. /* EPOW Events */
  109. np = of_find_node_by_path("/event-sources/epow-events");
  110. if (np != NULL) {
  111. request_ras_irqs(np, "open-pic-interrupt", ras_epow_interrupt,
  112. "RAS_EPOW");
  113. request_ras_irqs(np, "interrupts", ras_epow_interrupt,
  114. "RAS_EPOW");
  115. of_node_put(np);
  116. }
  117. return 0;
  118. }
  119. __initcall(init_ras_IRQ);
  120. /*
  121. * Handle power subsystem events (EPOW).
  122. *
  123. * Presently we just log the event has occurred. This should be fixed
  124. * to examine the type of power failure and take appropriate action where
  125. * the time horizon permits something useful to be done.
  126. */
  127. static irqreturn_t
  128. ras_epow_interrupt(int irq, void *dev_id, struct pt_regs * regs)
  129. {
  130. int status = 0xdeadbeef;
  131. int state = 0;
  132. int critical;
  133. status = rtas_call(ras_get_sensor_state_token, 2, 2, &state,
  134. EPOW_SENSOR_TOKEN, EPOW_SENSOR_INDEX);
  135. if (state > 3)
  136. critical = 1; /* Time Critical */
  137. else
  138. critical = 0;
  139. spin_lock(&ras_log_buf_lock);
  140. status = rtas_call(ras_check_exception_token, 6, 1, NULL,
  141. RAS_VECTOR_OFFSET,
  142. virt_irq_to_real(irq_offset_down(irq)),
  143. RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS,
  144. critical, __pa(&ras_log_buf),
  145. rtas_get_error_log_max());
  146. udbg_printf("EPOW <0x%lx 0x%x 0x%x>\n",
  147. *((unsigned long *)&ras_log_buf), status, state);
  148. printk(KERN_WARNING "EPOW <0x%lx 0x%x 0x%x>\n",
  149. *((unsigned long *)&ras_log_buf), status, state);
  150. /* format and print the extended information */
  151. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0);
  152. spin_unlock(&ras_log_buf_lock);
  153. return IRQ_HANDLED;
  154. }
  155. /*
  156. * Handle hardware error interrupts.
  157. *
  158. * RTAS check-exception is called to collect data on the exception. If
  159. * the error is deemed recoverable, we log a warning and return.
  160. * For nonrecoverable errors, an error is logged and we stop all processing
  161. * as quickly as possible in order to prevent propagation of the failure.
  162. */
  163. static irqreturn_t
  164. ras_error_interrupt(int irq, void *dev_id, struct pt_regs * regs)
  165. {
  166. struct rtas_error_log *rtas_elog;
  167. int status = 0xdeadbeef;
  168. int fatal;
  169. spin_lock(&ras_log_buf_lock);
  170. status = rtas_call(ras_check_exception_token, 6, 1, NULL,
  171. RAS_VECTOR_OFFSET,
  172. virt_irq_to_real(irq_offset_down(irq)),
  173. RTAS_INTERNAL_ERROR, 1 /*Time Critical */,
  174. __pa(&ras_log_buf),
  175. rtas_get_error_log_max());
  176. rtas_elog = (struct rtas_error_log *)ras_log_buf;
  177. if ((status == 0) && (rtas_elog->severity >= RTAS_SEVERITY_ERROR_SYNC))
  178. fatal = 1;
  179. else
  180. fatal = 0;
  181. /* format and print the extended information */
  182. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, fatal);
  183. if (fatal) {
  184. udbg_printf("Fatal HW Error <0x%lx 0x%x>\n",
  185. *((unsigned long *)&ras_log_buf), status);
  186. printk(KERN_EMERG "Error: Fatal hardware error <0x%lx 0x%x>\n",
  187. *((unsigned long *)&ras_log_buf), status);
  188. #ifndef DEBUG
  189. /* Don't actually power off when debugging so we can test
  190. * without actually failing while injecting errors.
  191. * Error data will not be logged to syslog.
  192. */
  193. ppc_md.power_off();
  194. #endif
  195. } else {
  196. udbg_printf("Recoverable HW Error <0x%lx 0x%x>\n",
  197. *((unsigned long *)&ras_log_buf), status);
  198. printk(KERN_WARNING
  199. "Warning: Recoverable hardware error <0x%lx 0x%x>\n",
  200. *((unsigned long *)&ras_log_buf), status);
  201. }
  202. spin_unlock(&ras_log_buf_lock);
  203. return IRQ_HANDLED;
  204. }
  205. /* Get the error information for errors coming through the
  206. * FWNMI vectors. The pt_regs' r3 will be updated to reflect
  207. * the actual r3 if possible, and a ptr to the error log entry
  208. * will be returned if found.
  209. *
  210. * The mce_data_buf does not have any locks or protection around it,
  211. * if a second machine check comes in, or a system reset is done
  212. * before we have logged the error, then we will get corruption in the
  213. * error log. This is preferable over holding off on calling
  214. * ibm,nmi-interlock which would result in us checkstopping if a
  215. * second machine check did come in.
  216. */
  217. static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs)
  218. {
  219. unsigned long errdata = regs->gpr[3];
  220. struct rtas_error_log *errhdr = NULL;
  221. unsigned long *savep;
  222. if ((errdata >= 0x7000 && errdata < 0x7fff0) ||
  223. (errdata >= rtas.base && errdata < rtas.base + rtas.size - 16)) {
  224. savep = __va(errdata);
  225. regs->gpr[3] = savep[0]; /* restore original r3 */
  226. memset(mce_data_buf, 0, RTAS_ERROR_LOG_MAX);
  227. memcpy(mce_data_buf, (char *)(savep + 1), RTAS_ERROR_LOG_MAX);
  228. errhdr = (struct rtas_error_log *)mce_data_buf;
  229. } else {
  230. printk("FWNMI: corrupt r3\n");
  231. }
  232. return errhdr;
  233. }
  234. /* Call this when done with the data returned by FWNMI_get_errinfo.
  235. * It will release the saved data area for other CPUs in the
  236. * partition to receive FWNMI errors.
  237. */
  238. static void fwnmi_release_errinfo(void)
  239. {
  240. int ret = rtas_call(rtas_token("ibm,nmi-interlock"), 0, 1, NULL);
  241. if (ret != 0)
  242. printk("FWNMI: nmi-interlock failed: %d\n", ret);
  243. }
  244. int pSeries_system_reset_exception(struct pt_regs *regs)
  245. {
  246. if (fwnmi_active) {
  247. struct rtas_error_log *errhdr = fwnmi_get_errinfo(regs);
  248. if (errhdr) {
  249. /* XXX Should look at FWNMI information */
  250. }
  251. fwnmi_release_errinfo();
  252. }
  253. return 0; /* need to perform reset */
  254. }
  255. /*
  256. * See if we can recover from a machine check exception.
  257. * This is only called on power4 (or above) and only via
  258. * the Firmware Non-Maskable Interrupts (fwnmi) handler
  259. * which provides the error analysis for us.
  260. *
  261. * Return 1 if corrected (or delivered a signal).
  262. * Return 0 if there is nothing we can do.
  263. */
  264. static int recover_mce(struct pt_regs *regs, struct rtas_error_log * err)
  265. {
  266. int nonfatal = 0;
  267. if (err->disposition == RTAS_DISP_FULLY_RECOVERED) {
  268. /* Platform corrected itself */
  269. nonfatal = 1;
  270. } else if ((regs->msr & MSR_RI) &&
  271. user_mode(regs) &&
  272. err->severity == RTAS_SEVERITY_ERROR_SYNC &&
  273. err->disposition == RTAS_DISP_NOT_RECOVERED &&
  274. err->target == RTAS_TARGET_MEMORY &&
  275. err->type == RTAS_TYPE_ECC_UNCORR &&
  276. !(current->pid == 0 || current->pid == 1)) {
  277. /* Kill off a user process with an ECC error */
  278. printk(KERN_ERR "MCE: uncorrectable ecc error for pid %d\n",
  279. current->pid);
  280. /* XXX something better for ECC error? */
  281. _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
  282. nonfatal = 1;
  283. }
  284. log_error((char *)err, ERR_TYPE_RTAS_LOG, !nonfatal);
  285. return nonfatal;
  286. }
  287. /*
  288. * Handle a machine check.
  289. *
  290. * Note that on Power 4 and beyond Firmware Non-Maskable Interrupts (fwnmi)
  291. * should be present. If so the handler which called us tells us if the
  292. * error was recovered (never true if RI=0).
  293. *
  294. * On hardware prior to Power 4 these exceptions were asynchronous which
  295. * means we can't tell exactly where it occurred and so we can't recover.
  296. */
  297. int pSeries_machine_check_exception(struct pt_regs *regs)
  298. {
  299. struct rtas_error_log *errp;
  300. if (fwnmi_active) {
  301. errp = fwnmi_get_errinfo(regs);
  302. fwnmi_release_errinfo();
  303. if (errp && recover_mce(regs, errp))
  304. return 1;
  305. }
  306. return 0;
  307. }