cpufreq_32.c 18 KB

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  1. /*
  2. * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
  3. * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * TODO: Need a big cleanup here. Basically, we need to have different
  10. * cpufreq_driver structures for the different type of HW instead of the
  11. * current mess. We also need to better deal with the detection of the
  12. * type of machine.
  13. *
  14. */
  15. #include <linux/config.h>
  16. #include <linux/module.h>
  17. #include <linux/types.h>
  18. #include <linux/errno.h>
  19. #include <linux/kernel.h>
  20. #include <linux/delay.h>
  21. #include <linux/sched.h>
  22. #include <linux/adb.h>
  23. #include <linux/pmu.h>
  24. #include <linux/slab.h>
  25. #include <linux/cpufreq.h>
  26. #include <linux/init.h>
  27. #include <linux/sysdev.h>
  28. #include <linux/i2c.h>
  29. #include <linux/hardirq.h>
  30. #include <asm/prom.h>
  31. #include <asm/machdep.h>
  32. #include <asm/irq.h>
  33. #include <asm/pmac_feature.h>
  34. #include <asm/mmu_context.h>
  35. #include <asm/sections.h>
  36. #include <asm/cputable.h>
  37. #include <asm/time.h>
  38. #include <asm/system.h>
  39. #include <asm/mpic.h>
  40. #include <asm/keylargo.h>
  41. /* WARNING !!! This will cause calibrate_delay() to be called,
  42. * but this is an __init function ! So you MUST go edit
  43. * init/main.c to make it non-init before enabling DEBUG_FREQ
  44. */
  45. #undef DEBUG_FREQ
  46. /*
  47. * There is a problem with the core cpufreq code on SMP kernels,
  48. * it won't recalculate the Bogomips properly
  49. */
  50. #ifdef CONFIG_SMP
  51. #warning "WARNING, CPUFREQ not recommended on SMP kernels"
  52. #endif
  53. extern void low_choose_7447a_dfs(int dfs);
  54. extern void low_choose_750fx_pll(int pll);
  55. extern void low_sleep_handler(void);
  56. /*
  57. * Currently, PowerMac cpufreq supports only high & low frequencies
  58. * that are set by the firmware
  59. */
  60. static unsigned int low_freq;
  61. static unsigned int hi_freq;
  62. static unsigned int cur_freq;
  63. static unsigned int sleep_freq;
  64. /*
  65. * Different models uses different mecanisms to switch the frequency
  66. */
  67. static int (*set_speed_proc)(int low_speed);
  68. static unsigned int (*get_speed_proc)(void);
  69. /*
  70. * Some definitions used by the various speedprocs
  71. */
  72. static u32 voltage_gpio;
  73. static u32 frequency_gpio;
  74. static u32 slew_done_gpio;
  75. static int no_schedule;
  76. static int has_cpu_l2lve;
  77. static int is_pmu_based;
  78. /* There are only two frequency states for each processor. Values
  79. * are in kHz for the time being.
  80. */
  81. #define CPUFREQ_HIGH 0
  82. #define CPUFREQ_LOW 1
  83. static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
  84. {CPUFREQ_HIGH, 0},
  85. {CPUFREQ_LOW, 0},
  86. {0, CPUFREQ_TABLE_END},
  87. };
  88. static struct freq_attr* pmac_cpu_freqs_attr[] = {
  89. &cpufreq_freq_attr_scaling_available_freqs,
  90. NULL,
  91. };
  92. static inline void local_delay(unsigned long ms)
  93. {
  94. if (no_schedule)
  95. mdelay(ms);
  96. else
  97. msleep(ms);
  98. }
  99. #ifdef DEBUG_FREQ
  100. static inline void debug_calc_bogomips(void)
  101. {
  102. /* This will cause a recalc of bogomips and display the
  103. * result. We backup/restore the value to avoid affecting the
  104. * core cpufreq framework's own calculation.
  105. */
  106. extern void calibrate_delay(void);
  107. unsigned long save_lpj = loops_per_jiffy;
  108. calibrate_delay();
  109. loops_per_jiffy = save_lpj;
  110. }
  111. #endif /* DEBUG_FREQ */
  112. /* Switch CPU speed under 750FX CPU control
  113. */
  114. static int cpu_750fx_cpu_speed(int low_speed)
  115. {
  116. u32 hid2;
  117. if (low_speed == 0) {
  118. /* ramping up, set voltage first */
  119. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  120. /* Make sure we sleep for at least 1ms */
  121. local_delay(10);
  122. /* tweak L2 for high voltage */
  123. if (has_cpu_l2lve) {
  124. hid2 = mfspr(SPRN_HID2);
  125. hid2 &= ~0x2000;
  126. mtspr(SPRN_HID2, hid2);
  127. }
  128. }
  129. #ifdef CONFIG_6xx
  130. low_choose_750fx_pll(low_speed);
  131. #endif
  132. if (low_speed == 1) {
  133. /* tweak L2 for low voltage */
  134. if (has_cpu_l2lve) {
  135. hid2 = mfspr(SPRN_HID2);
  136. hid2 |= 0x2000;
  137. mtspr(SPRN_HID2, hid2);
  138. }
  139. /* ramping down, set voltage last */
  140. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  141. local_delay(10);
  142. }
  143. return 0;
  144. }
  145. static unsigned int cpu_750fx_get_cpu_speed(void)
  146. {
  147. if (mfspr(SPRN_HID1) & HID1_PS)
  148. return low_freq;
  149. else
  150. return hi_freq;
  151. }
  152. /* Switch CPU speed using DFS */
  153. static int dfs_set_cpu_speed(int low_speed)
  154. {
  155. if (low_speed == 0) {
  156. /* ramping up, set voltage first */
  157. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  158. /* Make sure we sleep for at least 1ms */
  159. local_delay(1);
  160. }
  161. /* set frequency */
  162. #ifdef CONFIG_6xx
  163. low_choose_7447a_dfs(low_speed);
  164. #endif
  165. udelay(100);
  166. if (low_speed == 1) {
  167. /* ramping down, set voltage last */
  168. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  169. local_delay(1);
  170. }
  171. return 0;
  172. }
  173. static unsigned int dfs_get_cpu_speed(void)
  174. {
  175. if (mfspr(SPRN_HID1) & HID1_DFS)
  176. return low_freq;
  177. else
  178. return hi_freq;
  179. }
  180. /* Switch CPU speed using slewing GPIOs
  181. */
  182. static int gpios_set_cpu_speed(int low_speed)
  183. {
  184. int gpio, timeout = 0;
  185. /* If ramping up, set voltage first */
  186. if (low_speed == 0) {
  187. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  188. /* Delay is way too big but it's ok, we schedule */
  189. local_delay(10);
  190. }
  191. /* Set frequency */
  192. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  193. if (low_speed == ((gpio & 0x01) == 0))
  194. goto skip;
  195. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
  196. low_speed ? 0x04 : 0x05);
  197. udelay(200);
  198. do {
  199. if (++timeout > 100)
  200. break;
  201. local_delay(1);
  202. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
  203. } while((gpio & 0x02) == 0);
  204. skip:
  205. /* If ramping down, set voltage last */
  206. if (low_speed == 1) {
  207. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  208. /* Delay is way too big but it's ok, we schedule */
  209. local_delay(10);
  210. }
  211. #ifdef DEBUG_FREQ
  212. debug_calc_bogomips();
  213. #endif
  214. return 0;
  215. }
  216. /* Switch CPU speed under PMU control
  217. */
  218. static int pmu_set_cpu_speed(int low_speed)
  219. {
  220. struct adb_request req;
  221. unsigned long save_l2cr;
  222. unsigned long save_l3cr;
  223. unsigned int pic_prio;
  224. unsigned long flags;
  225. preempt_disable();
  226. #ifdef DEBUG_FREQ
  227. printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
  228. #endif
  229. pmu_suspend();
  230. /* Disable all interrupt sources on openpic */
  231. pic_prio = mpic_cpu_get_priority();
  232. mpic_cpu_set_priority(0xf);
  233. /* Make sure the decrementer won't interrupt us */
  234. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  235. /* Make sure any pending DEC interrupt occuring while we did
  236. * the above didn't re-enable the DEC */
  237. mb();
  238. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  239. /* We can now disable MSR_EE */
  240. local_irq_save(flags);
  241. /* Giveup the FPU & vec */
  242. enable_kernel_fp();
  243. #ifdef CONFIG_ALTIVEC
  244. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  245. enable_kernel_altivec();
  246. #endif /* CONFIG_ALTIVEC */
  247. /* Save & disable L2 and L3 caches */
  248. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  249. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  250. /* Send the new speed command. My assumption is that this command
  251. * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
  252. */
  253. pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
  254. while (!req.complete)
  255. pmu_poll();
  256. /* Prepare the northbridge for the speed transition */
  257. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
  258. /* Call low level code to backup CPU state and recover from
  259. * hardware reset
  260. */
  261. low_sleep_handler();
  262. /* Restore the northbridge */
  263. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
  264. /* Restore L2 cache */
  265. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  266. _set_L2CR(save_l2cr);
  267. /* Restore L3 cache */
  268. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  269. _set_L3CR(save_l3cr);
  270. /* Restore userland MMU context */
  271. set_context(current->active_mm->context, current->active_mm->pgd);
  272. #ifdef DEBUG_FREQ
  273. printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
  274. #endif
  275. /* Restore low level PMU operations */
  276. pmu_unlock();
  277. /* Restore decrementer */
  278. wakeup_decrementer();
  279. /* Restore interrupts */
  280. mpic_cpu_set_priority(pic_prio);
  281. /* Let interrupts flow again ... */
  282. local_irq_restore(flags);
  283. #ifdef DEBUG_FREQ
  284. debug_calc_bogomips();
  285. #endif
  286. pmu_resume();
  287. preempt_enable();
  288. return 0;
  289. }
  290. static int do_set_cpu_speed(int speed_mode, int notify)
  291. {
  292. struct cpufreq_freqs freqs;
  293. unsigned long l3cr;
  294. static unsigned long prev_l3cr;
  295. freqs.old = cur_freq;
  296. freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  297. freqs.cpu = smp_processor_id();
  298. if (freqs.old == freqs.new)
  299. return 0;
  300. if (notify)
  301. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  302. if (speed_mode == CPUFREQ_LOW &&
  303. cpu_has_feature(CPU_FTR_L3CR)) {
  304. l3cr = _get_L3CR();
  305. if (l3cr & L3CR_L3E) {
  306. prev_l3cr = l3cr;
  307. _set_L3CR(0);
  308. }
  309. }
  310. set_speed_proc(speed_mode == CPUFREQ_LOW);
  311. if (speed_mode == CPUFREQ_HIGH &&
  312. cpu_has_feature(CPU_FTR_L3CR)) {
  313. l3cr = _get_L3CR();
  314. if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
  315. _set_L3CR(prev_l3cr);
  316. }
  317. if (notify)
  318. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  319. cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  320. return 0;
  321. }
  322. static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
  323. {
  324. return cur_freq;
  325. }
  326. static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
  327. {
  328. return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
  329. }
  330. static int pmac_cpufreq_target( struct cpufreq_policy *policy,
  331. unsigned int target_freq,
  332. unsigned int relation)
  333. {
  334. unsigned int newstate = 0;
  335. int rc;
  336. if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
  337. target_freq, relation, &newstate))
  338. return -EINVAL;
  339. rc = do_set_cpu_speed(newstate, 1);
  340. ppc_proc_freq = cur_freq * 1000ul;
  341. return rc;
  342. }
  343. static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
  344. {
  345. if (policy->cpu != 0)
  346. return -ENODEV;
  347. policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
  348. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  349. policy->cur = cur_freq;
  350. cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
  351. return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
  352. }
  353. static u32 read_gpio(struct device_node *np)
  354. {
  355. u32 *reg = (u32 *)get_property(np, "reg", NULL);
  356. u32 offset;
  357. if (reg == NULL)
  358. return 0;
  359. /* That works for all keylargos but shall be fixed properly
  360. * some day... The problem is that it seems we can't rely
  361. * on the "reg" property of the GPIO nodes, they are either
  362. * relative to the base of KeyLargo or to the base of the
  363. * GPIO space, and the device-tree doesn't help.
  364. */
  365. offset = *reg;
  366. if (offset < KEYLARGO_GPIO_LEVELS0)
  367. offset += KEYLARGO_GPIO_LEVELS0;
  368. return offset;
  369. }
  370. static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
  371. {
  372. /* Ok, this could be made a bit smarter, but let's be robust for now. We
  373. * always force a speed change to high speed before sleep, to make sure
  374. * we have appropriate voltage and/or bus speed for the wakeup process,
  375. * and to make sure our loops_per_jiffies are "good enough", that is will
  376. * not cause too short delays if we sleep in low speed and wake in high
  377. * speed..
  378. */
  379. no_schedule = 1;
  380. sleep_freq = cur_freq;
  381. if (cur_freq == low_freq && !is_pmu_based)
  382. do_set_cpu_speed(CPUFREQ_HIGH, 0);
  383. return 0;
  384. }
  385. static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
  386. {
  387. /* If we resume, first check if we have a get() function */
  388. if (get_speed_proc)
  389. cur_freq = get_speed_proc();
  390. else
  391. cur_freq = 0;
  392. /* We don't, hrm... we don't really know our speed here, best
  393. * is that we force a switch to whatever it was, which is
  394. * probably high speed due to our suspend() routine
  395. */
  396. do_set_cpu_speed(sleep_freq == low_freq ?
  397. CPUFREQ_LOW : CPUFREQ_HIGH, 0);
  398. ppc_proc_freq = cur_freq * 1000ul;
  399. no_schedule = 0;
  400. return 0;
  401. }
  402. static struct cpufreq_driver pmac_cpufreq_driver = {
  403. .verify = pmac_cpufreq_verify,
  404. .target = pmac_cpufreq_target,
  405. .get = pmac_cpufreq_get_speed,
  406. .init = pmac_cpufreq_cpu_init,
  407. .suspend = pmac_cpufreq_suspend,
  408. .resume = pmac_cpufreq_resume,
  409. .flags = CPUFREQ_PM_NO_WARN,
  410. .attr = pmac_cpu_freqs_attr,
  411. .name = "powermac",
  412. .owner = THIS_MODULE,
  413. };
  414. static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
  415. {
  416. struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
  417. "voltage-gpio");
  418. struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
  419. "frequency-gpio");
  420. struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
  421. "slewing-done");
  422. u32 *value;
  423. /*
  424. * Check to see if it's GPIO driven or PMU only
  425. *
  426. * The way we extract the GPIO address is slightly hackish, but it
  427. * works well enough for now. We need to abstract the whole GPIO
  428. * stuff sooner or later anyway
  429. */
  430. if (volt_gpio_np)
  431. voltage_gpio = read_gpio(volt_gpio_np);
  432. if (freq_gpio_np)
  433. frequency_gpio = read_gpio(freq_gpio_np);
  434. if (slew_done_gpio_np)
  435. slew_done_gpio = read_gpio(slew_done_gpio_np);
  436. /* If we use the frequency GPIOs, calculate the min/max speeds based
  437. * on the bus frequencies
  438. */
  439. if (frequency_gpio && slew_done_gpio) {
  440. int lenp, rc;
  441. u32 *freqs, *ratio;
  442. freqs = (u32 *)get_property(cpunode, "bus-frequencies", &lenp);
  443. lenp /= sizeof(u32);
  444. if (freqs == NULL || lenp != 2) {
  445. printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
  446. return 1;
  447. }
  448. ratio = (u32 *)get_property(cpunode, "processor-to-bus-ratio*2", NULL);
  449. if (ratio == NULL) {
  450. printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
  451. return 1;
  452. }
  453. /* Get the min/max bus frequencies */
  454. low_freq = min(freqs[0], freqs[1]);
  455. hi_freq = max(freqs[0], freqs[1]);
  456. /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
  457. * frequency, it claims it to be around 84Mhz on some models while
  458. * it appears to be approx. 101Mhz on all. Let's hack around here...
  459. * fortunately, we don't need to be too precise
  460. */
  461. if (low_freq < 98000000)
  462. low_freq = 101000000;
  463. /* Convert those to CPU core clocks */
  464. low_freq = (low_freq * (*ratio)) / 2000;
  465. hi_freq = (hi_freq * (*ratio)) / 2000;
  466. /* Now we get the frequencies, we read the GPIO to see what is out current
  467. * speed
  468. */
  469. rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  470. cur_freq = (rc & 0x01) ? hi_freq : low_freq;
  471. set_speed_proc = gpios_set_cpu_speed;
  472. return 1;
  473. }
  474. /* If we use the PMU, look for the min & max frequencies in the
  475. * device-tree
  476. */
  477. value = (u32 *)get_property(cpunode, "min-clock-frequency", NULL);
  478. if (!value)
  479. return 1;
  480. low_freq = (*value) / 1000;
  481. /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
  482. * here */
  483. if (low_freq < 100000)
  484. low_freq *= 10;
  485. value = (u32 *)get_property(cpunode, "max-clock-frequency", NULL);
  486. if (!value)
  487. return 1;
  488. hi_freq = (*value) / 1000;
  489. set_speed_proc = pmu_set_cpu_speed;
  490. is_pmu_based = 1;
  491. return 0;
  492. }
  493. static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
  494. {
  495. struct device_node *volt_gpio_np;
  496. if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  497. return 1;
  498. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  499. if (volt_gpio_np)
  500. voltage_gpio = read_gpio(volt_gpio_np);
  501. if (!voltage_gpio){
  502. printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
  503. return 1;
  504. }
  505. /* OF only reports the high frequency */
  506. hi_freq = cur_freq;
  507. low_freq = cur_freq/2;
  508. /* Read actual frequency from CPU */
  509. cur_freq = dfs_get_cpu_speed();
  510. set_speed_proc = dfs_set_cpu_speed;
  511. get_speed_proc = dfs_get_cpu_speed;
  512. return 0;
  513. }
  514. static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
  515. {
  516. struct device_node *volt_gpio_np;
  517. u32 pvr, *value;
  518. if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  519. return 1;
  520. hi_freq = cur_freq;
  521. value = (u32 *)get_property(cpunode, "reduced-clock-frequency", NULL);
  522. if (!value)
  523. return 1;
  524. low_freq = (*value) / 1000;
  525. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  526. if (volt_gpio_np)
  527. voltage_gpio = read_gpio(volt_gpio_np);
  528. pvr = mfspr(SPRN_PVR);
  529. has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
  530. set_speed_proc = cpu_750fx_cpu_speed;
  531. get_speed_proc = cpu_750fx_get_cpu_speed;
  532. cur_freq = cpu_750fx_get_cpu_speed();
  533. return 0;
  534. }
  535. /* Currently, we support the following machines:
  536. *
  537. * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
  538. * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
  539. * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
  540. * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
  541. * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
  542. * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
  543. * - Recent MacRISC3 laptops
  544. * - All new machines with 7447A CPUs
  545. */
  546. static int __init pmac_cpufreq_setup(void)
  547. {
  548. struct device_node *cpunode;
  549. u32 *value;
  550. if (strstr(cmd_line, "nocpufreq"))
  551. return 0;
  552. /* Assume only one CPU */
  553. cpunode = find_type_devices("cpu");
  554. if (!cpunode)
  555. goto out;
  556. /* Get current cpu clock freq */
  557. value = (u32 *)get_property(cpunode, "clock-frequency", NULL);
  558. if (!value)
  559. goto out;
  560. cur_freq = (*value) / 1000;
  561. /* Check for 7447A based MacRISC3 */
  562. if (machine_is_compatible("MacRISC3") &&
  563. get_property(cpunode, "dynamic-power-step", NULL) &&
  564. PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
  565. pmac_cpufreq_init_7447A(cpunode);
  566. /* Check for other MacRISC3 machines */
  567. } else if (machine_is_compatible("PowerBook3,4") ||
  568. machine_is_compatible("PowerBook3,5") ||
  569. machine_is_compatible("MacRISC3")) {
  570. pmac_cpufreq_init_MacRISC3(cpunode);
  571. /* Else check for iBook2 500/600 */
  572. } else if (machine_is_compatible("PowerBook4,1")) {
  573. hi_freq = cur_freq;
  574. low_freq = 400000;
  575. set_speed_proc = pmu_set_cpu_speed;
  576. is_pmu_based = 1;
  577. }
  578. /* Else check for TiPb 550 */
  579. else if (machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
  580. hi_freq = cur_freq;
  581. low_freq = 500000;
  582. set_speed_proc = pmu_set_cpu_speed;
  583. is_pmu_based = 1;
  584. }
  585. /* Else check for TiPb 400 & 500 */
  586. else if (machine_is_compatible("PowerBook3,2")) {
  587. /* We only know about the 400 MHz and the 500Mhz model
  588. * they both have 300 MHz as low frequency
  589. */
  590. if (cur_freq < 350000 || cur_freq > 550000)
  591. goto out;
  592. hi_freq = cur_freq;
  593. low_freq = 300000;
  594. set_speed_proc = pmu_set_cpu_speed;
  595. is_pmu_based = 1;
  596. }
  597. /* Else check for 750FX */
  598. else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
  599. pmac_cpufreq_init_750FX(cpunode);
  600. out:
  601. if (set_speed_proc == NULL)
  602. return -ENODEV;
  603. pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
  604. pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
  605. ppc_proc_freq = cur_freq * 1000ul;
  606. printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
  607. printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
  608. low_freq/1000, hi_freq/1000, cur_freq/1000);
  609. return cpufreq_register_driver(&pmac_cpufreq_driver);
  610. }
  611. module_init(pmac_cpufreq_setup);