prom_parse.c 13 KB

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  1. #undef DEBUG
  2. #include <linux/kernel.h>
  3. #include <linux/string.h>
  4. #include <linux/pci_regs.h>
  5. #include <linux/module.h>
  6. #include <linux/ioport.h>
  7. #include <asm/prom.h>
  8. #include <asm/pci-bridge.h>
  9. #ifdef DEBUG
  10. #define DBG(fmt...) do { printk(fmt); } while(0)
  11. #else
  12. #define DBG(fmt...) do { } while(0)
  13. #endif
  14. #ifdef CONFIG_PPC64
  15. #define PRu64 "%lx"
  16. #else
  17. #define PRu64 "%llx"
  18. #endif
  19. /* Max address size we deal with */
  20. #define OF_MAX_ADDR_CELLS 4
  21. #define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \
  22. (ns) > 0)
  23. /* Debug utility */
  24. #ifdef DEBUG
  25. static void of_dump_addr(const char *s, u32 *addr, int na)
  26. {
  27. printk("%s", s);
  28. while(na--)
  29. printk(" %08x", *(addr++));
  30. printk("\n");
  31. }
  32. #else
  33. static void of_dump_addr(const char *s, u32 *addr, int na) { }
  34. #endif
  35. /* Read a big address */
  36. static inline u64 of_read_addr(u32 *cell, int size)
  37. {
  38. u64 r = 0;
  39. while (size--)
  40. r = (r << 32) | *(cell++);
  41. return r;
  42. }
  43. /* Callbacks for bus specific translators */
  44. struct of_bus {
  45. const char *name;
  46. const char *addresses;
  47. int (*match)(struct device_node *parent);
  48. void (*count_cells)(struct device_node *child,
  49. int *addrc, int *sizec);
  50. u64 (*map)(u32 *addr, u32 *range, int na, int ns, int pna);
  51. int (*translate)(u32 *addr, u64 offset, int na);
  52. unsigned int (*get_flags)(u32 *addr);
  53. };
  54. /*
  55. * Default translator (generic bus)
  56. */
  57. static void of_bus_default_count_cells(struct device_node *dev,
  58. int *addrc, int *sizec)
  59. {
  60. if (addrc)
  61. *addrc = prom_n_addr_cells(dev);
  62. if (sizec)
  63. *sizec = prom_n_size_cells(dev);
  64. }
  65. static u64 of_bus_default_map(u32 *addr, u32 *range, int na, int ns, int pna)
  66. {
  67. u64 cp, s, da;
  68. cp = of_read_addr(range, na);
  69. s = of_read_addr(range + na + pna, ns);
  70. da = of_read_addr(addr, na);
  71. DBG("OF: default map, cp="PRu64", s="PRu64", da="PRu64"\n",
  72. cp, s, da);
  73. if (da < cp || da >= (cp + s))
  74. return OF_BAD_ADDR;
  75. return da - cp;
  76. }
  77. static int of_bus_default_translate(u32 *addr, u64 offset, int na)
  78. {
  79. u64 a = of_read_addr(addr, na);
  80. memset(addr, 0, na * 4);
  81. a += offset;
  82. if (na > 1)
  83. addr[na - 2] = a >> 32;
  84. addr[na - 1] = a & 0xffffffffu;
  85. return 0;
  86. }
  87. static unsigned int of_bus_default_get_flags(u32 *addr)
  88. {
  89. return IORESOURCE_MEM;
  90. }
  91. /*
  92. * PCI bus specific translator
  93. */
  94. static int of_bus_pci_match(struct device_node *np)
  95. {
  96. /* "vci" is for the /chaos bridge on 1st-gen PCI powermacs */
  97. return !strcmp(np->type, "pci") || !strcmp(np->type, "vci");
  98. }
  99. static void of_bus_pci_count_cells(struct device_node *np,
  100. int *addrc, int *sizec)
  101. {
  102. if (addrc)
  103. *addrc = 3;
  104. if (sizec)
  105. *sizec = 2;
  106. }
  107. static u64 of_bus_pci_map(u32 *addr, u32 *range, int na, int ns, int pna)
  108. {
  109. u64 cp, s, da;
  110. /* Check address type match */
  111. if ((addr[0] ^ range[0]) & 0x03000000)
  112. return OF_BAD_ADDR;
  113. /* Read address values, skipping high cell */
  114. cp = of_read_addr(range + 1, na - 1);
  115. s = of_read_addr(range + na + pna, ns);
  116. da = of_read_addr(addr + 1, na - 1);
  117. DBG("OF: PCI map, cp="PRu64", s="PRu64", da="PRu64"\n", cp, s, da);
  118. if (da < cp || da >= (cp + s))
  119. return OF_BAD_ADDR;
  120. return da - cp;
  121. }
  122. static int of_bus_pci_translate(u32 *addr, u64 offset, int na)
  123. {
  124. return of_bus_default_translate(addr + 1, offset, na - 1);
  125. }
  126. static unsigned int of_bus_pci_get_flags(u32 *addr)
  127. {
  128. unsigned int flags = 0;
  129. u32 w = addr[0];
  130. switch((w >> 24) & 0x03) {
  131. case 0x01:
  132. flags |= IORESOURCE_IO;
  133. case 0x02: /* 32 bits */
  134. case 0x03: /* 64 bits */
  135. flags |= IORESOURCE_MEM;
  136. }
  137. if (w & 0x40000000)
  138. flags |= IORESOURCE_PREFETCH;
  139. return flags;
  140. }
  141. /*
  142. * ISA bus specific translator
  143. */
  144. static int of_bus_isa_match(struct device_node *np)
  145. {
  146. return !strcmp(np->name, "isa");
  147. }
  148. static void of_bus_isa_count_cells(struct device_node *child,
  149. int *addrc, int *sizec)
  150. {
  151. if (addrc)
  152. *addrc = 2;
  153. if (sizec)
  154. *sizec = 1;
  155. }
  156. static u64 of_bus_isa_map(u32 *addr, u32 *range, int na, int ns, int pna)
  157. {
  158. u64 cp, s, da;
  159. /* Check address type match */
  160. if ((addr[0] ^ range[0]) & 0x00000001)
  161. return OF_BAD_ADDR;
  162. /* Read address values, skipping high cell */
  163. cp = of_read_addr(range + 1, na - 1);
  164. s = of_read_addr(range + na + pna, ns);
  165. da = of_read_addr(addr + 1, na - 1);
  166. DBG("OF: ISA map, cp="PRu64", s="PRu64", da="PRu64"\n", cp, s, da);
  167. if (da < cp || da >= (cp + s))
  168. return OF_BAD_ADDR;
  169. return da - cp;
  170. }
  171. static int of_bus_isa_translate(u32 *addr, u64 offset, int na)
  172. {
  173. return of_bus_default_translate(addr + 1, offset, na - 1);
  174. }
  175. static unsigned int of_bus_isa_get_flags(u32 *addr)
  176. {
  177. unsigned int flags = 0;
  178. u32 w = addr[0];
  179. if (w & 1)
  180. flags |= IORESOURCE_IO;
  181. else
  182. flags |= IORESOURCE_MEM;
  183. return flags;
  184. }
  185. /*
  186. * Array of bus specific translators
  187. */
  188. static struct of_bus of_busses[] = {
  189. /* PCI */
  190. {
  191. .name = "pci",
  192. .addresses = "assigned-addresses",
  193. .match = of_bus_pci_match,
  194. .count_cells = of_bus_pci_count_cells,
  195. .map = of_bus_pci_map,
  196. .translate = of_bus_pci_translate,
  197. .get_flags = of_bus_pci_get_flags,
  198. },
  199. /* ISA */
  200. {
  201. .name = "isa",
  202. .addresses = "reg",
  203. .match = of_bus_isa_match,
  204. .count_cells = of_bus_isa_count_cells,
  205. .map = of_bus_isa_map,
  206. .translate = of_bus_isa_translate,
  207. .get_flags = of_bus_isa_get_flags,
  208. },
  209. /* Default */
  210. {
  211. .name = "default",
  212. .addresses = "reg",
  213. .match = NULL,
  214. .count_cells = of_bus_default_count_cells,
  215. .map = of_bus_default_map,
  216. .translate = of_bus_default_translate,
  217. .get_flags = of_bus_default_get_flags,
  218. },
  219. };
  220. static struct of_bus *of_match_bus(struct device_node *np)
  221. {
  222. int i;
  223. for (i = 0; i < ARRAY_SIZE(of_busses); i ++)
  224. if (!of_busses[i].match || of_busses[i].match(np))
  225. return &of_busses[i];
  226. BUG();
  227. return NULL;
  228. }
  229. static int of_translate_one(struct device_node *parent, struct of_bus *bus,
  230. struct of_bus *pbus, u32 *addr,
  231. int na, int ns, int pna)
  232. {
  233. u32 *ranges;
  234. unsigned int rlen;
  235. int rone;
  236. u64 offset = OF_BAD_ADDR;
  237. /* Normally, an absence of a "ranges" property means we are
  238. * crossing a non-translatable boundary, and thus the addresses
  239. * below the current not cannot be converted to CPU physical ones.
  240. * Unfortunately, while this is very clear in the spec, it's not
  241. * what Apple understood, and they do have things like /uni-n or
  242. * /ht nodes with no "ranges" property and a lot of perfectly
  243. * useable mapped devices below them. Thus we treat the absence of
  244. * "ranges" as equivalent to an empty "ranges" property which means
  245. * a 1:1 translation at that level. It's up to the caller not to try
  246. * to translate addresses that aren't supposed to be translated in
  247. * the first place. --BenH.
  248. */
  249. ranges = (u32 *)get_property(parent, "ranges", &rlen);
  250. if (ranges == NULL || rlen == 0) {
  251. offset = of_read_addr(addr, na);
  252. memset(addr, 0, pna * 4);
  253. DBG("OF: no ranges, 1:1 translation\n");
  254. goto finish;
  255. }
  256. DBG("OF: walking ranges...\n");
  257. /* Now walk through the ranges */
  258. rlen /= 4;
  259. rone = na + pna + ns;
  260. for (; rlen >= rone; rlen -= rone, ranges += rone) {
  261. offset = bus->map(addr, ranges, na, ns, pna);
  262. if (offset != OF_BAD_ADDR)
  263. break;
  264. }
  265. if (offset == OF_BAD_ADDR) {
  266. DBG("OF: not found !\n");
  267. return 1;
  268. }
  269. memcpy(addr, ranges + na, 4 * pna);
  270. finish:
  271. of_dump_addr("OF: parent translation for:", addr, pna);
  272. DBG("OF: with offset: "PRu64"\n", offset);
  273. /* Translate it into parent bus space */
  274. return pbus->translate(addr, offset, pna);
  275. }
  276. /*
  277. * Translate an address from the device-tree into a CPU physical address,
  278. * this walks up the tree and applies the various bus mappings on the
  279. * way.
  280. *
  281. * Note: We consider that crossing any level with #size-cells == 0 to mean
  282. * that translation is impossible (that is we are not dealing with a value
  283. * that can be mapped to a cpu physical address). This is not really specified
  284. * that way, but this is traditionally the way IBM at least do things
  285. */
  286. u64 of_translate_address(struct device_node *dev, u32 *in_addr)
  287. {
  288. struct device_node *parent = NULL;
  289. struct of_bus *bus, *pbus;
  290. u32 addr[OF_MAX_ADDR_CELLS];
  291. int na, ns, pna, pns;
  292. u64 result = OF_BAD_ADDR;
  293. DBG("OF: ** translation for device %s **\n", dev->full_name);
  294. /* Increase refcount at current level */
  295. of_node_get(dev);
  296. /* Get parent & match bus type */
  297. parent = of_get_parent(dev);
  298. if (parent == NULL)
  299. goto bail;
  300. bus = of_match_bus(parent);
  301. /* Cound address cells & copy address locally */
  302. bus->count_cells(dev, &na, &ns);
  303. if (!OF_CHECK_COUNTS(na, ns)) {
  304. printk(KERN_ERR "prom_parse: Bad cell count for %s\n",
  305. dev->full_name);
  306. goto bail;
  307. }
  308. memcpy(addr, in_addr, na * 4);
  309. DBG("OF: bus is %s (na=%d, ns=%d) on %s\n",
  310. bus->name, na, ns, parent->full_name);
  311. of_dump_addr("OF: translating address:", addr, na);
  312. /* Translate */
  313. for (;;) {
  314. /* Switch to parent bus */
  315. of_node_put(dev);
  316. dev = parent;
  317. parent = of_get_parent(dev);
  318. /* If root, we have finished */
  319. if (parent == NULL) {
  320. DBG("OF: reached root node\n");
  321. result = of_read_addr(addr, na);
  322. break;
  323. }
  324. /* Get new parent bus and counts */
  325. pbus = of_match_bus(parent);
  326. pbus->count_cells(dev, &pna, &pns);
  327. if (!OF_CHECK_COUNTS(pna, pns)) {
  328. printk(KERN_ERR "prom_parse: Bad cell count for %s\n",
  329. dev->full_name);
  330. break;
  331. }
  332. DBG("OF: parent bus is %s (na=%d, ns=%d) on %s\n",
  333. pbus->name, pna, pns, parent->full_name);
  334. /* Apply bus translation */
  335. if (of_translate_one(dev, bus, pbus, addr, na, ns, pna))
  336. break;
  337. /* Complete the move up one level */
  338. na = pna;
  339. ns = pns;
  340. bus = pbus;
  341. of_dump_addr("OF: one level translation:", addr, na);
  342. }
  343. bail:
  344. of_node_put(parent);
  345. of_node_put(dev);
  346. return result;
  347. }
  348. EXPORT_SYMBOL(of_translate_address);
  349. u32 *of_get_address(struct device_node *dev, int index, u64 *size,
  350. unsigned int *flags)
  351. {
  352. u32 *prop;
  353. unsigned int psize;
  354. struct device_node *parent;
  355. struct of_bus *bus;
  356. int onesize, i, na, ns;
  357. /* Get parent & match bus type */
  358. parent = of_get_parent(dev);
  359. if (parent == NULL)
  360. return NULL;
  361. bus = of_match_bus(parent);
  362. bus->count_cells(dev, &na, &ns);
  363. of_node_put(parent);
  364. if (!OF_CHECK_COUNTS(na, ns))
  365. return NULL;
  366. /* Get "reg" or "assigned-addresses" property */
  367. prop = (u32 *)get_property(dev, bus->addresses, &psize);
  368. if (prop == NULL)
  369. return NULL;
  370. psize /= 4;
  371. onesize = na + ns;
  372. for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
  373. if (i == index) {
  374. if (size)
  375. *size = of_read_addr(prop + na, ns);
  376. if (flags)
  377. *flags = bus->get_flags(prop);
  378. return prop;
  379. }
  380. return NULL;
  381. }
  382. EXPORT_SYMBOL(of_get_address);
  383. u32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
  384. unsigned int *flags)
  385. {
  386. u32 *prop;
  387. unsigned int psize;
  388. struct device_node *parent;
  389. struct of_bus *bus;
  390. int onesize, i, na, ns;
  391. /* Get parent & match bus type */
  392. parent = of_get_parent(dev);
  393. if (parent == NULL)
  394. return NULL;
  395. bus = of_match_bus(parent);
  396. if (strcmp(bus->name, "pci")) {
  397. of_node_put(parent);
  398. return NULL;
  399. }
  400. bus->count_cells(dev, &na, &ns);
  401. of_node_put(parent);
  402. if (!OF_CHECK_COUNTS(na, ns))
  403. return NULL;
  404. /* Get "reg" or "assigned-addresses" property */
  405. prop = (u32 *)get_property(dev, bus->addresses, &psize);
  406. if (prop == NULL)
  407. return NULL;
  408. psize /= 4;
  409. onesize = na + ns;
  410. for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
  411. if ((prop[0] & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) {
  412. if (size)
  413. *size = of_read_addr(prop + na, ns);
  414. if (flags)
  415. *flags = bus->get_flags(prop);
  416. return prop;
  417. }
  418. return NULL;
  419. }
  420. EXPORT_SYMBOL(of_get_pci_address);
  421. static int __of_address_to_resource(struct device_node *dev, u32 *addrp,
  422. u64 size, unsigned int flags,
  423. struct resource *r)
  424. {
  425. u64 taddr;
  426. if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
  427. return -EINVAL;
  428. taddr = of_translate_address(dev, addrp);
  429. if (taddr == OF_BAD_ADDR)
  430. return -EINVAL;
  431. memset(r, 0, sizeof(struct resource));
  432. if (flags & IORESOURCE_IO) {
  433. unsigned long port;
  434. port = pci_address_to_pio(taddr);
  435. if (port == (unsigned long)-1)
  436. return -EINVAL;
  437. r->start = port;
  438. r->end = port + size - 1;
  439. } else {
  440. r->start = taddr;
  441. r->end = taddr + size - 1;
  442. }
  443. r->flags = flags;
  444. r->name = dev->name;
  445. return 0;
  446. }
  447. int of_address_to_resource(struct device_node *dev, int index,
  448. struct resource *r)
  449. {
  450. u32 *addrp;
  451. u64 size;
  452. unsigned int flags;
  453. addrp = of_get_address(dev, index, &size, &flags);
  454. if (addrp == NULL)
  455. return -EINVAL;
  456. return __of_address_to_resource(dev, addrp, size, flags, r);
  457. }
  458. EXPORT_SYMBOL_GPL(of_address_to_resource);
  459. int of_pci_address_to_resource(struct device_node *dev, int bar,
  460. struct resource *r)
  461. {
  462. u32 *addrp;
  463. u64 size;
  464. unsigned int flags;
  465. addrp = of_get_pci_address(dev, bar, &size, &flags);
  466. if (addrp == NULL)
  467. return -EINVAL;
  468. return __of_address_to_resource(dev, addrp, size, flags, r);
  469. }
  470. EXPORT_SYMBOL_GPL(of_pci_address_to_resource);