setup.c 4.7 KB

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  1. /*
  2. * Setup pointers to hardware dependent routines.
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
  9. * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
  10. *
  11. */
  12. #include <linux/config.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/pci.h>
  15. #include <linux/init.h>
  16. #include <linux/pm.h>
  17. #include <linux/serial.h>
  18. #include <linux/serial_core.h>
  19. #include <asm/bootinfo.h>
  20. #include <asm/time.h>
  21. #include <asm/io.h>
  22. #include <asm/irq.h>
  23. #include <asm/processor.h>
  24. #include <asm/reboot.h>
  25. #include <asm/gt64120.h>
  26. #include <asm/serial.h>
  27. #include <asm/mach-cobalt/cobalt.h>
  28. extern void cobalt_machine_restart(char *command);
  29. extern void cobalt_machine_halt(void);
  30. extern void cobalt_machine_power_off(void);
  31. extern void cobalt_early_console(void);
  32. int cobalt_board_id;
  33. const char *get_system_type(void)
  34. {
  35. switch (cobalt_board_id) {
  36. case COBALT_BRD_ID_QUBE1:
  37. return "Cobalt Qube";
  38. case COBALT_BRD_ID_RAQ1:
  39. return "Cobalt RaQ";
  40. case COBALT_BRD_ID_QUBE2:
  41. return "Cobalt Qube2";
  42. case COBALT_BRD_ID_RAQ2:
  43. return "Cobalt RaQ2";
  44. }
  45. return "MIPS Cobalt";
  46. }
  47. static void __init cobalt_timer_setup(struct irqaction *irq)
  48. {
  49. /* Load timer value for 1KHz (TCLK is 50MHz) */
  50. GALILEO_OUTL(50*1000*1000 / 1000, GT_TC0_OFS);
  51. /* Enable timer */
  52. GALILEO_OUTL(GALILEO_ENTC0 | GALILEO_SELTC0, GT_TC_CONTROL_OFS);
  53. /* Register interrupt */
  54. setup_irq(COBALT_GALILEO_IRQ, irq);
  55. /* Enable interrupt */
  56. GALILEO_OUTL(GALILEO_INTR_T0EXP | GALILEO_INL(GT_INTRMASK_OFS), GT_INTRMASK_OFS);
  57. }
  58. extern struct pci_ops gt64111_pci_ops;
  59. static struct resource cobalt_mem_resource = {
  60. "PCI memory", GT64111_MEM_BASE, GT64111_MEM_END, IORESOURCE_MEM
  61. };
  62. static struct resource cobalt_io_resource = {
  63. "PCI I/O", 0x1000, 0xffff, IORESOURCE_IO
  64. };
  65. static struct resource cobalt_io_resources[] = {
  66. { "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
  67. { "timer", 0x40, 0x5f, IORESOURCE_BUSY },
  68. { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY },
  69. { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY },
  70. { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
  71. };
  72. #define COBALT_IO_RESOURCES (sizeof(cobalt_io_resources)/sizeof(struct resource))
  73. static struct pci_controller cobalt_pci_controller = {
  74. .pci_ops = &gt64111_pci_ops,
  75. .mem_resource = &cobalt_mem_resource,
  76. .mem_offset = 0,
  77. .io_resource = &cobalt_io_resource,
  78. .io_offset = 0 - GT64111_IO_BASE
  79. };
  80. void __init plat_setup(void)
  81. {
  82. static struct uart_port uart;
  83. unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
  84. int i;
  85. _machine_restart = cobalt_machine_restart;
  86. _machine_halt = cobalt_machine_halt;
  87. pm_power_off = cobalt_machine_power_off;
  88. board_timer_setup = cobalt_timer_setup;
  89. set_io_port_base(CKSEG1ADDR(GT64111_IO_BASE));
  90. /* I/O port resource must include UART and LCD/buttons */
  91. ioport_resource.end = 0x0fffffff;
  92. /* request I/O space for devices used on all i[345]86 PCs */
  93. for (i = 0; i < COBALT_IO_RESOURCES; i++)
  94. request_resource(&ioport_resource, cobalt_io_resources + i);
  95. /* Read the cobalt id register out of the PCI config space */
  96. PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3));
  97. cobalt_board_id = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
  98. cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8);
  99. cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);
  100. printk("Cobalt board ID: %d\n", cobalt_board_id);
  101. #ifdef CONFIG_PCI
  102. register_pci_controller(&cobalt_pci_controller);
  103. #endif
  104. #ifdef CONFIG_SERIAL_8250
  105. if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
  106. #ifdef CONFIG_EARLY_PRINTK
  107. cobalt_early_console();
  108. #endif
  109. uart.line = 0;
  110. uart.type = PORT_UNKNOWN;
  111. uart.uartclk = 18432000;
  112. uart.irq = COBALT_SERIAL_IRQ;
  113. uart.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
  114. uart.iobase = 0xc800000;
  115. uart.iotype = UPIO_PORT;
  116. early_serial_setup(&uart);
  117. }
  118. #endif
  119. }
  120. /*
  121. * Prom init. We read our one and only communication with the firmware.
  122. * Grab the amount of installed memory.
  123. * Better boot loaders (CoLo) pass a command line too :-)
  124. */
  125. void __init prom_init(void)
  126. {
  127. int narg, indx, posn, nchr;
  128. unsigned long memsz;
  129. char **argv;
  130. mips_machgroup = MACH_GROUP_COBALT;
  131. memsz = fw_arg0 & 0x7fff0000;
  132. narg = fw_arg0 & 0x0000ffff;
  133. if (narg) {
  134. arcs_cmdline[0] = '\0';
  135. argv = (char **) fw_arg1;
  136. posn = 0;
  137. for (indx = 1; indx < narg; ++indx) {
  138. nchr = strlen(argv[indx]);
  139. if (posn + 1 + nchr + 1 > sizeof(arcs_cmdline))
  140. break;
  141. if (posn)
  142. arcs_cmdline[posn++] = ' ';
  143. strcpy(arcs_cmdline + posn, argv[indx]);
  144. posn += nchr;
  145. }
  146. }
  147. add_memory_region(0x0, memsz, BOOT_MEM_RAM);
  148. }
  149. unsigned long __init prom_free_prom_memory(void)
  150. {
  151. /* Nothing to do! */
  152. return 0;
  153. }