q40ints.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476
  1. /*
  2. * arch/m68k/q40/q40ints.c
  3. *
  4. * Copyright (C) 1999,2001 Richard Zidlicky
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file COPYING in the main directory of this archive
  8. * for more details.
  9. *
  10. * .. used to be loosely based on bvme6000ints.c
  11. *
  12. */
  13. #include <linux/types.h>
  14. #include <linux/kernel.h>
  15. #include <linux/errno.h>
  16. #include <linux/string.h>
  17. #include <linux/sched.h>
  18. #include <linux/seq_file.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/hardirq.h>
  21. #include <asm/rtc.h>
  22. #include <asm/ptrace.h>
  23. #include <asm/system.h>
  24. #include <asm/irq.h>
  25. #include <asm/traps.h>
  26. #include <asm/q40_master.h>
  27. #include <asm/q40ints.h>
  28. /*
  29. * Q40 IRQs are defined as follows:
  30. * 3,4,5,6,7,10,11,14,15 : ISA dev IRQs
  31. * 16-31: reserved
  32. * 32 : keyboard int
  33. * 33 : frame int (50/200 Hz periodic timer)
  34. * 34 : sample int (10/20 KHz periodic timer)
  35. *
  36. */
  37. extern int ints_inited;
  38. irqreturn_t q40_irq2_handler (int, void *, struct pt_regs *fp);
  39. static irqreturn_t q40_defhand (int irq, void *dev_id, struct pt_regs *fp);
  40. static irqreturn_t default_handler(int lev, void *dev_id, struct pt_regs *regs);
  41. #define DEVNAME_SIZE 24
  42. static struct q40_irq_node {
  43. irqreturn_t (*handler)(int, void *, struct pt_regs *);
  44. unsigned long flags;
  45. void *dev_id;
  46. /* struct q40_irq_node *next;*/
  47. char devname[DEVNAME_SIZE];
  48. unsigned count;
  49. unsigned short state;
  50. } irq_tab[Q40_IRQ_MAX+1];
  51. short unsigned q40_ablecount[Q40_IRQ_MAX+1];
  52. /*
  53. * void q40_init_IRQ (void)
  54. *
  55. * Parameters: None
  56. *
  57. * Returns: Nothing
  58. *
  59. * This function is called during kernel startup to initialize
  60. * the q40 IRQ handling routines.
  61. */
  62. static int disabled=0;
  63. void q40_init_IRQ (void)
  64. {
  65. int i;
  66. disabled=0;
  67. for (i = 0; i <= Q40_IRQ_MAX; i++) {
  68. irq_tab[i].handler = q40_defhand;
  69. irq_tab[i].flags = 0;
  70. irq_tab[i].dev_id = NULL;
  71. /* irq_tab[i].next = NULL;*/
  72. irq_tab[i].devname[0] = 0;
  73. irq_tab[i].count = 0;
  74. irq_tab[i].state =0;
  75. q40_ablecount[i]=0; /* all enabled */
  76. }
  77. /* setup handler for ISA ints */
  78. cpu_request_irq(IRQ2, q40_irq2_handler, 0, "q40 ISA and master chip",
  79. NULL);
  80. /* now enable some ints.. */
  81. master_outb(1,EXT_ENABLE_REG); /* ISA IRQ 5-15 */
  82. /* make sure keyboard IRQ is disabled */
  83. master_outb(0,KEY_IRQ_ENABLE_REG);
  84. }
  85. int q40_request_irq(unsigned int irq,
  86. irqreturn_t (*handler)(int, void *, struct pt_regs *),
  87. unsigned long flags, const char *devname, void *dev_id)
  88. {
  89. /*printk("q40_request_irq %d, %s\n",irq,devname);*/
  90. if (irq > Q40_IRQ_MAX || (irq>15 && irq<32)) {
  91. printk("%s: Incorrect IRQ %d from %s\n", __FUNCTION__, irq, devname);
  92. return -ENXIO;
  93. }
  94. /* test for ISA ints not implemented by HW */
  95. switch (irq)
  96. {
  97. case 1: case 2: case 8: case 9:
  98. case 12: case 13:
  99. printk("%s: ISA IRQ %d from %s not implemented by HW\n", __FUNCTION__, irq, devname);
  100. return -ENXIO;
  101. case 11:
  102. printk("warning IRQ 10 and 11 not distinguishable\n");
  103. irq=10;
  104. default:
  105. ;
  106. }
  107. if (irq<Q40_IRQ_SAMPLE)
  108. {
  109. if (irq_tab[irq].dev_id != NULL)
  110. {
  111. printk("%s: IRQ %d from %s is not replaceable\n",
  112. __FUNCTION__, irq, irq_tab[irq].devname);
  113. return -EBUSY;
  114. }
  115. /*printk("IRQ %d set to handler %p\n",irq,handler);*/
  116. if (dev_id==NULL)
  117. {
  118. printk("WARNING: dev_id == NULL in request_irq\n");
  119. dev_id=(void*)1;
  120. }
  121. irq_tab[irq].handler = handler;
  122. irq_tab[irq].flags = flags;
  123. irq_tab[irq].dev_id = dev_id;
  124. strlcpy(irq_tab[irq].devname,devname,sizeof(irq_tab[irq].devname));
  125. irq_tab[irq].state = 0;
  126. return 0;
  127. }
  128. else {
  129. /* Q40_IRQ_SAMPLE :somewhat special actions required here ..*/
  130. cpu_request_irq(4, handler, flags, devname, dev_id);
  131. cpu_request_irq(6, handler, flags, devname, dev_id);
  132. return 0;
  133. }
  134. }
  135. void q40_free_irq(unsigned int irq, void *dev_id)
  136. {
  137. if (irq > Q40_IRQ_MAX || (irq>15 && irq<32)) {
  138. printk("%s: Incorrect IRQ %d, dev_id %x \n", __FUNCTION__, irq, (unsigned)dev_id);
  139. return;
  140. }
  141. /* test for ISA ints not implemented by HW */
  142. switch (irq)
  143. {
  144. case 1: case 2: case 8: case 9:
  145. case 12: case 13:
  146. printk("%s: ISA IRQ %d from %x invalid\n", __FUNCTION__, irq, (unsigned)dev_id);
  147. return;
  148. case 11: irq=10;
  149. default:
  150. ;
  151. }
  152. if (irq<Q40_IRQ_SAMPLE)
  153. {
  154. if (irq_tab[irq].dev_id != dev_id)
  155. printk("%s: Removing probably wrong IRQ %d from %s\n",
  156. __FUNCTION__, irq, irq_tab[irq].devname);
  157. irq_tab[irq].handler = q40_defhand;
  158. irq_tab[irq].flags = 0;
  159. irq_tab[irq].dev_id = NULL;
  160. /* irq_tab[irq].devname = NULL; */
  161. /* do not reset state !! */
  162. }
  163. else
  164. { /* == Q40_IRQ_SAMPLE */
  165. cpu_free_irq(4, dev_id);
  166. cpu_free_irq(6, dev_id);
  167. }
  168. }
  169. irqreturn_t q40_process_int (int level, struct pt_regs *fp)
  170. {
  171. printk("unexpected interrupt vec=%x, pc=%lx, d0=%lx, d0_orig=%lx, d1=%lx, d2=%lx\n",
  172. level, fp->pc, fp->d0, fp->orig_d0, fp->d1, fp->d2);
  173. printk("\tIIRQ_REG = %x, EIRQ_REG = %x\n",master_inb(IIRQ_REG),master_inb(EIRQ_REG));
  174. return IRQ_HANDLED;
  175. }
  176. /*
  177. * this stuff doesn't really belong here..
  178. */
  179. int ql_ticks; /* 200Hz ticks since last jiffie */
  180. static int sound_ticks;
  181. #define SVOL 45
  182. void q40_mksound(unsigned int hz, unsigned int ticks)
  183. {
  184. /* for now ignore hz, except that hz==0 switches off sound */
  185. /* simply alternate the ampl (128-SVOL)-(128+SVOL)-..-.. at 200Hz */
  186. if (hz==0)
  187. {
  188. if (sound_ticks)
  189. sound_ticks=1;
  190. *DAC_LEFT=128;
  191. *DAC_RIGHT=128;
  192. return;
  193. }
  194. /* sound itself is done in q40_timer_int */
  195. if (sound_ticks == 0) sound_ticks=1000; /* pretty long beep */
  196. sound_ticks=ticks<<1;
  197. }
  198. static irqreturn_t (*q40_timer_routine)(int, void *, struct pt_regs *);
  199. static irqreturn_t q40_timer_int (int irq, void * dev, struct pt_regs * regs)
  200. {
  201. ql_ticks = ql_ticks ? 0 : 1;
  202. if (sound_ticks)
  203. {
  204. unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL;
  205. sound_ticks--;
  206. *DAC_LEFT=sval;
  207. *DAC_RIGHT=sval;
  208. }
  209. if (!ql_ticks)
  210. q40_timer_routine(irq, dev, regs);
  211. return IRQ_HANDLED;
  212. }
  213. void q40_sched_init (irqreturn_t (*timer_routine)(int, void *, struct pt_regs *))
  214. {
  215. int timer_irq;
  216. q40_timer_routine = timer_routine;
  217. timer_irq=Q40_IRQ_FRAME;
  218. if (request_irq(timer_irq, q40_timer_int, 0,
  219. "timer", q40_timer_int))
  220. panic ("Couldn't register timer int");
  221. master_outb(-1,FRAME_CLEAR_REG);
  222. master_outb( 1,FRAME_RATE_REG);
  223. }
  224. /*
  225. * tables to translate bits into IRQ numbers
  226. * it is a good idea to order the entries by priority
  227. *
  228. */
  229. struct IRQ_TABLE{ unsigned mask; int irq ;};
  230. #if 0
  231. static struct IRQ_TABLE iirqs[]={
  232. {Q40_IRQ_FRAME_MASK,Q40_IRQ_FRAME},
  233. {Q40_IRQ_KEYB_MASK,Q40_IRQ_KEYBOARD},
  234. {0,0}};
  235. #endif
  236. static struct IRQ_TABLE eirqs[] = {
  237. { .mask = Q40_IRQ3_MASK, .irq = 3 }, /* ser 1 */
  238. { .mask = Q40_IRQ4_MASK, .irq = 4 }, /* ser 2 */
  239. { .mask = Q40_IRQ14_MASK, .irq = 14 }, /* IDE 1 */
  240. { .mask = Q40_IRQ15_MASK, .irq = 15 }, /* IDE 2 */
  241. { .mask = Q40_IRQ6_MASK, .irq = 6 }, /* floppy, handled elsewhere */
  242. { .mask = Q40_IRQ7_MASK, .irq = 7 }, /* par */
  243. { .mask = Q40_IRQ5_MASK, .irq = 5 },
  244. { .mask = Q40_IRQ10_MASK, .irq = 10 },
  245. {0,0}
  246. };
  247. /* complain only this many times about spurious ints : */
  248. static int ccleirq=60; /* ISA dev IRQ's*/
  249. /*static int cclirq=60;*/ /* internal */
  250. /* FIXME: add shared ints,mask,unmask,probing.... */
  251. #define IRQ_INPROGRESS 1
  252. /*static unsigned short saved_mask;*/
  253. //static int do_tint=0;
  254. #define DEBUG_Q40INT
  255. /*#define IP_USE_DISABLE *//* would be nice, but crashes ???? */
  256. static int mext_disabled=0; /* ext irq disabled by master chip? */
  257. static int aliased_irq=0; /* how many times inside handler ?*/
  258. /* got level 2 interrupt, dispatch to ISA or keyboard/timer IRQs */
  259. irqreturn_t q40_irq2_handler (int vec, void *devname, struct pt_regs *fp)
  260. {
  261. unsigned mir, mer;
  262. int irq,i;
  263. //repeat:
  264. mir=master_inb(IIRQ_REG);
  265. if (mir&Q40_IRQ_FRAME_MASK) {
  266. irq_tab[Q40_IRQ_FRAME].count++;
  267. irq_tab[Q40_IRQ_FRAME].handler(Q40_IRQ_FRAME,irq_tab[Q40_IRQ_FRAME].dev_id,fp);
  268. master_outb(-1,FRAME_CLEAR_REG);
  269. }
  270. if ((mir&Q40_IRQ_SER_MASK) || (mir&Q40_IRQ_EXT_MASK)) {
  271. mer=master_inb(EIRQ_REG);
  272. for (i=0; eirqs[i].mask; i++) {
  273. if (mer&(eirqs[i].mask)) {
  274. irq=eirqs[i].irq;
  275. /*
  276. * There is a little mess wrt which IRQ really caused this irq request. The
  277. * main problem is that IIRQ_REG and EIRQ_REG reflect the state when they
  278. * are read - which is long after the request came in. In theory IRQs should
  279. * not just go away but they occassionally do
  280. */
  281. if (irq>4 && irq<=15 && mext_disabled) {
  282. /*aliased_irq++;*/
  283. goto iirq;
  284. }
  285. if (irq_tab[irq].handler == q40_defhand ) {
  286. printk("handler for IRQ %d not defined\n",irq);
  287. continue; /* ignore uninited INTs :-( */
  288. }
  289. if ( irq_tab[irq].state & IRQ_INPROGRESS ) {
  290. /* some handlers do local_irq_enable() for irq latency reasons, */
  291. /* however reentering an active irq handler is not permitted */
  292. #ifdef IP_USE_DISABLE
  293. /* in theory this is the better way to do it because it still */
  294. /* lets through eg the serial irqs, unfortunately it crashes */
  295. disable_irq(irq);
  296. disabled=1;
  297. #else
  298. /*printk("IRQ_INPROGRESS detected for irq %d, disabling - %s disabled\n",irq,disabled ? "already" : "not yet"); */
  299. fp->sr = (((fp->sr) & (~0x700))+0x200);
  300. disabled=1;
  301. #endif
  302. goto iirq;
  303. }
  304. irq_tab[irq].count++;
  305. irq_tab[irq].state |= IRQ_INPROGRESS;
  306. irq_tab[irq].handler(irq,irq_tab[irq].dev_id,fp);
  307. irq_tab[irq].state &= ~IRQ_INPROGRESS;
  308. /* naively enable everything, if that fails than */
  309. /* this function will be reentered immediately thus */
  310. /* getting another chance to disable the IRQ */
  311. if ( disabled ) {
  312. #ifdef IP_USE_DISABLE
  313. if (irq>4){
  314. disabled=0;
  315. enable_irq(irq);}
  316. #else
  317. disabled=0;
  318. /*printk("reenabling irq %d\n",irq); */
  319. #endif
  320. }
  321. // used to do 'goto repeat;' here, this delayed bh processing too long
  322. return IRQ_HANDLED;
  323. }
  324. }
  325. if (mer && ccleirq>0 && !aliased_irq)
  326. printk("ISA interrupt from unknown source? EIRQ_REG = %x\n",mer),ccleirq--;
  327. }
  328. iirq:
  329. mir=master_inb(IIRQ_REG);
  330. /* should test whether keyboard irq is really enabled, doing it in defhand */
  331. if (mir&Q40_IRQ_KEYB_MASK) {
  332. irq_tab[Q40_IRQ_KEYBOARD].count++;
  333. irq_tab[Q40_IRQ_KEYBOARD].handler(Q40_IRQ_KEYBOARD,irq_tab[Q40_IRQ_KEYBOARD].dev_id,fp);
  334. }
  335. return IRQ_HANDLED;
  336. }
  337. int show_q40_interrupts (struct seq_file *p, void *v)
  338. {
  339. int i;
  340. for (i = 0; i <= Q40_IRQ_MAX; i++) {
  341. if (irq_tab[i].count)
  342. seq_printf(p, "%sIRQ %02d: %8d %s%s\n",
  343. (i<=15) ? "ISA-" : " " ,
  344. i, irq_tab[i].count,
  345. irq_tab[i].devname[0] ? irq_tab[i].devname : "?",
  346. irq_tab[i].handler == q40_defhand ?
  347. " (now unassigned)" : "");
  348. }
  349. return 0;
  350. }
  351. static irqreturn_t q40_defhand (int irq, void *dev_id, struct pt_regs *fp)
  352. {
  353. if (irq!=Q40_IRQ_KEYBOARD)
  354. printk ("Unknown q40 interrupt %d\n", irq);
  355. else master_outb(-1,KEYBOARD_UNLOCK_REG);
  356. return IRQ_NONE;
  357. }
  358. static irqreturn_t default_handler(int lev, void *dev_id, struct pt_regs *regs)
  359. {
  360. printk ("Uninitialised interrupt level %d\n", lev);
  361. return IRQ_NONE;
  362. }
  363. irqreturn_t (*q40_default_handler[SYS_IRQS])(int, void *, struct pt_regs *) = {
  364. [0] = default_handler,
  365. [1] = default_handler,
  366. [2] = default_handler,
  367. [3] = default_handler,
  368. [4] = default_handler,
  369. [5] = default_handler,
  370. [6] = default_handler,
  371. [7] = default_handler
  372. };
  373. void q40_enable_irq (unsigned int irq)
  374. {
  375. if ( irq>=5 && irq<=15 )
  376. {
  377. mext_disabled--;
  378. if (mext_disabled>0)
  379. printk("q40_enable_irq : nested disable/enable\n");
  380. if (mext_disabled==0)
  381. master_outb(1,EXT_ENABLE_REG);
  382. }
  383. }
  384. void q40_disable_irq (unsigned int irq)
  385. {
  386. /* disable ISA iqs : only do something if the driver has been
  387. * verified to be Q40 "compatible" - right now IDE, NE2K
  388. * Any driver should not attempt to sleep across disable_irq !!
  389. */
  390. if ( irq>=5 && irq<=15 ) {
  391. master_outb(0,EXT_ENABLE_REG);
  392. mext_disabled++;
  393. if (mext_disabled>1) printk("disable_irq nesting count %d\n",mext_disabled);
  394. }
  395. }
  396. unsigned long q40_probe_irq_on (void)
  397. {
  398. printk("irq probing not working - reconfigure the driver to avoid this\n");
  399. return -1;
  400. }
  401. int q40_probe_irq_off (unsigned long irqs)
  402. {
  403. return -1;
  404. }
  405. /*
  406. * Local variables:
  407. * compile-command: "m68k-linux-gcc -D__KERNEL__ -I/home/rz/lx/linux-2.2.6/include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -ffixed-a2 -m68040 -c -o q40ints.o q40ints.c"
  408. * End:
  409. */