process.c 21 KB

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  1. /*
  2. * Architecture-specific setup.
  3. *
  4. * Copyright (C) 1998-2003 Hewlett-Packard Co
  5. * David Mosberger-Tang <davidm@hpl.hp.com>
  6. * 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
  7. *
  8. * 2005-10-07 Keith Owens <kaos@sgi.com>
  9. * Add notify_die() hooks.
  10. */
  11. #define __KERNEL_SYSCALLS__ /* see <asm/unistd.h> */
  12. #include <linux/config.h>
  13. #include <linux/cpu.h>
  14. #include <linux/pm.h>
  15. #include <linux/elf.h>
  16. #include <linux/errno.h>
  17. #include <linux/kallsyms.h>
  18. #include <linux/kernel.h>
  19. #include <linux/mm.h>
  20. #include <linux/module.h>
  21. #include <linux/notifier.h>
  22. #include <linux/personality.h>
  23. #include <linux/sched.h>
  24. #include <linux/slab.h>
  25. #include <linux/smp_lock.h>
  26. #include <linux/stddef.h>
  27. #include <linux/thread_info.h>
  28. #include <linux/unistd.h>
  29. #include <linux/efi.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/delay.h>
  32. #include <asm/cpu.h>
  33. #include <asm/delay.h>
  34. #include <asm/elf.h>
  35. #include <asm/ia32.h>
  36. #include <asm/irq.h>
  37. #include <asm/kdebug.h>
  38. #include <asm/pgalloc.h>
  39. #include <asm/processor.h>
  40. #include <asm/sal.h>
  41. #include <asm/tlbflush.h>
  42. #include <asm/uaccess.h>
  43. #include <asm/unwind.h>
  44. #include <asm/user.h>
  45. #include "entry.h"
  46. #ifdef CONFIG_PERFMON
  47. # include <asm/perfmon.h>
  48. #endif
  49. #include "sigframe.h"
  50. void (*ia64_mark_idle)(int);
  51. static DEFINE_PER_CPU(unsigned int, cpu_idle_state);
  52. unsigned long boot_option_idle_override = 0;
  53. EXPORT_SYMBOL(boot_option_idle_override);
  54. void
  55. ia64_do_show_stack (struct unw_frame_info *info, void *arg)
  56. {
  57. unsigned long ip, sp, bsp;
  58. char buf[128]; /* don't make it so big that it overflows the stack! */
  59. printk("\nCall Trace:\n");
  60. do {
  61. unw_get_ip(info, &ip);
  62. if (ip == 0)
  63. break;
  64. unw_get_sp(info, &sp);
  65. unw_get_bsp(info, &bsp);
  66. snprintf(buf, sizeof(buf),
  67. " [<%016lx>] %%s\n"
  68. " sp=%016lx bsp=%016lx\n",
  69. ip, sp, bsp);
  70. print_symbol(buf, ip);
  71. } while (unw_unwind(info) >= 0);
  72. }
  73. void
  74. show_stack (struct task_struct *task, unsigned long *sp)
  75. {
  76. if (!task)
  77. unw_init_running(ia64_do_show_stack, NULL);
  78. else {
  79. struct unw_frame_info info;
  80. unw_init_from_blocked_task(&info, task);
  81. ia64_do_show_stack(&info, NULL);
  82. }
  83. }
  84. void
  85. dump_stack (void)
  86. {
  87. show_stack(NULL, NULL);
  88. }
  89. EXPORT_SYMBOL(dump_stack);
  90. void
  91. show_regs (struct pt_regs *regs)
  92. {
  93. unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
  94. print_modules();
  95. printk("\nPid: %d, CPU %d, comm: %20s\n", current->pid, smp_processor_id(), current->comm);
  96. printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s\n",
  97. regs->cr_ipsr, regs->cr_ifs, ip, print_tainted());
  98. print_symbol("ip is at %s\n", ip);
  99. printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
  100. regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
  101. printk("rnat: %016lx bsps: %016lx pr : %016lx\n",
  102. regs->ar_rnat, regs->ar_bspstore, regs->pr);
  103. printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
  104. regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
  105. printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
  106. printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7);
  107. printk("f6 : %05lx%016lx f7 : %05lx%016lx\n",
  108. regs->f6.u.bits[1], regs->f6.u.bits[0],
  109. regs->f7.u.bits[1], regs->f7.u.bits[0]);
  110. printk("f8 : %05lx%016lx f9 : %05lx%016lx\n",
  111. regs->f8.u.bits[1], regs->f8.u.bits[0],
  112. regs->f9.u.bits[1], regs->f9.u.bits[0]);
  113. printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
  114. regs->f10.u.bits[1], regs->f10.u.bits[0],
  115. regs->f11.u.bits[1], regs->f11.u.bits[0]);
  116. printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3);
  117. printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10);
  118. printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13);
  119. printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16);
  120. printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19);
  121. printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22);
  122. printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25);
  123. printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28);
  124. printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31);
  125. if (user_mode(regs)) {
  126. /* print the stacked registers */
  127. unsigned long val, *bsp, ndirty;
  128. int i, sof, is_nat = 0;
  129. sof = regs->cr_ifs & 0x7f; /* size of frame */
  130. ndirty = (regs->loadrs >> 19);
  131. bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty);
  132. for (i = 0; i < sof; ++i) {
  133. get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i));
  134. printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val,
  135. ((i == sof - 1) || (i % 3) == 2) ? "\n" : " ");
  136. }
  137. } else
  138. show_stack(NULL, NULL);
  139. }
  140. void
  141. do_notify_resume_user (sigset_t *oldset, struct sigscratch *scr, long in_syscall)
  142. {
  143. if (fsys_mode(current, &scr->pt)) {
  144. /* defer signal-handling etc. until we return to privilege-level 0. */
  145. if (!ia64_psr(&scr->pt)->lp)
  146. ia64_psr(&scr->pt)->lp = 1;
  147. return;
  148. }
  149. #ifdef CONFIG_PERFMON
  150. if (current->thread.pfm_needs_checking)
  151. pfm_handle_work();
  152. #endif
  153. /* deal with pending signal delivery */
  154. if (test_thread_flag(TIF_SIGPENDING))
  155. ia64_do_signal(oldset, scr, in_syscall);
  156. }
  157. static int pal_halt = 1;
  158. static int can_do_pal_halt = 1;
  159. static int __init nohalt_setup(char * str)
  160. {
  161. pal_halt = can_do_pal_halt = 0;
  162. return 1;
  163. }
  164. __setup("nohalt", nohalt_setup);
  165. void
  166. update_pal_halt_status(int status)
  167. {
  168. can_do_pal_halt = pal_halt && status;
  169. }
  170. /*
  171. * We use this if we don't have any better idle routine..
  172. */
  173. void
  174. default_idle (void)
  175. {
  176. local_irq_enable();
  177. while (!need_resched()) {
  178. if (can_do_pal_halt)
  179. safe_halt();
  180. else
  181. cpu_relax();
  182. }
  183. }
  184. #ifdef CONFIG_HOTPLUG_CPU
  185. /* We don't actually take CPU down, just spin without interrupts. */
  186. static inline void play_dead(void)
  187. {
  188. extern void ia64_cpu_local_tick (void);
  189. unsigned int this_cpu = smp_processor_id();
  190. /* Ack it */
  191. __get_cpu_var(cpu_state) = CPU_DEAD;
  192. max_xtp();
  193. local_irq_disable();
  194. idle_task_exit();
  195. ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]);
  196. /*
  197. * The above is a point of no-return, the processor is
  198. * expected to be in SAL loop now.
  199. */
  200. BUG();
  201. }
  202. #else
  203. static inline void play_dead(void)
  204. {
  205. BUG();
  206. }
  207. #endif /* CONFIG_HOTPLUG_CPU */
  208. void cpu_idle_wait(void)
  209. {
  210. unsigned int cpu, this_cpu = get_cpu();
  211. cpumask_t map;
  212. set_cpus_allowed(current, cpumask_of_cpu(this_cpu));
  213. put_cpu();
  214. cpus_clear(map);
  215. for_each_online_cpu(cpu) {
  216. per_cpu(cpu_idle_state, cpu) = 1;
  217. cpu_set(cpu, map);
  218. }
  219. __get_cpu_var(cpu_idle_state) = 0;
  220. wmb();
  221. do {
  222. ssleep(1);
  223. for_each_online_cpu(cpu) {
  224. if (cpu_isset(cpu, map) && !per_cpu(cpu_idle_state, cpu))
  225. cpu_clear(cpu, map);
  226. }
  227. cpus_and(map, map, cpu_online_map);
  228. } while (!cpus_empty(map));
  229. }
  230. EXPORT_SYMBOL_GPL(cpu_idle_wait);
  231. void __attribute__((noreturn))
  232. cpu_idle (void)
  233. {
  234. void (*mark_idle)(int) = ia64_mark_idle;
  235. int cpu = smp_processor_id();
  236. /* endless idle loop with no priority at all */
  237. while (1) {
  238. if (can_do_pal_halt)
  239. clear_thread_flag(TIF_POLLING_NRFLAG);
  240. else
  241. set_thread_flag(TIF_POLLING_NRFLAG);
  242. if (!need_resched()) {
  243. void (*idle)(void);
  244. #ifdef CONFIG_SMP
  245. min_xtp();
  246. #endif
  247. if (__get_cpu_var(cpu_idle_state))
  248. __get_cpu_var(cpu_idle_state) = 0;
  249. rmb();
  250. if (mark_idle)
  251. (*mark_idle)(1);
  252. idle = pm_idle;
  253. if (!idle)
  254. idle = default_idle;
  255. (*idle)();
  256. if (mark_idle)
  257. (*mark_idle)(0);
  258. #ifdef CONFIG_SMP
  259. normal_xtp();
  260. #endif
  261. }
  262. preempt_enable_no_resched();
  263. schedule();
  264. preempt_disable();
  265. check_pgt_cache();
  266. if (cpu_is_offline(cpu))
  267. play_dead();
  268. }
  269. }
  270. void
  271. ia64_save_extra (struct task_struct *task)
  272. {
  273. #ifdef CONFIG_PERFMON
  274. unsigned long info;
  275. #endif
  276. if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
  277. ia64_save_debug_regs(&task->thread.dbr[0]);
  278. #ifdef CONFIG_PERFMON
  279. if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
  280. pfm_save_regs(task);
  281. info = __get_cpu_var(pfm_syst_info);
  282. if (info & PFM_CPUINFO_SYST_WIDE)
  283. pfm_syst_wide_update_task(task, info, 0);
  284. #endif
  285. #ifdef CONFIG_IA32_SUPPORT
  286. if (IS_IA32_PROCESS(task_pt_regs(task)))
  287. ia32_save_state(task);
  288. #endif
  289. }
  290. void
  291. ia64_load_extra (struct task_struct *task)
  292. {
  293. #ifdef CONFIG_PERFMON
  294. unsigned long info;
  295. #endif
  296. if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
  297. ia64_load_debug_regs(&task->thread.dbr[0]);
  298. #ifdef CONFIG_PERFMON
  299. if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
  300. pfm_load_regs(task);
  301. info = __get_cpu_var(pfm_syst_info);
  302. if (info & PFM_CPUINFO_SYST_WIDE)
  303. pfm_syst_wide_update_task(task, info, 1);
  304. #endif
  305. #ifdef CONFIG_IA32_SUPPORT
  306. if (IS_IA32_PROCESS(task_pt_regs(task)))
  307. ia32_load_state(task);
  308. #endif
  309. }
  310. /*
  311. * Copy the state of an ia-64 thread.
  312. *
  313. * We get here through the following call chain:
  314. *
  315. * from user-level: from kernel:
  316. *
  317. * <clone syscall> <some kernel call frames>
  318. * sys_clone :
  319. * do_fork do_fork
  320. * copy_thread copy_thread
  321. *
  322. * This means that the stack layout is as follows:
  323. *
  324. * +---------------------+ (highest addr)
  325. * | struct pt_regs |
  326. * +---------------------+
  327. * | struct switch_stack |
  328. * +---------------------+
  329. * | |
  330. * | memory stack |
  331. * | | <-- sp (lowest addr)
  332. * +---------------------+
  333. *
  334. * Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an
  335. * integer to address X causes bit N in ar.unat to be set to the NaT bit of the register,
  336. * with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the
  337. * pt_regs structure in the parent is congruent to that of the child, modulo 512. Since
  338. * the stack is page aligned and the page size is at least 4KB, this is always the case,
  339. * so there is nothing to worry about.
  340. */
  341. int
  342. copy_thread (int nr, unsigned long clone_flags,
  343. unsigned long user_stack_base, unsigned long user_stack_size,
  344. struct task_struct *p, struct pt_regs *regs)
  345. {
  346. extern char ia64_ret_from_clone, ia32_ret_from_clone;
  347. struct switch_stack *child_stack, *stack;
  348. unsigned long rbs, child_rbs, rbs_size;
  349. struct pt_regs *child_ptregs;
  350. int retval = 0;
  351. #ifdef CONFIG_SMP
  352. /*
  353. * For SMP idle threads, fork_by_hand() calls do_fork with
  354. * NULL regs.
  355. */
  356. if (!regs)
  357. return 0;
  358. #endif
  359. stack = ((struct switch_stack *) regs) - 1;
  360. child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1;
  361. child_stack = (struct switch_stack *) child_ptregs - 1;
  362. /* copy parent's switch_stack & pt_regs to child: */
  363. memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack));
  364. rbs = (unsigned long) current + IA64_RBS_OFFSET;
  365. child_rbs = (unsigned long) p + IA64_RBS_OFFSET;
  366. rbs_size = stack->ar_bspstore - rbs;
  367. /* copy the parent's register backing store to the child: */
  368. memcpy((void *) child_rbs, (void *) rbs, rbs_size);
  369. if (likely(user_mode(child_ptregs))) {
  370. if ((clone_flags & CLONE_SETTLS) && !IS_IA32_PROCESS(regs))
  371. child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */
  372. if (user_stack_base) {
  373. child_ptregs->r12 = user_stack_base + user_stack_size - 16;
  374. child_ptregs->ar_bspstore = user_stack_base;
  375. child_ptregs->ar_rnat = 0;
  376. child_ptregs->loadrs = 0;
  377. }
  378. } else {
  379. /*
  380. * Note: we simply preserve the relative position of
  381. * the stack pointer here. There is no need to
  382. * allocate a scratch area here, since that will have
  383. * been taken care of by the caller of sys_clone()
  384. * already.
  385. */
  386. child_ptregs->r12 = (unsigned long) child_ptregs - 16; /* kernel sp */
  387. child_ptregs->r13 = (unsigned long) p; /* set `current' pointer */
  388. }
  389. child_stack->ar_bspstore = child_rbs + rbs_size;
  390. if (IS_IA32_PROCESS(regs))
  391. child_stack->b0 = (unsigned long) &ia32_ret_from_clone;
  392. else
  393. child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
  394. /* copy parts of thread_struct: */
  395. p->thread.ksp = (unsigned long) child_stack - 16;
  396. /* stop some PSR bits from being inherited.
  397. * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
  398. * therefore we must specify them explicitly here and not include them in
  399. * IA64_PSR_BITS_TO_CLEAR.
  400. */
  401. child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
  402. & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
  403. /*
  404. * NOTE: The calling convention considers all floating point
  405. * registers in the high partition (fph) to be scratch. Since
  406. * the only way to get to this point is through a system call,
  407. * we know that the values in fph are all dead. Hence, there
  408. * is no need to inherit the fph state from the parent to the
  409. * child and all we have to do is to make sure that
  410. * IA64_THREAD_FPH_VALID is cleared in the child.
  411. *
  412. * XXX We could push this optimization a bit further by
  413. * clearing IA64_THREAD_FPH_VALID on ANY system call.
  414. * However, it's not clear this is worth doing. Also, it
  415. * would be a slight deviation from the normal Linux system
  416. * call behavior where scratch registers are preserved across
  417. * system calls (unless used by the system call itself).
  418. */
  419. # define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \
  420. | IA64_THREAD_PM_VALID)
  421. # define THREAD_FLAGS_TO_SET 0
  422. p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR)
  423. | THREAD_FLAGS_TO_SET);
  424. ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */
  425. #ifdef CONFIG_IA32_SUPPORT
  426. /*
  427. * If we're cloning an IA32 task then save the IA32 extra
  428. * state from the current task to the new task
  429. */
  430. if (IS_IA32_PROCESS(task_pt_regs(current))) {
  431. ia32_save_state(p);
  432. if (clone_flags & CLONE_SETTLS)
  433. retval = ia32_clone_tls(p, child_ptregs);
  434. /* Copy partially mapped page list */
  435. if (!retval)
  436. retval = ia32_copy_partial_page_list(p, clone_flags);
  437. }
  438. #endif
  439. #ifdef CONFIG_PERFMON
  440. if (current->thread.pfm_context)
  441. pfm_inherit(p, child_ptregs);
  442. #endif
  443. return retval;
  444. }
  445. static void
  446. do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg)
  447. {
  448. unsigned long mask, sp, nat_bits = 0, ip, ar_rnat, urbs_end, cfm;
  449. elf_greg_t *dst = arg;
  450. struct pt_regs *pt;
  451. char nat;
  452. int i;
  453. memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */
  454. if (unw_unwind_to_user(info) < 0)
  455. return;
  456. unw_get_sp(info, &sp);
  457. pt = (struct pt_regs *) (sp + 16);
  458. urbs_end = ia64_get_user_rbs_end(task, pt, &cfm);
  459. if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0)
  460. return;
  461. ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end),
  462. &ar_rnat);
  463. /*
  464. * coredump format:
  465. * r0-r31
  466. * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
  467. * predicate registers (p0-p63)
  468. * b0-b7
  469. * ip cfm user-mask
  470. * ar.rsc ar.bsp ar.bspstore ar.rnat
  471. * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
  472. */
  473. /* r0 is zero */
  474. for (i = 1, mask = (1UL << i); i < 32; ++i) {
  475. unw_get_gr(info, i, &dst[i], &nat);
  476. if (nat)
  477. nat_bits |= mask;
  478. mask <<= 1;
  479. }
  480. dst[32] = nat_bits;
  481. unw_get_pr(info, &dst[33]);
  482. for (i = 0; i < 8; ++i)
  483. unw_get_br(info, i, &dst[34 + i]);
  484. unw_get_rp(info, &ip);
  485. dst[42] = ip + ia64_psr(pt)->ri;
  486. dst[43] = cfm;
  487. dst[44] = pt->cr_ipsr & IA64_PSR_UM;
  488. unw_get_ar(info, UNW_AR_RSC, &dst[45]);
  489. /*
  490. * For bsp and bspstore, unw_get_ar() would return the kernel
  491. * addresses, but we need the user-level addresses instead:
  492. */
  493. dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */
  494. dst[47] = pt->ar_bspstore;
  495. dst[48] = ar_rnat;
  496. unw_get_ar(info, UNW_AR_CCV, &dst[49]);
  497. unw_get_ar(info, UNW_AR_UNAT, &dst[50]);
  498. unw_get_ar(info, UNW_AR_FPSR, &dst[51]);
  499. dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */
  500. unw_get_ar(info, UNW_AR_LC, &dst[53]);
  501. unw_get_ar(info, UNW_AR_EC, &dst[54]);
  502. unw_get_ar(info, UNW_AR_CSD, &dst[55]);
  503. unw_get_ar(info, UNW_AR_SSD, &dst[56]);
  504. }
  505. void
  506. do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg)
  507. {
  508. elf_fpreg_t *dst = arg;
  509. int i;
  510. memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */
  511. if (unw_unwind_to_user(info) < 0)
  512. return;
  513. /* f0 is 0.0, f1 is 1.0 */
  514. for (i = 2; i < 32; ++i)
  515. unw_get_fr(info, i, dst + i);
  516. ia64_flush_fph(task);
  517. if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0)
  518. memcpy(dst + 32, task->thread.fph, 96*16);
  519. }
  520. void
  521. do_copy_regs (struct unw_frame_info *info, void *arg)
  522. {
  523. do_copy_task_regs(current, info, arg);
  524. }
  525. void
  526. do_dump_fpu (struct unw_frame_info *info, void *arg)
  527. {
  528. do_dump_task_fpu(current, info, arg);
  529. }
  530. int
  531. dump_task_regs(struct task_struct *task, elf_gregset_t *regs)
  532. {
  533. struct unw_frame_info tcore_info;
  534. if (current == task) {
  535. unw_init_running(do_copy_regs, regs);
  536. } else {
  537. memset(&tcore_info, 0, sizeof(tcore_info));
  538. unw_init_from_blocked_task(&tcore_info, task);
  539. do_copy_task_regs(task, &tcore_info, regs);
  540. }
  541. return 1;
  542. }
  543. void
  544. ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst)
  545. {
  546. unw_init_running(do_copy_regs, dst);
  547. }
  548. int
  549. dump_task_fpu (struct task_struct *task, elf_fpregset_t *dst)
  550. {
  551. struct unw_frame_info tcore_info;
  552. if (current == task) {
  553. unw_init_running(do_dump_fpu, dst);
  554. } else {
  555. memset(&tcore_info, 0, sizeof(tcore_info));
  556. unw_init_from_blocked_task(&tcore_info, task);
  557. do_dump_task_fpu(task, &tcore_info, dst);
  558. }
  559. return 1;
  560. }
  561. int
  562. dump_fpu (struct pt_regs *pt, elf_fpregset_t dst)
  563. {
  564. unw_init_running(do_dump_fpu, dst);
  565. return 1; /* f0-f31 are always valid so we always return 1 */
  566. }
  567. long
  568. sys_execve (char __user *filename, char __user * __user *argv, char __user * __user *envp,
  569. struct pt_regs *regs)
  570. {
  571. char *fname;
  572. int error;
  573. fname = getname(filename);
  574. error = PTR_ERR(fname);
  575. if (IS_ERR(fname))
  576. goto out;
  577. error = do_execve(fname, argv, envp, regs);
  578. putname(fname);
  579. out:
  580. return error;
  581. }
  582. pid_t
  583. kernel_thread (int (*fn)(void *), void *arg, unsigned long flags)
  584. {
  585. extern void start_kernel_thread (void);
  586. unsigned long *helper_fptr = (unsigned long *) &start_kernel_thread;
  587. struct {
  588. struct switch_stack sw;
  589. struct pt_regs pt;
  590. } regs;
  591. memset(&regs, 0, sizeof(regs));
  592. regs.pt.cr_iip = helper_fptr[0]; /* set entry point (IP) */
  593. regs.pt.r1 = helper_fptr[1]; /* set GP */
  594. regs.pt.r9 = (unsigned long) fn; /* 1st argument */
  595. regs.pt.r11 = (unsigned long) arg; /* 2nd argument */
  596. /* Preserve PSR bits, except for bits 32-34 and 37-45, which we can't read. */
  597. regs.pt.cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN;
  598. regs.pt.cr_ifs = 1UL << 63; /* mark as valid, empty frame */
  599. regs.sw.ar_fpsr = regs.pt.ar_fpsr = ia64_getreg(_IA64_REG_AR_FPSR);
  600. regs.sw.ar_bspstore = (unsigned long) current + IA64_RBS_OFFSET;
  601. regs.sw.pr = (1 << PRED_KERNEL_STACK);
  602. return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs.pt, 0, NULL, NULL);
  603. }
  604. EXPORT_SYMBOL(kernel_thread);
  605. /* This gets called from kernel_thread() via ia64_invoke_thread_helper(). */
  606. int
  607. kernel_thread_helper (int (*fn)(void *), void *arg)
  608. {
  609. #ifdef CONFIG_IA32_SUPPORT
  610. if (IS_IA32_PROCESS(task_pt_regs(current))) {
  611. /* A kernel thread is always a 64-bit process. */
  612. current->thread.map_base = DEFAULT_MAP_BASE;
  613. current->thread.task_size = DEFAULT_TASK_SIZE;
  614. ia64_set_kr(IA64_KR_IO_BASE, current->thread.old_iob);
  615. ia64_set_kr(IA64_KR_TSSD, current->thread.old_k1);
  616. }
  617. #endif
  618. return (*fn)(arg);
  619. }
  620. /*
  621. * Flush thread state. This is called when a thread does an execve().
  622. */
  623. void
  624. flush_thread (void)
  625. {
  626. /* drop floating-point and debug-register state if it exists: */
  627. current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
  628. ia64_drop_fpu(current);
  629. #ifdef CONFIG_IA32_SUPPORT
  630. if (IS_IA32_PROCESS(task_pt_regs(current))) {
  631. ia32_drop_partial_page_list(current);
  632. current->thread.task_size = IA32_PAGE_OFFSET;
  633. set_fs(USER_DS);
  634. }
  635. #endif
  636. }
  637. /*
  638. * Clean up state associated with current thread. This is called when
  639. * the thread calls exit().
  640. */
  641. void
  642. exit_thread (void)
  643. {
  644. ia64_drop_fpu(current);
  645. #ifdef CONFIG_PERFMON
  646. /* if needed, stop monitoring and flush state to perfmon context */
  647. if (current->thread.pfm_context)
  648. pfm_exit_thread(current);
  649. /* free debug register resources */
  650. if (current->thread.flags & IA64_THREAD_DBG_VALID)
  651. pfm_release_debug_registers(current);
  652. #endif
  653. if (IS_IA32_PROCESS(task_pt_regs(current)))
  654. ia32_drop_partial_page_list(current);
  655. }
  656. unsigned long
  657. get_wchan (struct task_struct *p)
  658. {
  659. struct unw_frame_info info;
  660. unsigned long ip;
  661. int count = 0;
  662. /*
  663. * Note: p may not be a blocked task (it could be current or
  664. * another process running on some other CPU. Rather than
  665. * trying to determine if p is really blocked, we just assume
  666. * it's blocked and rely on the unwind routines to fail
  667. * gracefully if the process wasn't really blocked after all.
  668. * --davidm 99/12/15
  669. */
  670. unw_init_from_blocked_task(&info, p);
  671. do {
  672. if (unw_unwind(&info) < 0)
  673. return 0;
  674. unw_get_ip(&info, &ip);
  675. if (!in_sched_functions(ip))
  676. return ip;
  677. } while (count++ < 16);
  678. return 0;
  679. }
  680. void
  681. cpu_halt (void)
  682. {
  683. pal_power_mgmt_info_u_t power_info[8];
  684. unsigned long min_power;
  685. int i, min_power_state;
  686. if (ia64_pal_halt_info(power_info) != 0)
  687. return;
  688. min_power_state = 0;
  689. min_power = power_info[0].pal_power_mgmt_info_s.power_consumption;
  690. for (i = 1; i < 8; ++i)
  691. if (power_info[i].pal_power_mgmt_info_s.im
  692. && power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) {
  693. min_power = power_info[i].pal_power_mgmt_info_s.power_consumption;
  694. min_power_state = i;
  695. }
  696. while (1)
  697. ia64_pal_halt(min_power_state);
  698. }
  699. void
  700. machine_restart (char *restart_cmd)
  701. {
  702. (void) notify_die(DIE_MACHINE_RESTART, restart_cmd, NULL, 0, 0, 0);
  703. (*efi.reset_system)(EFI_RESET_WARM, 0, 0, NULL);
  704. }
  705. void
  706. machine_halt (void)
  707. {
  708. (void) notify_die(DIE_MACHINE_HALT, "", NULL, 0, 0, 0);
  709. cpu_halt();
  710. }
  711. void
  712. machine_power_off (void)
  713. {
  714. if (pm_power_off)
  715. pm_power_off();
  716. machine_halt();
  717. }