intel_cacheinfo.c 19 KB

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  1. /*
  2. * Routines to indentify caches on Intel CPU.
  3. *
  4. * Changes:
  5. * Venkatesh Pallipadi : Adding cache identification through cpuid(4)
  6. * Ashok Raj <ashok.raj@intel.com>: Work with CPU hotplug infrastructure.
  7. */
  8. #include <linux/init.h>
  9. #include <linux/slab.h>
  10. #include <linux/device.h>
  11. #include <linux/compiler.h>
  12. #include <linux/cpu.h>
  13. #include <linux/sched.h>
  14. #include <asm/processor.h>
  15. #include <asm/smp.h>
  16. #define LVL_1_INST 1
  17. #define LVL_1_DATA 2
  18. #define LVL_2 3
  19. #define LVL_3 4
  20. #define LVL_TRACE 5
  21. struct _cache_table
  22. {
  23. unsigned char descriptor;
  24. char cache_type;
  25. short size;
  26. };
  27. /* all the cache descriptor types we care about (no TLB or trace cache entries) */
  28. static struct _cache_table cache_table[] __cpuinitdata =
  29. {
  30. { 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */
  31. { 0x08, LVL_1_INST, 16 }, /* 4-way set assoc, 32 byte line size */
  32. { 0x0a, LVL_1_DATA, 8 }, /* 2 way set assoc, 32 byte line size */
  33. { 0x0c, LVL_1_DATA, 16 }, /* 4-way set assoc, 32 byte line size */
  34. { 0x22, LVL_3, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */
  35. { 0x23, LVL_3, 1024 }, /* 8-way set assoc, sectored cache, 64 byte line size */
  36. { 0x25, LVL_3, 2048 }, /* 8-way set assoc, sectored cache, 64 byte line size */
  37. { 0x29, LVL_3, 4096 }, /* 8-way set assoc, sectored cache, 64 byte line size */
  38. { 0x2c, LVL_1_DATA, 32 }, /* 8-way set assoc, 64 byte line size */
  39. { 0x30, LVL_1_INST, 32 }, /* 8-way set assoc, 64 byte line size */
  40. { 0x39, LVL_2, 128 }, /* 4-way set assoc, sectored cache, 64 byte line size */
  41. { 0x3a, LVL_2, 192 }, /* 6-way set assoc, sectored cache, 64 byte line size */
  42. { 0x3b, LVL_2, 128 }, /* 2-way set assoc, sectored cache, 64 byte line size */
  43. { 0x3c, LVL_2, 256 }, /* 4-way set assoc, sectored cache, 64 byte line size */
  44. { 0x3d, LVL_2, 384 }, /* 6-way set assoc, sectored cache, 64 byte line size */
  45. { 0x3e, LVL_2, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */
  46. { 0x41, LVL_2, 128 }, /* 4-way set assoc, 32 byte line size */
  47. { 0x42, LVL_2, 256 }, /* 4-way set assoc, 32 byte line size */
  48. { 0x43, LVL_2, 512 }, /* 4-way set assoc, 32 byte line size */
  49. { 0x44, LVL_2, 1024 }, /* 4-way set assoc, 32 byte line size */
  50. { 0x45, LVL_2, 2048 }, /* 4-way set assoc, 32 byte line size */
  51. { 0x46, LVL_3, 4096 }, /* 4-way set assoc, 64 byte line size */
  52. { 0x47, LVL_3, 8192 }, /* 8-way set assoc, 64 byte line size */
  53. { 0x49, LVL_3, 4096 }, /* 16-way set assoc, 64 byte line size */
  54. { 0x4a, LVL_3, 6144 }, /* 12-way set assoc, 64 byte line size */
  55. { 0x4b, LVL_3, 8192 }, /* 16-way set assoc, 64 byte line size */
  56. { 0x4c, LVL_3, 12288 }, /* 12-way set assoc, 64 byte line size */
  57. { 0x4d, LVL_3, 16384 }, /* 16-way set assoc, 64 byte line size */
  58. { 0x60, LVL_1_DATA, 16 }, /* 8-way set assoc, sectored cache, 64 byte line size */
  59. { 0x66, LVL_1_DATA, 8 }, /* 4-way set assoc, sectored cache, 64 byte line size */
  60. { 0x67, LVL_1_DATA, 16 }, /* 4-way set assoc, sectored cache, 64 byte line size */
  61. { 0x68, LVL_1_DATA, 32 }, /* 4-way set assoc, sectored cache, 64 byte line size */
  62. { 0x70, LVL_TRACE, 12 }, /* 8-way set assoc */
  63. { 0x71, LVL_TRACE, 16 }, /* 8-way set assoc */
  64. { 0x72, LVL_TRACE, 32 }, /* 8-way set assoc */
  65. { 0x73, LVL_TRACE, 64 }, /* 8-way set assoc */
  66. { 0x78, LVL_2, 1024 }, /* 4-way set assoc, 64 byte line size */
  67. { 0x79, LVL_2, 128 }, /* 8-way set assoc, sectored cache, 64 byte line size */
  68. { 0x7a, LVL_2, 256 }, /* 8-way set assoc, sectored cache, 64 byte line size */
  69. { 0x7b, LVL_2, 512 }, /* 8-way set assoc, sectored cache, 64 byte line size */
  70. { 0x7c, LVL_2, 1024 }, /* 8-way set assoc, sectored cache, 64 byte line size */
  71. { 0x7d, LVL_2, 2048 }, /* 8-way set assoc, 64 byte line size */
  72. { 0x7f, LVL_2, 512 }, /* 2-way set assoc, 64 byte line size */
  73. { 0x82, LVL_2, 256 }, /* 8-way set assoc, 32 byte line size */
  74. { 0x83, LVL_2, 512 }, /* 8-way set assoc, 32 byte line size */
  75. { 0x84, LVL_2, 1024 }, /* 8-way set assoc, 32 byte line size */
  76. { 0x85, LVL_2, 2048 }, /* 8-way set assoc, 32 byte line size */
  77. { 0x86, LVL_2, 512 }, /* 4-way set assoc, 64 byte line size */
  78. { 0x87, LVL_2, 1024 }, /* 8-way set assoc, 64 byte line size */
  79. { 0x00, 0, 0}
  80. };
  81. enum _cache_type
  82. {
  83. CACHE_TYPE_NULL = 0,
  84. CACHE_TYPE_DATA = 1,
  85. CACHE_TYPE_INST = 2,
  86. CACHE_TYPE_UNIFIED = 3
  87. };
  88. union _cpuid4_leaf_eax {
  89. struct {
  90. enum _cache_type type:5;
  91. unsigned int level:3;
  92. unsigned int is_self_initializing:1;
  93. unsigned int is_fully_associative:1;
  94. unsigned int reserved:4;
  95. unsigned int num_threads_sharing:12;
  96. unsigned int num_cores_on_die:6;
  97. } split;
  98. u32 full;
  99. };
  100. union _cpuid4_leaf_ebx {
  101. struct {
  102. unsigned int coherency_line_size:12;
  103. unsigned int physical_line_partition:10;
  104. unsigned int ways_of_associativity:10;
  105. } split;
  106. u32 full;
  107. };
  108. union _cpuid4_leaf_ecx {
  109. struct {
  110. unsigned int number_of_sets:32;
  111. } split;
  112. u32 full;
  113. };
  114. struct _cpuid4_info {
  115. union _cpuid4_leaf_eax eax;
  116. union _cpuid4_leaf_ebx ebx;
  117. union _cpuid4_leaf_ecx ecx;
  118. unsigned long size;
  119. cpumask_t shared_cpu_map;
  120. };
  121. static unsigned short num_cache_leaves;
  122. static int __cpuinit cpuid4_cache_lookup(int index, struct _cpuid4_info *this_leaf)
  123. {
  124. unsigned int eax, ebx, ecx, edx;
  125. union _cpuid4_leaf_eax cache_eax;
  126. cpuid_count(4, index, &eax, &ebx, &ecx, &edx);
  127. cache_eax.full = eax;
  128. if (cache_eax.split.type == CACHE_TYPE_NULL)
  129. return -EIO; /* better error ? */
  130. this_leaf->eax.full = eax;
  131. this_leaf->ebx.full = ebx;
  132. this_leaf->ecx.full = ecx;
  133. this_leaf->size = (this_leaf->ecx.split.number_of_sets + 1) *
  134. (this_leaf->ebx.split.coherency_line_size + 1) *
  135. (this_leaf->ebx.split.physical_line_partition + 1) *
  136. (this_leaf->ebx.split.ways_of_associativity + 1);
  137. return 0;
  138. }
  139. /* will only be called once; __init is safe here */
  140. static int __init find_num_cache_leaves(void)
  141. {
  142. unsigned int eax, ebx, ecx, edx;
  143. union _cpuid4_leaf_eax cache_eax;
  144. int i = -1;
  145. do {
  146. ++i;
  147. /* Do cpuid(4) loop to find out num_cache_leaves */
  148. cpuid_count(4, i, &eax, &ebx, &ecx, &edx);
  149. cache_eax.full = eax;
  150. } while (cache_eax.split.type != CACHE_TYPE_NULL);
  151. return i;
  152. }
  153. unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
  154. {
  155. unsigned int trace = 0, l1i = 0, l1d = 0, l2 = 0, l3 = 0; /* Cache sizes */
  156. unsigned int new_l1d = 0, new_l1i = 0; /* Cache sizes from cpuid(4) */
  157. unsigned int new_l2 = 0, new_l3 = 0, i; /* Cache sizes from cpuid(4) */
  158. unsigned int l2_id = 0, l3_id = 0, num_threads_sharing, index_msb;
  159. #ifdef CONFIG_SMP
  160. unsigned int cpu = (c == &boot_cpu_data) ? 0 : (c - cpu_data);
  161. #endif
  162. if (c->cpuid_level > 3) {
  163. static int is_initialized;
  164. if (is_initialized == 0) {
  165. /* Init num_cache_leaves from boot CPU */
  166. num_cache_leaves = find_num_cache_leaves();
  167. is_initialized++;
  168. }
  169. /*
  170. * Whenever possible use cpuid(4), deterministic cache
  171. * parameters cpuid leaf to find the cache details
  172. */
  173. for (i = 0; i < num_cache_leaves; i++) {
  174. struct _cpuid4_info this_leaf;
  175. int retval;
  176. retval = cpuid4_cache_lookup(i, &this_leaf);
  177. if (retval >= 0) {
  178. switch(this_leaf.eax.split.level) {
  179. case 1:
  180. if (this_leaf.eax.split.type ==
  181. CACHE_TYPE_DATA)
  182. new_l1d = this_leaf.size/1024;
  183. else if (this_leaf.eax.split.type ==
  184. CACHE_TYPE_INST)
  185. new_l1i = this_leaf.size/1024;
  186. break;
  187. case 2:
  188. new_l2 = this_leaf.size/1024;
  189. num_threads_sharing = 1 + this_leaf.eax.split.num_threads_sharing;
  190. index_msb = get_count_order(num_threads_sharing);
  191. l2_id = c->apicid >> index_msb;
  192. break;
  193. case 3:
  194. new_l3 = this_leaf.size/1024;
  195. num_threads_sharing = 1 + this_leaf.eax.split.num_threads_sharing;
  196. index_msb = get_count_order(num_threads_sharing);
  197. l3_id = c->apicid >> index_msb;
  198. break;
  199. default:
  200. break;
  201. }
  202. }
  203. }
  204. }
  205. /*
  206. * Don't use cpuid2 if cpuid4 is supported. For P4, we use cpuid2 for
  207. * trace cache
  208. */
  209. if ((num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1) {
  210. /* supports eax=2 call */
  211. int i, j, n;
  212. int regs[4];
  213. unsigned char *dp = (unsigned char *)regs;
  214. int only_trace = 0;
  215. if (num_cache_leaves != 0 && c->x86 == 15)
  216. only_trace = 1;
  217. /* Number of times to iterate */
  218. n = cpuid_eax(2) & 0xFF;
  219. for ( i = 0 ; i < n ; i++ ) {
  220. cpuid(2, &regs[0], &regs[1], &regs[2], &regs[3]);
  221. /* If bit 31 is set, this is an unknown format */
  222. for ( j = 0 ; j < 3 ; j++ ) {
  223. if ( regs[j] < 0 ) regs[j] = 0;
  224. }
  225. /* Byte 0 is level count, not a descriptor */
  226. for ( j = 1 ; j < 16 ; j++ ) {
  227. unsigned char des = dp[j];
  228. unsigned char k = 0;
  229. /* look up this descriptor in the table */
  230. while (cache_table[k].descriptor != 0)
  231. {
  232. if (cache_table[k].descriptor == des) {
  233. if (only_trace && cache_table[k].cache_type != LVL_TRACE)
  234. break;
  235. switch (cache_table[k].cache_type) {
  236. case LVL_1_INST:
  237. l1i += cache_table[k].size;
  238. break;
  239. case LVL_1_DATA:
  240. l1d += cache_table[k].size;
  241. break;
  242. case LVL_2:
  243. l2 += cache_table[k].size;
  244. break;
  245. case LVL_3:
  246. l3 += cache_table[k].size;
  247. break;
  248. case LVL_TRACE:
  249. trace += cache_table[k].size;
  250. break;
  251. }
  252. break;
  253. }
  254. k++;
  255. }
  256. }
  257. }
  258. }
  259. if (new_l1d)
  260. l1d = new_l1d;
  261. if (new_l1i)
  262. l1i = new_l1i;
  263. if (new_l2) {
  264. l2 = new_l2;
  265. #ifdef CONFIG_SMP
  266. cpu_llc_id[cpu] = l2_id;
  267. #endif
  268. }
  269. if (new_l3) {
  270. l3 = new_l3;
  271. #ifdef CONFIG_SMP
  272. cpu_llc_id[cpu] = l3_id;
  273. #endif
  274. }
  275. if (trace)
  276. printk (KERN_INFO "CPU: Trace cache: %dK uops", trace);
  277. else if ( l1i )
  278. printk (KERN_INFO "CPU: L1 I cache: %dK", l1i);
  279. if (l1d)
  280. printk(", L1 D cache: %dK\n", l1d);
  281. else
  282. printk("\n");
  283. if (l2)
  284. printk(KERN_INFO "CPU: L2 cache: %dK\n", l2);
  285. if (l3)
  286. printk(KERN_INFO "CPU: L3 cache: %dK\n", l3);
  287. c->x86_cache_size = l3 ? l3 : (l2 ? l2 : (l1i+l1d));
  288. return l2;
  289. }
  290. /* pointer to _cpuid4_info array (for each cache leaf) */
  291. static struct _cpuid4_info *cpuid4_info[NR_CPUS];
  292. #define CPUID4_INFO_IDX(x,y) (&((cpuid4_info[x])[y]))
  293. #ifdef CONFIG_SMP
  294. static void __cpuinit cache_shared_cpu_map_setup(unsigned int cpu, int index)
  295. {
  296. struct _cpuid4_info *this_leaf, *sibling_leaf;
  297. unsigned long num_threads_sharing;
  298. int index_msb, i;
  299. struct cpuinfo_x86 *c = cpu_data;
  300. this_leaf = CPUID4_INFO_IDX(cpu, index);
  301. num_threads_sharing = 1 + this_leaf->eax.split.num_threads_sharing;
  302. if (num_threads_sharing == 1)
  303. cpu_set(cpu, this_leaf->shared_cpu_map);
  304. else {
  305. index_msb = get_count_order(num_threads_sharing);
  306. for_each_online_cpu(i) {
  307. if (c[i].apicid >> index_msb ==
  308. c[cpu].apicid >> index_msb) {
  309. cpu_set(i, this_leaf->shared_cpu_map);
  310. if (i != cpu && cpuid4_info[i]) {
  311. sibling_leaf = CPUID4_INFO_IDX(i, index);
  312. cpu_set(cpu, sibling_leaf->shared_cpu_map);
  313. }
  314. }
  315. }
  316. }
  317. }
  318. static void __cpuinit cache_remove_shared_cpu_map(unsigned int cpu, int index)
  319. {
  320. struct _cpuid4_info *this_leaf, *sibling_leaf;
  321. int sibling;
  322. this_leaf = CPUID4_INFO_IDX(cpu, index);
  323. for_each_cpu_mask(sibling, this_leaf->shared_cpu_map) {
  324. sibling_leaf = CPUID4_INFO_IDX(sibling, index);
  325. cpu_clear(cpu, sibling_leaf->shared_cpu_map);
  326. }
  327. }
  328. #else
  329. static void __init cache_shared_cpu_map_setup(unsigned int cpu, int index) {}
  330. static void __init cache_remove_shared_cpu_map(unsigned int cpu, int index) {}
  331. #endif
  332. static void free_cache_attributes(unsigned int cpu)
  333. {
  334. kfree(cpuid4_info[cpu]);
  335. cpuid4_info[cpu] = NULL;
  336. }
  337. static int __cpuinit detect_cache_attributes(unsigned int cpu)
  338. {
  339. struct _cpuid4_info *this_leaf;
  340. unsigned long j;
  341. int retval;
  342. cpumask_t oldmask;
  343. if (num_cache_leaves == 0)
  344. return -ENOENT;
  345. cpuid4_info[cpu] = kmalloc(
  346. sizeof(struct _cpuid4_info) * num_cache_leaves, GFP_KERNEL);
  347. if (unlikely(cpuid4_info[cpu] == NULL))
  348. return -ENOMEM;
  349. memset(cpuid4_info[cpu], 0,
  350. sizeof(struct _cpuid4_info) * num_cache_leaves);
  351. oldmask = current->cpus_allowed;
  352. retval = set_cpus_allowed(current, cpumask_of_cpu(cpu));
  353. if (retval)
  354. goto out;
  355. /* Do cpuid and store the results */
  356. retval = 0;
  357. for (j = 0; j < num_cache_leaves; j++) {
  358. this_leaf = CPUID4_INFO_IDX(cpu, j);
  359. retval = cpuid4_cache_lookup(j, this_leaf);
  360. if (unlikely(retval < 0))
  361. break;
  362. cache_shared_cpu_map_setup(cpu, j);
  363. }
  364. set_cpus_allowed(current, oldmask);
  365. out:
  366. if (retval)
  367. free_cache_attributes(cpu);
  368. return retval;
  369. }
  370. #ifdef CONFIG_SYSFS
  371. #include <linux/kobject.h>
  372. #include <linux/sysfs.h>
  373. extern struct sysdev_class cpu_sysdev_class; /* from drivers/base/cpu.c */
  374. /* pointer to kobject for cpuX/cache */
  375. static struct kobject * cache_kobject[NR_CPUS];
  376. struct _index_kobject {
  377. struct kobject kobj;
  378. unsigned int cpu;
  379. unsigned short index;
  380. };
  381. /* pointer to array of kobjects for cpuX/cache/indexY */
  382. static struct _index_kobject *index_kobject[NR_CPUS];
  383. #define INDEX_KOBJECT_PTR(x,y) (&((index_kobject[x])[y]))
  384. #define show_one_plus(file_name, object, val) \
  385. static ssize_t show_##file_name \
  386. (struct _cpuid4_info *this_leaf, char *buf) \
  387. { \
  388. return sprintf (buf, "%lu\n", (unsigned long)this_leaf->object + val); \
  389. }
  390. show_one_plus(level, eax.split.level, 0);
  391. show_one_plus(coherency_line_size, ebx.split.coherency_line_size, 1);
  392. show_one_plus(physical_line_partition, ebx.split.physical_line_partition, 1);
  393. show_one_plus(ways_of_associativity, ebx.split.ways_of_associativity, 1);
  394. show_one_plus(number_of_sets, ecx.split.number_of_sets, 1);
  395. static ssize_t show_size(struct _cpuid4_info *this_leaf, char *buf)
  396. {
  397. return sprintf (buf, "%luK\n", this_leaf->size / 1024);
  398. }
  399. static ssize_t show_shared_cpu_map(struct _cpuid4_info *this_leaf, char *buf)
  400. {
  401. char mask_str[NR_CPUS];
  402. cpumask_scnprintf(mask_str, NR_CPUS, this_leaf->shared_cpu_map);
  403. return sprintf(buf, "%s\n", mask_str);
  404. }
  405. static ssize_t show_type(struct _cpuid4_info *this_leaf, char *buf) {
  406. switch(this_leaf->eax.split.type) {
  407. case CACHE_TYPE_DATA:
  408. return sprintf(buf, "Data\n");
  409. break;
  410. case CACHE_TYPE_INST:
  411. return sprintf(buf, "Instruction\n");
  412. break;
  413. case CACHE_TYPE_UNIFIED:
  414. return sprintf(buf, "Unified\n");
  415. break;
  416. default:
  417. return sprintf(buf, "Unknown\n");
  418. break;
  419. }
  420. }
  421. struct _cache_attr {
  422. struct attribute attr;
  423. ssize_t (*show)(struct _cpuid4_info *, char *);
  424. ssize_t (*store)(struct _cpuid4_info *, const char *, size_t count);
  425. };
  426. #define define_one_ro(_name) \
  427. static struct _cache_attr _name = \
  428. __ATTR(_name, 0444, show_##_name, NULL)
  429. define_one_ro(level);
  430. define_one_ro(type);
  431. define_one_ro(coherency_line_size);
  432. define_one_ro(physical_line_partition);
  433. define_one_ro(ways_of_associativity);
  434. define_one_ro(number_of_sets);
  435. define_one_ro(size);
  436. define_one_ro(shared_cpu_map);
  437. static struct attribute * default_attrs[] = {
  438. &type.attr,
  439. &level.attr,
  440. &coherency_line_size.attr,
  441. &physical_line_partition.attr,
  442. &ways_of_associativity.attr,
  443. &number_of_sets.attr,
  444. &size.attr,
  445. &shared_cpu_map.attr,
  446. NULL
  447. };
  448. #define to_object(k) container_of(k, struct _index_kobject, kobj)
  449. #define to_attr(a) container_of(a, struct _cache_attr, attr)
  450. static ssize_t show(struct kobject * kobj, struct attribute * attr, char * buf)
  451. {
  452. struct _cache_attr *fattr = to_attr(attr);
  453. struct _index_kobject *this_leaf = to_object(kobj);
  454. ssize_t ret;
  455. ret = fattr->show ?
  456. fattr->show(CPUID4_INFO_IDX(this_leaf->cpu, this_leaf->index),
  457. buf) :
  458. 0;
  459. return ret;
  460. }
  461. static ssize_t store(struct kobject * kobj, struct attribute * attr,
  462. const char * buf, size_t count)
  463. {
  464. return 0;
  465. }
  466. static struct sysfs_ops sysfs_ops = {
  467. .show = show,
  468. .store = store,
  469. };
  470. static struct kobj_type ktype_cache = {
  471. .sysfs_ops = &sysfs_ops,
  472. .default_attrs = default_attrs,
  473. };
  474. static struct kobj_type ktype_percpu_entry = {
  475. .sysfs_ops = &sysfs_ops,
  476. };
  477. static void cpuid4_cache_sysfs_exit(unsigned int cpu)
  478. {
  479. kfree(cache_kobject[cpu]);
  480. kfree(index_kobject[cpu]);
  481. cache_kobject[cpu] = NULL;
  482. index_kobject[cpu] = NULL;
  483. free_cache_attributes(cpu);
  484. }
  485. static int __cpuinit cpuid4_cache_sysfs_init(unsigned int cpu)
  486. {
  487. if (num_cache_leaves == 0)
  488. return -ENOENT;
  489. detect_cache_attributes(cpu);
  490. if (cpuid4_info[cpu] == NULL)
  491. return -ENOENT;
  492. /* Allocate all required memory */
  493. cache_kobject[cpu] = kmalloc(sizeof(struct kobject), GFP_KERNEL);
  494. if (unlikely(cache_kobject[cpu] == NULL))
  495. goto err_out;
  496. memset(cache_kobject[cpu], 0, sizeof(struct kobject));
  497. index_kobject[cpu] = kmalloc(
  498. sizeof(struct _index_kobject ) * num_cache_leaves, GFP_KERNEL);
  499. if (unlikely(index_kobject[cpu] == NULL))
  500. goto err_out;
  501. memset(index_kobject[cpu], 0,
  502. sizeof(struct _index_kobject) * num_cache_leaves);
  503. return 0;
  504. err_out:
  505. cpuid4_cache_sysfs_exit(cpu);
  506. return -ENOMEM;
  507. }
  508. /* Add/Remove cache interface for CPU device */
  509. static int __cpuinit cache_add_dev(struct sys_device * sys_dev)
  510. {
  511. unsigned int cpu = sys_dev->id;
  512. unsigned long i, j;
  513. struct _index_kobject *this_object;
  514. int retval = 0;
  515. retval = cpuid4_cache_sysfs_init(cpu);
  516. if (unlikely(retval < 0))
  517. return retval;
  518. cache_kobject[cpu]->parent = &sys_dev->kobj;
  519. kobject_set_name(cache_kobject[cpu], "%s", "cache");
  520. cache_kobject[cpu]->ktype = &ktype_percpu_entry;
  521. retval = kobject_register(cache_kobject[cpu]);
  522. for (i = 0; i < num_cache_leaves; i++) {
  523. this_object = INDEX_KOBJECT_PTR(cpu,i);
  524. this_object->cpu = cpu;
  525. this_object->index = i;
  526. this_object->kobj.parent = cache_kobject[cpu];
  527. kobject_set_name(&(this_object->kobj), "index%1lu", i);
  528. this_object->kobj.ktype = &ktype_cache;
  529. retval = kobject_register(&(this_object->kobj));
  530. if (unlikely(retval)) {
  531. for (j = 0; j < i; j++) {
  532. kobject_unregister(
  533. &(INDEX_KOBJECT_PTR(cpu,j)->kobj));
  534. }
  535. kobject_unregister(cache_kobject[cpu]);
  536. cpuid4_cache_sysfs_exit(cpu);
  537. break;
  538. }
  539. }
  540. return retval;
  541. }
  542. static void __cpuexit cache_remove_dev(struct sys_device * sys_dev)
  543. {
  544. unsigned int cpu = sys_dev->id;
  545. unsigned long i;
  546. for (i = 0; i < num_cache_leaves; i++) {
  547. cache_remove_shared_cpu_map(cpu, i);
  548. kobject_unregister(&(INDEX_KOBJECT_PTR(cpu,i)->kobj));
  549. }
  550. kobject_unregister(cache_kobject[cpu]);
  551. cpuid4_cache_sysfs_exit(cpu);
  552. return;
  553. }
  554. static int __cpuinit cacheinfo_cpu_callback(struct notifier_block *nfb,
  555. unsigned long action, void *hcpu)
  556. {
  557. unsigned int cpu = (unsigned long)hcpu;
  558. struct sys_device *sys_dev;
  559. sys_dev = get_cpu_sysdev(cpu);
  560. switch (action) {
  561. case CPU_ONLINE:
  562. cache_add_dev(sys_dev);
  563. break;
  564. case CPU_DEAD:
  565. cache_remove_dev(sys_dev);
  566. break;
  567. }
  568. return NOTIFY_OK;
  569. }
  570. static struct notifier_block cacheinfo_cpu_notifier =
  571. {
  572. .notifier_call = cacheinfo_cpu_callback,
  573. };
  574. static int __cpuinit cache_sysfs_init(void)
  575. {
  576. int i;
  577. if (num_cache_leaves == 0)
  578. return 0;
  579. register_cpu_notifier(&cacheinfo_cpu_notifier);
  580. for_each_online_cpu(i) {
  581. cacheinfo_cpu_callback(&cacheinfo_cpu_notifier, CPU_ONLINE,
  582. (void *)(long)i);
  583. }
  584. return 0;
  585. }
  586. device_initcall(cache_sysfs_init);
  587. #endif