h3600.c 22 KB

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  1. /*
  2. * Hardware definitions for Compaq iPAQ H3xxx Handheld Computers
  3. *
  4. * Copyright 2000,1 Compaq Computer Corporation.
  5. *
  6. * Use consistent with the GNU GPL is permitted,
  7. * provided that this copyright notice is
  8. * preserved in its entirety in all copies and derived works.
  9. *
  10. * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED,
  11. * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS
  12. * FITNESS FOR ANY PARTICULAR PURPOSE.
  13. *
  14. * Author: Jamey Hicks.
  15. *
  16. * History:
  17. *
  18. * 2001-10-?? Andrew Christian Added support for iPAQ H3800
  19. * and abstracted EGPIO interface.
  20. *
  21. */
  22. #include <linux/config.h>
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/kernel.h>
  26. #include <linux/tty.h>
  27. #include <linux/pm.h>
  28. #include <linux/device.h>
  29. #include <linux/mtd/mtd.h>
  30. #include <linux/mtd/partitions.h>
  31. #include <linux/serial_core.h>
  32. #include <asm/irq.h>
  33. #include <asm/hardware.h>
  34. #include <asm/mach-types.h>
  35. #include <asm/setup.h>
  36. #include <asm/mach/irq.h>
  37. #include <asm/mach/arch.h>
  38. #include <asm/mach/flash.h>
  39. #include <asm/mach/irda.h>
  40. #include <asm/mach/map.h>
  41. #include <asm/mach/serial_sa1100.h>
  42. #include <asm/arch/h3600.h>
  43. #if defined (CONFIG_SA1100_H3600) || defined (CONFIG_SA1100_H3100)
  44. #include <asm/arch/h3600_gpio.h>
  45. #endif
  46. #ifdef CONFIG_SA1100_H3800
  47. #include <asm/arch/h3600_asic.h>
  48. #endif
  49. #include "generic.h"
  50. struct ipaq_model_ops ipaq_model_ops;
  51. EXPORT_SYMBOL(ipaq_model_ops);
  52. static struct mtd_partition h3xxx_partitions[] = {
  53. {
  54. .name = "H3XXX boot firmware",
  55. .size = 0x00040000,
  56. .offset = 0,
  57. .mask_flags = MTD_WRITEABLE, /* force read-only */
  58. }, {
  59. #ifdef CONFIG_MTD_2PARTS_IPAQ
  60. .name = "H3XXX root jffs2",
  61. .size = MTDPART_SIZ_FULL,
  62. .offset = 0x00040000,
  63. #else
  64. .name = "H3XXX kernel",
  65. .size = 0x00080000,
  66. .offset = 0x00040000,
  67. }, {
  68. .name = "H3XXX params",
  69. .size = 0x00040000,
  70. .offset = 0x000C0000,
  71. }, {
  72. #ifdef CONFIG_JFFS2_FS
  73. .name = "H3XXX root jffs2",
  74. .size = MTDPART_SIZ_FULL,
  75. .offset = 0x00100000,
  76. #else
  77. .name = "H3XXX initrd",
  78. .size = 0x00100000,
  79. .offset = 0x00100000,
  80. }, {
  81. .name = "H3XXX root cramfs",
  82. .size = 0x00300000,
  83. .offset = 0x00200000,
  84. }, {
  85. .name = "H3XXX usr cramfs",
  86. .size = 0x00800000,
  87. .offset = 0x00500000,
  88. }, {
  89. .name = "H3XXX usr local",
  90. .size = MTDPART_SIZ_FULL,
  91. .offset = 0x00d00000,
  92. #endif
  93. #endif
  94. }
  95. };
  96. static void h3xxx_set_vpp(int vpp)
  97. {
  98. assign_h3600_egpio(IPAQ_EGPIO_VPP_ON, vpp);
  99. }
  100. static struct flash_platform_data h3xxx_flash_data = {
  101. .map_name = "cfi_probe",
  102. .set_vpp = h3xxx_set_vpp,
  103. .parts = h3xxx_partitions,
  104. .nr_parts = ARRAY_SIZE(h3xxx_partitions),
  105. };
  106. static struct resource h3xxx_flash_resource = {
  107. .start = SA1100_CS0_PHYS,
  108. .end = SA1100_CS0_PHYS + SZ_32M - 1,
  109. .flags = IORESOURCE_MEM,
  110. };
  111. /*
  112. * This turns the IRDA power on or off on the Compaq H3600
  113. */
  114. static int h3600_irda_set_power(struct device *dev, unsigned int state)
  115. {
  116. assign_h3600_egpio( IPAQ_EGPIO_IR_ON, state );
  117. return 0;
  118. }
  119. static void h3600_irda_set_speed(struct device *dev, unsigned int speed)
  120. {
  121. if (speed < 4000000) {
  122. clr_h3600_egpio(IPAQ_EGPIO_IR_FSEL);
  123. } else {
  124. set_h3600_egpio(IPAQ_EGPIO_IR_FSEL);
  125. }
  126. }
  127. static struct irda_platform_data h3600_irda_data = {
  128. .set_power = h3600_irda_set_power,
  129. .set_speed = h3600_irda_set_speed,
  130. };
  131. static void h3xxx_mach_init(void)
  132. {
  133. sa11x0_set_flash_data(&h3xxx_flash_data, &h3xxx_flash_resource, 1);
  134. sa11x0_set_irda_data(&h3600_irda_data);
  135. }
  136. /*
  137. * low-level UART features
  138. */
  139. static void h3600_uart_set_mctrl(struct uart_port *port, u_int mctrl)
  140. {
  141. if (port->mapbase == _Ser3UTCR0) {
  142. if (mctrl & TIOCM_RTS)
  143. GPCR = GPIO_H3600_COM_RTS;
  144. else
  145. GPSR = GPIO_H3600_COM_RTS;
  146. }
  147. }
  148. static u_int h3600_uart_get_mctrl(struct uart_port *port)
  149. {
  150. u_int ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
  151. if (port->mapbase == _Ser3UTCR0) {
  152. int gplr = GPLR;
  153. /* DCD and CTS bits are inverted in GPLR by RS232 transceiver */
  154. if (gplr & GPIO_H3600_COM_DCD)
  155. ret &= ~TIOCM_CD;
  156. if (gplr & GPIO_H3600_COM_CTS)
  157. ret &= ~TIOCM_CTS;
  158. }
  159. return ret;
  160. }
  161. static void h3600_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
  162. {
  163. if (port->mapbase == _Ser2UTCR0) { /* TODO: REMOVE THIS */
  164. assign_h3600_egpio(IPAQ_EGPIO_IR_ON, !state);
  165. } else if (port->mapbase == _Ser3UTCR0) {
  166. assign_h3600_egpio(IPAQ_EGPIO_RS232_ON, !state);
  167. }
  168. }
  169. /*
  170. * Enable/Disable wake up events for this serial port.
  171. * Obviously, we only support this on the normal COM port.
  172. */
  173. static int h3600_uart_set_wake(struct uart_port *port, u_int enable)
  174. {
  175. int err = -EINVAL;
  176. if (port->mapbase == _Ser3UTCR0) {
  177. if (enable)
  178. PWER |= PWER_GPIO23 | PWER_GPIO25; /* DCD and CTS */
  179. else
  180. PWER &= ~(PWER_GPIO23 | PWER_GPIO25); /* DCD and CTS */
  181. err = 0;
  182. }
  183. return err;
  184. }
  185. static struct sa1100_port_fns h3600_port_fns __initdata = {
  186. .set_mctrl = h3600_uart_set_mctrl,
  187. .get_mctrl = h3600_uart_get_mctrl,
  188. .pm = h3600_uart_pm,
  189. .set_wake = h3600_uart_set_wake,
  190. };
  191. /*
  192. * helper for sa1100fb
  193. */
  194. static void h3xxx_lcd_power(int enable)
  195. {
  196. assign_h3600_egpio(IPAQ_EGPIO_LCD_POWER, enable);
  197. }
  198. static struct map_desc h3600_io_desc[] __initdata = {
  199. { /* static memory bank 2 CS#2 */
  200. .virtual = H3600_BANK_2_VIRT,
  201. .pfn = __phys_to_pfn(SA1100_CS2_PHYS),
  202. .length = 0x02800000,
  203. .type = MT_DEVICE
  204. }, { /* static memory bank 4 CS#4 */
  205. .virtual = H3600_BANK_4_VIRT,
  206. .pfn = __phys_to_pfn(SA1100_CS4_PHYS),
  207. .length = 0x00800000,
  208. .type = MT_DEVICE
  209. }, { /* EGPIO 0 CS#5 */
  210. .virtual = H3600_EGPIO_VIRT,
  211. .pfn = __phys_to_pfn(H3600_EGPIO_PHYS),
  212. .length = 0x01000000,
  213. .type = MT_DEVICE
  214. }
  215. };
  216. /*
  217. * Common map_io initialization
  218. */
  219. static void __init h3xxx_map_io(void)
  220. {
  221. sa1100_map_io();
  222. iotable_init(h3600_io_desc, ARRAY_SIZE(h3600_io_desc));
  223. sa1100_register_uart_fns(&h3600_port_fns);
  224. sa1100_register_uart(0, 3); /* Common serial port */
  225. // sa1100_register_uart(1, 1); /* Microcontroller on 3100/3600 */
  226. /* Ensure those pins are outputs and driving low */
  227. PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
  228. PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
  229. /* Configure suspend conditions */
  230. PGSR = 0;
  231. PWER = PWER_GPIO0 | PWER_RTC;
  232. PCFR = PCFR_OPDE;
  233. PSDR = 0;
  234. sa1100fb_lcd_power = h3xxx_lcd_power;
  235. }
  236. static __inline__ void do_blank(int setp)
  237. {
  238. if (ipaq_model_ops.blank_callback)
  239. ipaq_model_ops.blank_callback(1-setp);
  240. }
  241. /************************* H3100 *************************/
  242. #ifdef CONFIG_SA1100_H3100
  243. #define H3100_EGPIO (*(volatile unsigned int *)H3600_EGPIO_VIRT)
  244. static unsigned int h3100_egpio = 0;
  245. static void h3100_control_egpio(enum ipaq_egpio_type x, int setp)
  246. {
  247. unsigned int egpio = 0;
  248. long gpio = 0;
  249. unsigned long flags;
  250. switch (x) {
  251. case IPAQ_EGPIO_LCD_POWER:
  252. egpio |= EGPIO_H3600_LCD_ON;
  253. gpio |= GPIO_H3100_LCD_3V_ON;
  254. do_blank(setp);
  255. break;
  256. case IPAQ_EGPIO_LCD_ENABLE:
  257. break;
  258. case IPAQ_EGPIO_CODEC_NRESET:
  259. egpio |= EGPIO_H3600_CODEC_NRESET;
  260. break;
  261. case IPAQ_EGPIO_AUDIO_ON:
  262. gpio |= GPIO_H3100_AUD_PWR_ON
  263. | GPIO_H3100_AUD_ON;
  264. break;
  265. case IPAQ_EGPIO_QMUTE:
  266. gpio |= GPIO_H3100_QMUTE;
  267. break;
  268. case IPAQ_EGPIO_OPT_NVRAM_ON:
  269. egpio |= EGPIO_H3600_OPT_NVRAM_ON;
  270. break;
  271. case IPAQ_EGPIO_OPT_ON:
  272. egpio |= EGPIO_H3600_OPT_ON;
  273. break;
  274. case IPAQ_EGPIO_CARD_RESET:
  275. egpio |= EGPIO_H3600_CARD_RESET;
  276. break;
  277. case IPAQ_EGPIO_OPT_RESET:
  278. egpio |= EGPIO_H3600_OPT_RESET;
  279. break;
  280. case IPAQ_EGPIO_IR_ON:
  281. gpio |= GPIO_H3100_IR_ON;
  282. break;
  283. case IPAQ_EGPIO_IR_FSEL:
  284. gpio |= GPIO_H3100_IR_FSEL;
  285. break;
  286. case IPAQ_EGPIO_RS232_ON:
  287. egpio |= EGPIO_H3600_RS232_ON;
  288. break;
  289. case IPAQ_EGPIO_VPP_ON:
  290. egpio |= EGPIO_H3600_VPP_ON;
  291. break;
  292. }
  293. if (egpio || gpio) {
  294. local_irq_save(flags);
  295. if (setp) {
  296. h3100_egpio |= egpio;
  297. GPSR = gpio;
  298. } else {
  299. h3100_egpio &= ~egpio;
  300. GPCR = gpio;
  301. }
  302. H3100_EGPIO = h3100_egpio;
  303. local_irq_restore(flags);
  304. }
  305. }
  306. static unsigned long h3100_read_egpio(void)
  307. {
  308. return h3100_egpio;
  309. }
  310. static int h3100_pm_callback(int req)
  311. {
  312. if (ipaq_model_ops.pm_callback_aux)
  313. return ipaq_model_ops.pm_callback_aux(req);
  314. return 0;
  315. }
  316. static struct ipaq_model_ops h3100_model_ops __initdata = {
  317. .generic_name = "3100",
  318. .control = h3100_control_egpio,
  319. .read = h3100_read_egpio,
  320. .pm_callback = h3100_pm_callback
  321. };
  322. #define H3100_DIRECT_EGPIO (GPIO_H3100_BT_ON \
  323. | GPIO_H3100_GPIO3 \
  324. | GPIO_H3100_QMUTE \
  325. | GPIO_H3100_LCD_3V_ON \
  326. | GPIO_H3100_AUD_ON \
  327. | GPIO_H3100_AUD_PWR_ON \
  328. | GPIO_H3100_IR_ON \
  329. | GPIO_H3100_IR_FSEL)
  330. static void __init h3100_map_io(void)
  331. {
  332. h3xxx_map_io();
  333. /* Initialize h3100-specific values here */
  334. GPCR = 0x0fffffff; /* All outputs are set low by default */
  335. GPDR = GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK |
  336. GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA |
  337. GPIO_H3600_CLK_SET1 | GPIO_H3600_CLK_SET0 |
  338. H3100_DIRECT_EGPIO;
  339. /* Older bootldrs put GPIO2-9 in alternate mode on the
  340. assumption that they are used for video */
  341. GAFR &= ~H3100_DIRECT_EGPIO;
  342. H3100_EGPIO = h3100_egpio;
  343. ipaq_model_ops = h3100_model_ops;
  344. }
  345. MACHINE_START(H3100, "Compaq iPAQ H3100")
  346. .phys_io = 0x80000000,
  347. .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
  348. .boot_params = 0xc0000100,
  349. .map_io = h3100_map_io,
  350. .init_irq = sa1100_init_irq,
  351. .timer = &sa1100_timer,
  352. .init_machine = h3xxx_mach_init,
  353. MACHINE_END
  354. #endif /* CONFIG_SA1100_H3100 */
  355. /************************* H3600 *************************/
  356. #ifdef CONFIG_SA1100_H3600
  357. #define H3600_EGPIO (*(volatile unsigned int *)H3600_EGPIO_VIRT)
  358. static unsigned int h3600_egpio = EGPIO_H3600_RS232_ON;
  359. static void h3600_control_egpio(enum ipaq_egpio_type x, int setp)
  360. {
  361. unsigned int egpio = 0;
  362. unsigned long flags;
  363. switch (x) {
  364. case IPAQ_EGPIO_LCD_POWER:
  365. egpio |= EGPIO_H3600_LCD_ON |
  366. EGPIO_H3600_LCD_PCI |
  367. EGPIO_H3600_LCD_5V_ON |
  368. EGPIO_H3600_LVDD_ON;
  369. do_blank(setp);
  370. break;
  371. case IPAQ_EGPIO_LCD_ENABLE:
  372. break;
  373. case IPAQ_EGPIO_CODEC_NRESET:
  374. egpio |= EGPIO_H3600_CODEC_NRESET;
  375. break;
  376. case IPAQ_EGPIO_AUDIO_ON:
  377. egpio |= EGPIO_H3600_AUD_AMP_ON |
  378. EGPIO_H3600_AUD_PWR_ON;
  379. break;
  380. case IPAQ_EGPIO_QMUTE:
  381. egpio |= EGPIO_H3600_QMUTE;
  382. break;
  383. case IPAQ_EGPIO_OPT_NVRAM_ON:
  384. egpio |= EGPIO_H3600_OPT_NVRAM_ON;
  385. break;
  386. case IPAQ_EGPIO_OPT_ON:
  387. egpio |= EGPIO_H3600_OPT_ON;
  388. break;
  389. case IPAQ_EGPIO_CARD_RESET:
  390. egpio |= EGPIO_H3600_CARD_RESET;
  391. break;
  392. case IPAQ_EGPIO_OPT_RESET:
  393. egpio |= EGPIO_H3600_OPT_RESET;
  394. break;
  395. case IPAQ_EGPIO_IR_ON:
  396. egpio |= EGPIO_H3600_IR_ON;
  397. break;
  398. case IPAQ_EGPIO_IR_FSEL:
  399. egpio |= EGPIO_H3600_IR_FSEL;
  400. break;
  401. case IPAQ_EGPIO_RS232_ON:
  402. egpio |= EGPIO_H3600_RS232_ON;
  403. break;
  404. case IPAQ_EGPIO_VPP_ON:
  405. egpio |= EGPIO_H3600_VPP_ON;
  406. break;
  407. }
  408. if (egpio) {
  409. local_irq_save(flags);
  410. if (setp)
  411. h3600_egpio |= egpio;
  412. else
  413. h3600_egpio &= ~egpio;
  414. H3600_EGPIO = h3600_egpio;
  415. local_irq_restore(flags);
  416. }
  417. }
  418. static unsigned long h3600_read_egpio(void)
  419. {
  420. return h3600_egpio;
  421. }
  422. static int h3600_pm_callback(int req)
  423. {
  424. if (ipaq_model_ops.pm_callback_aux)
  425. return ipaq_model_ops.pm_callback_aux(req);
  426. return 0;
  427. }
  428. static struct ipaq_model_ops h3600_model_ops __initdata = {
  429. .generic_name = "3600",
  430. .control = h3600_control_egpio,
  431. .read = h3600_read_egpio,
  432. .pm_callback = h3600_pm_callback
  433. };
  434. static void __init h3600_map_io(void)
  435. {
  436. h3xxx_map_io();
  437. /* Initialize h3600-specific values here */
  438. GPCR = 0x0fffffff; /* All outputs are set low by default */
  439. GPDR = GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK |
  440. GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA |
  441. GPIO_H3600_CLK_SET1 | GPIO_H3600_CLK_SET0 |
  442. GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 |
  443. GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8;
  444. H3600_EGPIO = h3600_egpio; /* Maintains across sleep? */
  445. ipaq_model_ops = h3600_model_ops;
  446. }
  447. MACHINE_START(H3600, "Compaq iPAQ H3600")
  448. .phys_io = 0x80000000,
  449. .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
  450. .boot_params = 0xc0000100,
  451. .map_io = h3600_map_io,
  452. .init_irq = sa1100_init_irq,
  453. .timer = &sa1100_timer,
  454. .init_machine = h3xxx_mach_init,
  455. MACHINE_END
  456. #endif /* CONFIG_SA1100_H3600 */
  457. #ifdef CONFIG_SA1100_H3800
  458. #define SET_ASIC1(x) \
  459. do {if (setp) { H3800_ASIC1_GPIO_OUT |= (x); } else { H3800_ASIC1_GPIO_OUT &= ~(x); }} while(0)
  460. #define SET_ASIC2(x) \
  461. do {if (setp) { H3800_ASIC2_GPIOPIOD |= (x); } else { H3800_ASIC2_GPIOPIOD &= ~(x); }} while(0)
  462. #define CLEAR_ASIC1(x) \
  463. do {if (setp) { H3800_ASIC1_GPIO_OUT &= ~(x); } else { H3800_ASIC1_GPIO_OUT |= (x); }} while(0)
  464. #define CLEAR_ASIC2(x) \
  465. do {if (setp) { H3800_ASIC2_GPIOPIOD &= ~(x); } else { H3800_ASIC2_GPIOPIOD |= (x); }} while(0)
  466. /*
  467. On screen enable, we get
  468. h3800_video_power_on(1)
  469. LCD controller starts
  470. h3800_video_lcd_enable(1)
  471. On screen disable, we get
  472. h3800_video_lcd_enable(0)
  473. LCD controller stops
  474. h3800_video_power_on(0)
  475. */
  476. static void h3800_video_power_on(int setp)
  477. {
  478. if (setp) {
  479. H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_ON;
  480. msleep(30);
  481. H3800_ASIC1_GPIO_OUT |= GPIO1_VGL_ON;
  482. msleep(5);
  483. H3800_ASIC1_GPIO_OUT |= GPIO1_VGH_ON;
  484. msleep(50);
  485. H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_5V_ON;
  486. msleep(5);
  487. } else {
  488. msleep(5);
  489. H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_5V_ON;
  490. msleep(50);
  491. H3800_ASIC1_GPIO_OUT &= ~GPIO1_VGL_ON;
  492. msleep(5);
  493. H3800_ASIC1_GPIO_OUT &= ~GPIO1_VGH_ON;
  494. msleep(100);
  495. H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_ON;
  496. }
  497. }
  498. static void h3800_video_lcd_enable(int setp)
  499. {
  500. if (setp) {
  501. msleep(17); // Wait one from before turning on
  502. H3800_ASIC1_GPIO_OUT |= GPIO1_LCD_PCI;
  503. } else {
  504. H3800_ASIC1_GPIO_OUT &= ~GPIO1_LCD_PCI;
  505. msleep(30); // Wait before turning off
  506. }
  507. }
  508. static void h3800_control_egpio(enum ipaq_egpio_type x, int setp)
  509. {
  510. switch (x) {
  511. case IPAQ_EGPIO_LCD_POWER:
  512. h3800_video_power_on(setp);
  513. break;
  514. case IPAQ_EGPIO_LCD_ENABLE:
  515. h3800_video_lcd_enable(setp);
  516. break;
  517. case IPAQ_EGPIO_CODEC_NRESET:
  518. case IPAQ_EGPIO_AUDIO_ON:
  519. case IPAQ_EGPIO_QMUTE:
  520. printk("%s: error - should not be called\n", __FUNCTION__);
  521. break;
  522. case IPAQ_EGPIO_OPT_NVRAM_ON:
  523. SET_ASIC2(GPIO2_OPT_ON_NVRAM);
  524. break;
  525. case IPAQ_EGPIO_OPT_ON:
  526. SET_ASIC2(GPIO2_OPT_ON);
  527. break;
  528. case IPAQ_EGPIO_CARD_RESET:
  529. SET_ASIC2(GPIO2_OPT_PCM_RESET);
  530. break;
  531. case IPAQ_EGPIO_OPT_RESET:
  532. SET_ASIC2(GPIO2_OPT_RESET);
  533. break;
  534. case IPAQ_EGPIO_IR_ON:
  535. CLEAR_ASIC1(GPIO1_IR_ON_N);
  536. break;
  537. case IPAQ_EGPIO_IR_FSEL:
  538. break;
  539. case IPAQ_EGPIO_RS232_ON:
  540. SET_ASIC1(GPIO1_RS232_ON);
  541. break;
  542. case IPAQ_EGPIO_VPP_ON:
  543. H3800_ASIC2_FlashWP_VPP_ON = setp;
  544. break;
  545. }
  546. }
  547. static unsigned long h3800_read_egpio(void)
  548. {
  549. return H3800_ASIC1_GPIO_OUT | (H3800_ASIC2_GPIOPIOD << 16);
  550. }
  551. /* We need to fix ASIC2 GPIO over suspend/resume. At the moment,
  552. it doesn't appear that ASIC1 GPIO has the same problem */
  553. static int h3800_pm_callback(int req)
  554. {
  555. static u16 asic1_data;
  556. static u16 asic2_data;
  557. int result = 0;
  558. printk("%s %d\n", __FUNCTION__, req);
  559. switch (req) {
  560. case PM_RESUME:
  561. MSC2 = (MSC2 & 0x0000ffff) | 0xE4510000; /* Set MSC2 correctly */
  562. H3800_ASIC2_GPIOPIOD = asic2_data;
  563. H3800_ASIC2_GPIODIR = GPIO2_PEN_IRQ
  564. | GPIO2_SD_DETECT
  565. | GPIO2_EAR_IN_N
  566. | GPIO2_USB_DETECT_N
  567. | GPIO2_SD_CON_SLT;
  568. H3800_ASIC1_GPIO_OUT = asic1_data;
  569. if (ipaq_model_ops.pm_callback_aux)
  570. result = ipaq_model_ops.pm_callback_aux(req);
  571. break;
  572. case PM_SUSPEND:
  573. if (ipaq_model_ops.pm_callback_aux &&
  574. ((result = ipaq_model_ops.pm_callback_aux(req)) != 0))
  575. return result;
  576. asic1_data = H3800_ASIC1_GPIO_OUT;
  577. asic2_data = H3800_ASIC2_GPIOPIOD;
  578. break;
  579. default:
  580. printk("%s: unrecognized PM callback\n", __FUNCTION__);
  581. break;
  582. }
  583. return result;
  584. }
  585. static struct ipaq_model_ops h3800_model_ops __initdata = {
  586. .generic_name = "3800",
  587. .control = h3800_control_egpio,
  588. .read = h3800_read_egpio,
  589. .pm_callback = h3800_pm_callback
  590. };
  591. #define MAX_ASIC_ISR_LOOPS 20
  592. /* The order of these is important - see #include <asm/arch/irqs.h> */
  593. static u32 kpio_irq_mask[] = {
  594. KPIO_KEY_ALL,
  595. KPIO_SPI_INT,
  596. KPIO_OWM_INT,
  597. KPIO_ADC_INT,
  598. KPIO_UART_0_INT,
  599. KPIO_UART_1_INT,
  600. KPIO_TIMER_0_INT,
  601. KPIO_TIMER_1_INT,
  602. KPIO_TIMER_2_INT
  603. };
  604. static u32 gpio_irq_mask[] = {
  605. GPIO2_PEN_IRQ,
  606. GPIO2_SD_DETECT,
  607. GPIO2_EAR_IN_N,
  608. GPIO2_USB_DETECT_N,
  609. GPIO2_SD_CON_SLT,
  610. };
  611. static void h3800_IRQ_demux(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
  612. {
  613. int i;
  614. if (0) printk("%s: interrupt received\n", __FUNCTION__);
  615. desc->chip->ack(irq);
  616. for (i = 0; i < MAX_ASIC_ISR_LOOPS && (GPLR & GPIO_H3800_ASIC); i++) {
  617. u32 irq;
  618. int j;
  619. /* KPIO */
  620. irq = H3800_ASIC2_KPIINTFLAG;
  621. if (0) printk("%s KPIO 0x%08X\n", __FUNCTION__, irq);
  622. for (j = 0; j < H3800_KPIO_IRQ_COUNT; j++)
  623. if (irq & kpio_irq_mask[j])
  624. do_edge_IRQ(H3800_KPIO_IRQ_COUNT + j, irq_desc + H3800_KPIO_IRQ_COUNT + j, regs);
  625. /* GPIO2 */
  626. irq = H3800_ASIC2_GPIINTFLAG;
  627. if (0) printk("%s GPIO 0x%08X\n", __FUNCTION__, irq);
  628. for (j = 0; j < H3800_GPIO_IRQ_COUNT; j++)
  629. if (irq & gpio_irq_mask[j])
  630. do_edge_IRQ(H3800_GPIO_IRQ_COUNT + j, irq_desc + H3800_GPIO_IRQ_COUNT + j , regs);
  631. }
  632. if (i >= MAX_ASIC_ISR_LOOPS)
  633. printk("%s: interrupt processing overrun\n", __FUNCTION__);
  634. /* For level-based interrupts */
  635. desc->chip->unmask(irq);
  636. }
  637. static struct irqaction h3800_irq = {
  638. .name = "h3800_asic",
  639. .handler = h3800_IRQ_demux,
  640. .flags = SA_INTERRUPT | SA_TIMER,
  641. };
  642. u32 kpio_int_shadow = 0;
  643. /* mask_ack <- IRQ is first serviced.
  644. mask <- IRQ is disabled.
  645. unmask <- IRQ is enabled
  646. The INTCLR registers are poorly documented. I believe that writing
  647. a "1" to the register clears the specific interrupt, but the documentation
  648. indicates writing a "0" clears the interrupt. In any case, they shouldn't
  649. be read (that's the INTFLAG register)
  650. */
  651. static void h3800_mask_ack_kpio_irq(unsigned int irq)
  652. {
  653. u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START];
  654. kpio_int_shadow &= ~mask;
  655. H3800_ASIC2_KPIINTSTAT = kpio_int_shadow;
  656. H3800_ASIC2_KPIINTCLR = mask;
  657. }
  658. static void h3800_mask_kpio_irq(unsigned int irq)
  659. {
  660. u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START];
  661. kpio_int_shadow &= ~mask;
  662. H3800_ASIC2_KPIINTSTAT = kpio_int_shadow;
  663. }
  664. static void h3800_unmask_kpio_irq(unsigned int irq)
  665. {
  666. u32 mask = kpio_irq_mask[irq - H3800_KPIO_IRQ_START];
  667. kpio_int_shadow |= mask;
  668. H3800_ASIC2_KPIINTSTAT = kpio_int_shadow;
  669. }
  670. static void h3800_mask_ack_gpio_irq(unsigned int irq)
  671. {
  672. u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START];
  673. H3800_ASIC2_GPIINTSTAT &= ~mask;
  674. H3800_ASIC2_GPIINTCLR = mask;
  675. }
  676. static void h3800_mask_gpio_irq(unsigned int irq)
  677. {
  678. u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START];
  679. H3800_ASIC2_GPIINTSTAT &= ~mask;
  680. }
  681. static void h3800_unmask_gpio_irq(unsigned int irq)
  682. {
  683. u32 mask = gpio_irq_mask[irq - H3800_GPIO_IRQ_START];
  684. H3800_ASIC2_GPIINTSTAT |= mask;
  685. }
  686. static void __init h3800_init_irq(void)
  687. {
  688. int i;
  689. /* Initialize standard IRQs */
  690. sa1100_init_irq();
  691. /* Disable all IRQs and set up clock */
  692. H3800_ASIC2_KPIINTSTAT = 0; /* Disable all interrupts */
  693. H3800_ASIC2_GPIINTSTAT = 0;
  694. H3800_ASIC2_KPIINTCLR = 0; /* Clear all KPIO interrupts */
  695. H3800_ASIC2_GPIINTCLR = 0; /* Clear all GPIO interrupts */
  696. // H3800_ASIC2_KPIINTCLR = 0xffff; /* Clear all KPIO interrupts */
  697. // H3800_ASIC2_GPIINTCLR = 0xffff; /* Clear all GPIO interrupts */
  698. H3800_ASIC2_CLOCK_Enable |= ASIC2_CLOCK_EX0; /* 32 kHZ crystal on */
  699. H3800_ASIC2_INTR_ClockPrescale |= ASIC2_INTCPS_SET;
  700. H3800_ASIC2_INTR_ClockPrescale = ASIC2_INTCPS_CPS(0x0e) | ASIC2_INTCPS_SET;
  701. H3800_ASIC2_INTR_TimerSet = 1;
  702. #if 0
  703. for (i = 0; i < H3800_KPIO_IRQ_COUNT; i++) {
  704. int irq = i + H3800_KPIO_IRQ_START;
  705. irq_desc[irq].valid = 1;
  706. irq_desc[irq].probe_ok = 1;
  707. set_irq_chip(irq, &h3800_kpio_irqchip);
  708. }
  709. for (i = 0; i < H3800_GPIO_IRQ_COUNT; i++) {
  710. int irq = i + H3800_GPIO_IRQ_START;
  711. irq_desc[irq].valid = 1;
  712. irq_desc[irq].probe_ok = 1;
  713. set_irq_chip(irq, &h3800_gpio_irqchip);
  714. }
  715. #endif
  716. set_irq_type(IRQ_GPIO_H3800_ASIC, IRQT_RISING);
  717. set_irq_chained_handler(IRQ_GPIO_H3800_ASIC, &h3800_IRQ_demux);
  718. }
  719. #define ASIC1_OUTPUTS 0x7fff /* First 15 bits are used */
  720. static void __init h3800_map_io(void)
  721. {
  722. h3xxx_map_io();
  723. /* Add wakeup on AC plug/unplug */
  724. PWER |= PWER_GPIO12;
  725. /* Initialize h3800-specific values here */
  726. GPCR = 0x0fffffff; /* All outputs are set low by default */
  727. GAFR = GPIO_H3800_CLK_OUT |
  728. GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 |
  729. GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8;
  730. GPDR = GPIO_H3800_CLK_OUT |
  731. GPIO_H3600_COM_RTS | GPIO_H3600_L3_CLOCK |
  732. GPIO_H3600_L3_MODE | GPIO_H3600_L3_DATA |
  733. GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12 |
  734. GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8;
  735. TUCR = TUCR_3_6864MHz; /* Seems to be used only for the Bluetooth UART */
  736. /* Fix the memory bus */
  737. MSC2 = (MSC2 & 0x0000ffff) | 0xE4510000;
  738. /* Set up ASIC #1 */
  739. H3800_ASIC1_GPIO_DIR = ASIC1_OUTPUTS; /* All outputs */
  740. H3800_ASIC1_GPIO_MASK = ASIC1_OUTPUTS; /* No interrupts */
  741. H3800_ASIC1_GPIO_SLEEP_MASK = ASIC1_OUTPUTS;
  742. H3800_ASIC1_GPIO_SLEEP_DIR = ASIC1_OUTPUTS;
  743. H3800_ASIC1_GPIO_SLEEP_OUT = GPIO1_EAR_ON_N;
  744. H3800_ASIC1_GPIO_BATT_FAULT_DIR = ASIC1_OUTPUTS;
  745. H3800_ASIC1_GPIO_BATT_FAULT_OUT = GPIO1_EAR_ON_N;
  746. H3800_ASIC1_GPIO_OUT = GPIO1_IR_ON_N
  747. | GPIO1_RS232_ON
  748. | GPIO1_EAR_ON_N;
  749. /* Set up ASIC #2 */
  750. H3800_ASIC2_GPIOPIOD = GPIO2_IN_Y1_N | GPIO2_IN_X1_N;
  751. H3800_ASIC2_GPOBFSTAT = GPIO2_IN_Y1_N | GPIO2_IN_X1_N;
  752. H3800_ASIC2_GPIODIR = GPIO2_PEN_IRQ
  753. | GPIO2_SD_DETECT
  754. | GPIO2_EAR_IN_N
  755. | GPIO2_USB_DETECT_N
  756. | GPIO2_SD_CON_SLT;
  757. /* TODO : Set sleep states & battery fault states */
  758. /* Clear VPP Enable */
  759. H3800_ASIC2_FlashWP_VPP_ON = 0;
  760. ipaq_model_ops = h3800_model_ops;
  761. }
  762. MACHINE_START(H3800, "Compaq iPAQ H3800")
  763. .phys_io = 0x80000000,
  764. .io_pg_offst = ((0xf8000000) >> 18) & 0xfffc,
  765. .boot_params = 0xc0000100,
  766. .map_io = h3800_map_io,
  767. .init_irq = h3800_init_irq,
  768. .timer = &sa1100_timer,
  769. .init_machine = h3xxx_mach_init,
  770. MACHINE_END
  771. #endif /* CONFIG_SA1100_H3800 */