gpio.c 4.3 KB

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  1. /* linux/arch/arm/mach-s3c2410/gpio.c
  2. *
  3. * Copyright (c) 2004-2005 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2410 GPIO support
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. * Changelog
  23. * 13-Sep-2004 BJD Implemented change of MISCCR
  24. * 14-Sep-2004 BJD Added getpin call
  25. * 14-Sep-2004 BJD Fixed bug in setpin() call
  26. * 30-Sep-2004 BJD Fixed cfgpin() mask bug
  27. * 01-Oct-2004 BJD Added getcfg() to get pin configuration
  28. * 01-Oct-2004 BJD Fixed mask bug in pullup() call
  29. * 01-Oct-2004 BJD Added getirq() to turn pin into irqno
  30. * 04-Oct-2004 BJD Added irq filter controls for GPIO
  31. * 05-Nov-2004 BJD EXPORT_SYMBOL() added for all code
  32. * 13-Mar-2005 BJD Updates for __iomem
  33. * 26-Oct-2005 BJD Added generic configuration types
  34. * 15-Jan-2006 LCVR Added support for the S3C2400
  35. */
  36. #include <linux/kernel.h>
  37. #include <linux/init.h>
  38. #include <linux/module.h>
  39. #include <linux/interrupt.h>
  40. #include <linux/ioport.h>
  41. #include <asm/hardware.h>
  42. #include <asm/irq.h>
  43. #include <asm/io.h>
  44. #include <asm/arch/regs-gpio.h>
  45. void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
  46. {
  47. void __iomem *base = S3C24XX_GPIO_BASE(pin);
  48. unsigned long mask;
  49. unsigned long con;
  50. unsigned long flags;
  51. if (pin < S3C2410_GPIO_BANKB) {
  52. mask = 1 << S3C2410_GPIO_OFFSET(pin);
  53. } else {
  54. mask = 3 << S3C2410_GPIO_OFFSET(pin)*2;
  55. }
  56. switch (function) {
  57. case S3C2410_GPIO_LEAVE:
  58. mask = 0;
  59. function = 0;
  60. break;
  61. case S3C2410_GPIO_INPUT:
  62. case S3C2410_GPIO_OUTPUT:
  63. case S3C2410_GPIO_SFN2:
  64. case S3C2410_GPIO_SFN3:
  65. if (pin < S3C2410_GPIO_BANKB) {
  66. function &= 1;
  67. function <<= S3C2410_GPIO_OFFSET(pin);
  68. } else {
  69. function &= 3;
  70. function <<= S3C2410_GPIO_OFFSET(pin)*2;
  71. }
  72. }
  73. /* modify the specified register wwith IRQs off */
  74. local_irq_save(flags);
  75. con = __raw_readl(base + 0x00);
  76. con &= ~mask;
  77. con |= function;
  78. __raw_writel(con, base + 0x00);
  79. local_irq_restore(flags);
  80. }
  81. EXPORT_SYMBOL(s3c2410_gpio_cfgpin);
  82. unsigned int s3c2410_gpio_getcfg(unsigned int pin)
  83. {
  84. void __iomem *base = S3C24XX_GPIO_BASE(pin);
  85. unsigned long mask;
  86. if (pin < S3C2410_GPIO_BANKB) {
  87. mask = 1 << S3C2410_GPIO_OFFSET(pin);
  88. } else {
  89. mask = 3 << S3C2410_GPIO_OFFSET(pin)*2;
  90. }
  91. return __raw_readl(base) & mask;
  92. }
  93. EXPORT_SYMBOL(s3c2410_gpio_getcfg);
  94. void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
  95. {
  96. void __iomem *base = S3C24XX_GPIO_BASE(pin);
  97. unsigned long offs = S3C2410_GPIO_OFFSET(pin);
  98. unsigned long flags;
  99. unsigned long up;
  100. if (pin < S3C2410_GPIO_BANKB)
  101. return;
  102. local_irq_save(flags);
  103. up = __raw_readl(base + 0x08);
  104. up &= ~(1L << offs);
  105. up |= to << offs;
  106. __raw_writel(up, base + 0x08);
  107. local_irq_restore(flags);
  108. }
  109. EXPORT_SYMBOL(s3c2410_gpio_pullup);
  110. void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
  111. {
  112. void __iomem *base = S3C24XX_GPIO_BASE(pin);
  113. unsigned long offs = S3C2410_GPIO_OFFSET(pin);
  114. unsigned long flags;
  115. unsigned long dat;
  116. local_irq_save(flags);
  117. dat = __raw_readl(base + 0x04);
  118. dat &= ~(1 << offs);
  119. dat |= to << offs;
  120. __raw_writel(dat, base + 0x04);
  121. local_irq_restore(flags);
  122. }
  123. EXPORT_SYMBOL(s3c2410_gpio_setpin);
  124. unsigned int s3c2410_gpio_getpin(unsigned int pin)
  125. {
  126. void __iomem *base = S3C24XX_GPIO_BASE(pin);
  127. unsigned long offs = S3C2410_GPIO_OFFSET(pin);
  128. return __raw_readl(base + 0x04) & (1<< offs);
  129. }
  130. EXPORT_SYMBOL(s3c2410_gpio_getpin);
  131. unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change)
  132. {
  133. unsigned long flags;
  134. unsigned long misccr;
  135. local_irq_save(flags);
  136. misccr = __raw_readl(S3C24XX_MISCCR);
  137. misccr &= ~clear;
  138. misccr ^= change;
  139. __raw_writel(misccr, S3C24XX_MISCCR);
  140. local_irq_restore(flags);
  141. return misccr;
  142. }
  143. EXPORT_SYMBOL(s3c2410_modify_misccr);