devs.c 10 KB

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  1. /* linux/arch/arm/mach-s3c2410/devs.c
  2. *
  3. * Copyright (c) 2004 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Base S3C2410 platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * Modifications:
  13. * 15-Jan-2006 LCVR Using S3C24XX_PA_##x macro for common S3C24XX devices
  14. * 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ}
  15. * 10-Feb-2005 BJD Added camera from guillaume.gourat@nexvision.tv
  16. * 29-Aug-2004 BJD Added timers 0 through 3
  17. * 29-Aug-2004 BJD Changed index of devices we only have one of to -1
  18. * 21-Aug-2004 BJD Added IRQ_TICK to RTC resources
  19. * 18-Aug-2004 BJD Created initial version
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/types.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/list.h>
  25. #include <linux/timer.h>
  26. #include <linux/init.h>
  27. #include <linux/platform_device.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/map.h>
  30. #include <asm/mach/irq.h>
  31. #include <asm/arch/fb.h>
  32. #include <asm/hardware.h>
  33. #include <asm/io.h>
  34. #include <asm/irq.h>
  35. #include <asm/arch/regs-serial.h>
  36. #include "devs.h"
  37. /* Serial port registrations */
  38. struct platform_device *s3c24xx_uart_devs[3];
  39. /* USB Host Controller */
  40. static struct resource s3c_usb_resource[] = {
  41. [0] = {
  42. .start = S3C24XX_PA_USBHOST,
  43. .end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
  44. .flags = IORESOURCE_MEM,
  45. },
  46. [1] = {
  47. .start = IRQ_USBH,
  48. .end = IRQ_USBH,
  49. .flags = IORESOURCE_IRQ,
  50. }
  51. };
  52. static u64 s3c_device_usb_dmamask = 0xffffffffUL;
  53. struct platform_device s3c_device_usb = {
  54. .name = "s3c2410-ohci",
  55. .id = -1,
  56. .num_resources = ARRAY_SIZE(s3c_usb_resource),
  57. .resource = s3c_usb_resource,
  58. .dev = {
  59. .dma_mask = &s3c_device_usb_dmamask,
  60. .coherent_dma_mask = 0xffffffffUL
  61. }
  62. };
  63. EXPORT_SYMBOL(s3c_device_usb);
  64. /* LCD Controller */
  65. static struct resource s3c_lcd_resource[] = {
  66. [0] = {
  67. .start = S3C24XX_PA_LCD,
  68. .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
  69. .flags = IORESOURCE_MEM,
  70. },
  71. [1] = {
  72. .start = IRQ_LCD,
  73. .end = IRQ_LCD,
  74. .flags = IORESOURCE_IRQ,
  75. }
  76. };
  77. static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
  78. struct platform_device s3c_device_lcd = {
  79. .name = "s3c2410-lcd",
  80. .id = -1,
  81. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  82. .resource = s3c_lcd_resource,
  83. .dev = {
  84. .dma_mask = &s3c_device_lcd_dmamask,
  85. .coherent_dma_mask = 0xffffffffUL
  86. }
  87. };
  88. EXPORT_SYMBOL(s3c_device_lcd);
  89. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  90. {
  91. struct s3c2410fb_mach_info *npd;
  92. npd = kmalloc(sizeof(*npd), GFP_KERNEL);
  93. if (npd) {
  94. memcpy(npd, pd, sizeof(*npd));
  95. s3c_device_lcd.dev.platform_data = npd;
  96. } else {
  97. printk(KERN_ERR "no memory for LCD platform data\n");
  98. }
  99. }
  100. /* NAND Controller */
  101. static struct resource s3c_nand_resource[] = {
  102. [0] = {
  103. .start = S3C2410_PA_NAND,
  104. .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND - 1,
  105. .flags = IORESOURCE_MEM,
  106. }
  107. };
  108. struct platform_device s3c_device_nand = {
  109. .name = "s3c2410-nand",
  110. .id = -1,
  111. .num_resources = ARRAY_SIZE(s3c_nand_resource),
  112. .resource = s3c_nand_resource,
  113. };
  114. EXPORT_SYMBOL(s3c_device_nand);
  115. /* USB Device (Gadget)*/
  116. static struct resource s3c_usbgadget_resource[] = {
  117. [0] = {
  118. .start = S3C24XX_PA_USBDEV,
  119. .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
  120. .flags = IORESOURCE_MEM,
  121. },
  122. [1] = {
  123. .start = IRQ_USBD,
  124. .end = IRQ_USBD,
  125. .flags = IORESOURCE_IRQ,
  126. }
  127. };
  128. struct platform_device s3c_device_usbgadget = {
  129. .name = "s3c2410-usbgadget",
  130. .id = -1,
  131. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  132. .resource = s3c_usbgadget_resource,
  133. };
  134. EXPORT_SYMBOL(s3c_device_usbgadget);
  135. /* Watchdog */
  136. static struct resource s3c_wdt_resource[] = {
  137. [0] = {
  138. .start = S3C24XX_PA_WATCHDOG,
  139. .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
  140. .flags = IORESOURCE_MEM,
  141. },
  142. [1] = {
  143. .start = IRQ_WDT,
  144. .end = IRQ_WDT,
  145. .flags = IORESOURCE_IRQ,
  146. }
  147. };
  148. struct platform_device s3c_device_wdt = {
  149. .name = "s3c2410-wdt",
  150. .id = -1,
  151. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  152. .resource = s3c_wdt_resource,
  153. };
  154. EXPORT_SYMBOL(s3c_device_wdt);
  155. /* I2C */
  156. static struct resource s3c_i2c_resource[] = {
  157. [0] = {
  158. .start = S3C24XX_PA_IIC,
  159. .end = S3C24XX_PA_IIC + S3C24XX_SZ_IIC - 1,
  160. .flags = IORESOURCE_MEM,
  161. },
  162. [1] = {
  163. .start = IRQ_IIC,
  164. .end = IRQ_IIC,
  165. .flags = IORESOURCE_IRQ,
  166. }
  167. };
  168. struct platform_device s3c_device_i2c = {
  169. .name = "s3c2410-i2c",
  170. .id = -1,
  171. .num_resources = ARRAY_SIZE(s3c_i2c_resource),
  172. .resource = s3c_i2c_resource,
  173. };
  174. EXPORT_SYMBOL(s3c_device_i2c);
  175. /* IIS */
  176. static struct resource s3c_iis_resource[] = {
  177. [0] = {
  178. .start = S3C24XX_PA_IIS,
  179. .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
  180. .flags = IORESOURCE_MEM,
  181. }
  182. };
  183. static u64 s3c_device_iis_dmamask = 0xffffffffUL;
  184. struct platform_device s3c_device_iis = {
  185. .name = "s3c2410-iis",
  186. .id = -1,
  187. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  188. .resource = s3c_iis_resource,
  189. .dev = {
  190. .dma_mask = &s3c_device_iis_dmamask,
  191. .coherent_dma_mask = 0xffffffffUL
  192. }
  193. };
  194. EXPORT_SYMBOL(s3c_device_iis);
  195. /* RTC */
  196. static struct resource s3c_rtc_resource[] = {
  197. [0] = {
  198. .start = S3C24XX_PA_RTC,
  199. .end = S3C24XX_PA_RTC + 0xff,
  200. .flags = IORESOURCE_MEM,
  201. },
  202. [1] = {
  203. .start = IRQ_RTC,
  204. .end = IRQ_RTC,
  205. .flags = IORESOURCE_IRQ,
  206. },
  207. [2] = {
  208. .start = IRQ_TICK,
  209. .end = IRQ_TICK,
  210. .flags = IORESOURCE_IRQ
  211. }
  212. };
  213. struct platform_device s3c_device_rtc = {
  214. .name = "s3c2410-rtc",
  215. .id = -1,
  216. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  217. .resource = s3c_rtc_resource,
  218. };
  219. EXPORT_SYMBOL(s3c_device_rtc);
  220. /* ADC */
  221. static struct resource s3c_adc_resource[] = {
  222. [0] = {
  223. .start = S3C24XX_PA_ADC,
  224. .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
  225. .flags = IORESOURCE_MEM,
  226. },
  227. [1] = {
  228. .start = IRQ_TC,
  229. .end = IRQ_TC,
  230. .flags = IORESOURCE_IRQ,
  231. },
  232. [2] = {
  233. .start = IRQ_ADC,
  234. .end = IRQ_ADC,
  235. .flags = IORESOURCE_IRQ,
  236. }
  237. };
  238. struct platform_device s3c_device_adc = {
  239. .name = "s3c2410-adc",
  240. .id = -1,
  241. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  242. .resource = s3c_adc_resource,
  243. };
  244. /* SDI */
  245. static struct resource s3c_sdi_resource[] = {
  246. [0] = {
  247. .start = S3C2410_PA_SDI,
  248. .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
  249. .flags = IORESOURCE_MEM,
  250. },
  251. [1] = {
  252. .start = IRQ_SDI,
  253. .end = IRQ_SDI,
  254. .flags = IORESOURCE_IRQ,
  255. }
  256. };
  257. struct platform_device s3c_device_sdi = {
  258. .name = "s3c2410-sdi",
  259. .id = -1,
  260. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  261. .resource = s3c_sdi_resource,
  262. };
  263. EXPORT_SYMBOL(s3c_device_sdi);
  264. /* SPI (0) */
  265. static struct resource s3c_spi0_resource[] = {
  266. [0] = {
  267. .start = S3C24XX_PA_SPI,
  268. .end = S3C24XX_PA_SPI + 0x1f,
  269. .flags = IORESOURCE_MEM,
  270. },
  271. [1] = {
  272. .start = IRQ_SPI0,
  273. .end = IRQ_SPI0,
  274. .flags = IORESOURCE_IRQ,
  275. }
  276. };
  277. static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
  278. struct platform_device s3c_device_spi0 = {
  279. .name = "s3c2410-spi",
  280. .id = 0,
  281. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  282. .resource = s3c_spi0_resource,
  283. .dev = {
  284. .dma_mask = &s3c_device_spi0_dmamask,
  285. .coherent_dma_mask = 0xffffffffUL
  286. }
  287. };
  288. EXPORT_SYMBOL(s3c_device_spi0);
  289. /* SPI (1) */
  290. static struct resource s3c_spi1_resource[] = {
  291. [0] = {
  292. .start = S3C24XX_PA_SPI + 0x20,
  293. .end = S3C24XX_PA_SPI + 0x20 + 0x1f,
  294. .flags = IORESOURCE_MEM,
  295. },
  296. [1] = {
  297. .start = IRQ_SPI1,
  298. .end = IRQ_SPI1,
  299. .flags = IORESOURCE_IRQ,
  300. }
  301. };
  302. static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
  303. struct platform_device s3c_device_spi1 = {
  304. .name = "s3c2410-spi",
  305. .id = 1,
  306. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  307. .resource = s3c_spi1_resource,
  308. .dev = {
  309. .dma_mask = &s3c_device_spi1_dmamask,
  310. .coherent_dma_mask = 0xffffffffUL
  311. }
  312. };
  313. EXPORT_SYMBOL(s3c_device_spi1);
  314. /* pwm timer blocks */
  315. static struct resource s3c_timer0_resource[] = {
  316. [0] = {
  317. .start = S3C24XX_PA_TIMER + 0x0C,
  318. .end = S3C24XX_PA_TIMER + 0x0C + 0xB,
  319. .flags = IORESOURCE_MEM,
  320. },
  321. [1] = {
  322. .start = IRQ_TIMER0,
  323. .end = IRQ_TIMER0,
  324. .flags = IORESOURCE_IRQ,
  325. }
  326. };
  327. struct platform_device s3c_device_timer0 = {
  328. .name = "s3c2410-timer",
  329. .id = 0,
  330. .num_resources = ARRAY_SIZE(s3c_timer0_resource),
  331. .resource = s3c_timer0_resource,
  332. };
  333. EXPORT_SYMBOL(s3c_device_timer0);
  334. /* timer 1 */
  335. static struct resource s3c_timer1_resource[] = {
  336. [0] = {
  337. .start = S3C24XX_PA_TIMER + 0x18,
  338. .end = S3C24XX_PA_TIMER + 0x23,
  339. .flags = IORESOURCE_MEM,
  340. },
  341. [1] = {
  342. .start = IRQ_TIMER1,
  343. .end = IRQ_TIMER1,
  344. .flags = IORESOURCE_IRQ,
  345. }
  346. };
  347. struct platform_device s3c_device_timer1 = {
  348. .name = "s3c2410-timer",
  349. .id = 1,
  350. .num_resources = ARRAY_SIZE(s3c_timer1_resource),
  351. .resource = s3c_timer1_resource,
  352. };
  353. EXPORT_SYMBOL(s3c_device_timer1);
  354. /* timer 2 */
  355. static struct resource s3c_timer2_resource[] = {
  356. [0] = {
  357. .start = S3C24XX_PA_TIMER + 0x24,
  358. .end = S3C24XX_PA_TIMER + 0x2F,
  359. .flags = IORESOURCE_MEM,
  360. },
  361. [1] = {
  362. .start = IRQ_TIMER2,
  363. .end = IRQ_TIMER2,
  364. .flags = IORESOURCE_IRQ,
  365. }
  366. };
  367. struct platform_device s3c_device_timer2 = {
  368. .name = "s3c2410-timer",
  369. .id = 2,
  370. .num_resources = ARRAY_SIZE(s3c_timer2_resource),
  371. .resource = s3c_timer2_resource,
  372. };
  373. EXPORT_SYMBOL(s3c_device_timer2);
  374. /* timer 3 */
  375. static struct resource s3c_timer3_resource[] = {
  376. [0] = {
  377. .start = S3C24XX_PA_TIMER + 0x30,
  378. .end = S3C24XX_PA_TIMER + 0x3B,
  379. .flags = IORESOURCE_MEM,
  380. },
  381. [1] = {
  382. .start = IRQ_TIMER3,
  383. .end = IRQ_TIMER3,
  384. .flags = IORESOURCE_IRQ,
  385. }
  386. };
  387. struct platform_device s3c_device_timer3 = {
  388. .name = "s3c2410-timer",
  389. .id = 3,
  390. .num_resources = ARRAY_SIZE(s3c_timer3_resource),
  391. .resource = s3c_timer3_resource,
  392. };
  393. EXPORT_SYMBOL(s3c_device_timer3);
  394. #ifdef CONFIG_CPU_S3C2440
  395. /* Camif Controller */
  396. static struct resource s3c_camif_resource[] = {
  397. [0] = {
  398. .start = S3C2440_PA_CAMIF,
  399. .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
  400. .flags = IORESOURCE_MEM,
  401. },
  402. [1] = {
  403. .start = IRQ_CAM,
  404. .end = IRQ_CAM,
  405. .flags = IORESOURCE_IRQ,
  406. }
  407. };
  408. static u64 s3c_device_camif_dmamask = 0xffffffffUL;
  409. struct platform_device s3c_device_camif = {
  410. .name = "s3c2440-camif",
  411. .id = -1,
  412. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  413. .resource = s3c_camif_resource,
  414. .dev = {
  415. .dma_mask = &s3c_device_camif_dmamask,
  416. .coherent_dma_mask = 0xffffffffUL
  417. }
  418. };
  419. EXPORT_SYMBOL(s3c_device_camif);
  420. #endif // CONFIG_CPU_S32440