pxa25x.c 3.2 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/pxa25x.c
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: Jun 15, 2001
  6. * Copyright: MontaVista Software Inc.
  7. *
  8. * Code specific to PXA21x/25x/26x variants.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * Since this file should be linked before any other machine specific file,
  15. * the __initcall() here will be executed first. This serves as default
  16. * initialization stuff for PXA machines which can be overridden later if
  17. * need be.
  18. */
  19. #include <linux/config.h>
  20. #include <linux/module.h>
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/pm.h>
  24. #include <asm/hardware.h>
  25. #include <asm/arch/pxa-regs.h>
  26. #include "generic.h"
  27. /*
  28. * Various clock factors driven by the CCCR register.
  29. */
  30. /* Crystal Frequency to Memory Frequency Multiplier (L) */
  31. static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, };
  32. /* Memory Frequency to Run Mode Frequency Multiplier (M) */
  33. static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 };
  34. /* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
  35. /* Note: we store the value N * 2 here. */
  36. static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 };
  37. /* Crystal clock */
  38. #define BASE_CLK 3686400
  39. /*
  40. * Get the clock frequency as reflected by CCCR and the turbo flag.
  41. * We assume these values have been applied via a fcs.
  42. * If info is not 0 we also display the current settings.
  43. */
  44. unsigned int get_clk_frequency_khz(int info)
  45. {
  46. unsigned long cccr, turbo;
  47. unsigned int l, L, m, M, n2, N;
  48. cccr = CCCR;
  49. asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (turbo) );
  50. l = L_clk_mult[(cccr >> 0) & 0x1f];
  51. m = M_clk_mult[(cccr >> 5) & 0x03];
  52. n2 = N2_clk_mult[(cccr >> 7) & 0x07];
  53. L = l * BASE_CLK;
  54. M = m * L;
  55. N = n2 * M / 2;
  56. if(info)
  57. {
  58. L += 5000;
  59. printk( KERN_INFO "Memory clock: %d.%02dMHz (*%d)\n",
  60. L / 1000000, (L % 1000000) / 10000, l );
  61. M += 5000;
  62. printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
  63. M / 1000000, (M % 1000000) / 10000, m );
  64. N += 5000;
  65. printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
  66. N / 1000000, (N % 1000000) / 10000, n2 / 2, (n2 % 2) * 5,
  67. (turbo & 1) ? "" : "in" );
  68. }
  69. return (turbo & 1) ? (N/1000) : (M/1000);
  70. }
  71. EXPORT_SYMBOL(get_clk_frequency_khz);
  72. /*
  73. * Return the current memory clock frequency in units of 10kHz
  74. */
  75. unsigned int get_memclk_frequency_10khz(void)
  76. {
  77. return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000;
  78. }
  79. EXPORT_SYMBOL(get_memclk_frequency_10khz);
  80. /*
  81. * Return the current LCD clock frequency in units of 10kHz
  82. */
  83. unsigned int get_lcdclk_frequency_10khz(void)
  84. {
  85. return get_memclk_frequency_10khz();
  86. }
  87. EXPORT_SYMBOL(get_lcdclk_frequency_10khz);
  88. #ifdef CONFIG_PM
  89. int pxa_cpu_pm_prepare(suspend_state_t state)
  90. {
  91. switch (state) {
  92. case PM_SUSPEND_MEM:
  93. break;
  94. default:
  95. return -EINVAL;
  96. }
  97. return 0;
  98. }
  99. void pxa_cpu_pm_enter(suspend_state_t state)
  100. {
  101. extern void pxa_cpu_suspend(unsigned int);
  102. extern void pxa_cpu_resume(void);
  103. CKEN = 0;
  104. switch (state) {
  105. case PM_SUSPEND_MEM:
  106. /* set resume return address */
  107. PSPR = virt_to_phys(pxa_cpu_resume);
  108. pxa_cpu_suspend(PWRMODE_SLEEP);
  109. break;
  110. }
  111. }
  112. #endif