iop331-time.c 2.4 KB

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  1. /*
  2. * arch/arm/mach-iop3xx/iop331-time.c
  3. *
  4. * Timer code for IOP331 based systems
  5. *
  6. * Author: Dave Jiang <dave.jiang@intel.com>
  7. *
  8. * Copyright 2003 Intel Corp.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/time.h>
  18. #include <linux/init.h>
  19. #include <linux/timex.h>
  20. #include <asm/hardware.h>
  21. #include <asm/io.h>
  22. #include <asm/irq.h>
  23. #include <asm/uaccess.h>
  24. #include <asm/mach/irq.h>
  25. #include <asm/mach/time.h>
  26. static inline unsigned long get_elapsed(void)
  27. {
  28. return LATCH - *IOP331_TU_TCR0;
  29. }
  30. static unsigned long iop331_gettimeoffset(void)
  31. {
  32. unsigned long elapsed, usec;
  33. u32 tisr1, tisr2;
  34. /*
  35. * If an interrupt was pending before we read the timer,
  36. * we've already wrapped. Factor this into the time.
  37. * If an interrupt was pending after we read the timer,
  38. * it may have wrapped between checking the interrupt
  39. * status and reading the timer. Re-read the timer to
  40. * be sure its value is after the wrap.
  41. */
  42. asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr1));
  43. elapsed = get_elapsed();
  44. asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr2));
  45. if(tisr1 & 1)
  46. elapsed += LATCH;
  47. else if (tisr2 & 1)
  48. elapsed = LATCH + get_elapsed();
  49. /*
  50. * Now convert them to usec.
  51. */
  52. usec = (unsigned long)(elapsed / (CLOCK_TICK_RATE/1000000));
  53. return usec;
  54. }
  55. static irqreturn_t
  56. iop331_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  57. {
  58. u32 tisr;
  59. write_seqlock(&xtime_lock);
  60. asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr));
  61. tisr |= 1;
  62. asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (tisr));
  63. timer_tick(regs);
  64. write_sequnlock(&xtime_lock);
  65. return IRQ_HANDLED;
  66. }
  67. static struct irqaction iop331_timer_irq = {
  68. .name = "IOP331 Timer Tick",
  69. .handler = iop331_timer_interrupt,
  70. .flags = SA_INTERRUPT | SA_TIMER,
  71. };
  72. static void __init iop331_timer_init(void)
  73. {
  74. u32 timer_ctl;
  75. setup_irq(IRQ_IOP331_TIMER0, &iop331_timer_irq);
  76. timer_ctl = IOP331_TMR_EN | IOP331_TMR_PRIVILEGED | IOP331_TMR_RELOAD |
  77. IOP331_TMR_RATIO_1_1;
  78. asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (LATCH));
  79. asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
  80. }
  81. struct sys_timer iop331_timer = {
  82. .init = iop331_timer_init,
  83. .offset = iop331_gettimeoffset,
  84. };