iop321-setup.c 3.9 KB

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  1. /*
  2. * linux/arch/arm/mach-iop3xx/iop321-setup.c
  3. *
  4. * Author: Nicolas Pitre <nico@cam.org>
  5. * Copyright (C) 2001 MontaVista Software, Inc.
  6. * Copyright (C) 2004 Intel Corporation.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/mm.h>
  14. #include <linux/init.h>
  15. #include <linux/config.h>
  16. #include <linux/major.h>
  17. #include <linux/fs.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/serial.h>
  20. #include <linux/tty.h>
  21. #include <linux/serial_core.h>
  22. #include <asm/io.h>
  23. #include <asm/pgtable.h>
  24. #include <asm/page.h>
  25. #include <asm/mach/map.h>
  26. #include <asm/setup.h>
  27. #include <asm/system.h>
  28. #include <asm/memory.h>
  29. #include <asm/hardware.h>
  30. #include <asm/mach-types.h>
  31. #include <asm/mach/arch.h>
  32. #define IOP321_UART_XTAL 1843200
  33. /*
  34. * Standard IO mapping for all IOP321 based systems
  35. */
  36. static struct map_desc iop321_std_desc[] __initdata = {
  37. { /* mem mapped registers */
  38. .virtual = IOP321_VIRT_MEM_BASE,
  39. .pfn = __phys_to_pfn(IOP321_PHYS_MEM_BASE),
  40. .length = 0x00002000,
  41. .type = MT_DEVICE
  42. }, { /* PCI IO space */
  43. .virtual = IOP321_PCI_LOWER_IO_VA,
  44. .pfn = __phys_to_pfn(IOP321_PCI_LOWER_IO_PA),
  45. .length = IOP321_PCI_IO_WINDOW_SIZE,
  46. .type = MT_DEVICE
  47. }
  48. };
  49. #ifdef CONFIG_ARCH_IQ80321
  50. #define UARTBASE IQ80321_UART
  51. #define IRQ_UART IRQ_IQ80321_UART
  52. #endif
  53. #ifdef CONFIG_ARCH_IQ31244
  54. #define UARTBASE IQ31244_UART
  55. #define IRQ_UART IRQ_IQ31244_UART
  56. #endif
  57. static struct uart_port iop321_serial_ports[] = {
  58. {
  59. .membase = (char*)(UARTBASE),
  60. .mapbase = (UARTBASE),
  61. .irq = IRQ_UART,
  62. .flags = UPF_SKIP_TEST,
  63. .iotype = UPIO_MEM,
  64. .regshift = 0,
  65. .uartclk = IOP321_UART_XTAL,
  66. .line = 0,
  67. .type = PORT_16550A,
  68. .fifosize = 16
  69. }
  70. };
  71. static struct resource iop32x_i2c_0_resources[] = {
  72. [0] = {
  73. .start = 0xfffff680,
  74. .end = 0xfffff698,
  75. .flags = IORESOURCE_MEM,
  76. },
  77. [1] = {
  78. .start = IRQ_IOP321_I2C_0,
  79. .end = IRQ_IOP321_I2C_0,
  80. .flags = IORESOURCE_IRQ
  81. }
  82. };
  83. static struct resource iop32x_i2c_1_resources[] = {
  84. [0] = {
  85. .start = 0xfffff6a0,
  86. .end = 0xfffff6b8,
  87. .flags = IORESOURCE_MEM,
  88. },
  89. [1] = {
  90. .start = IRQ_IOP321_I2C_1,
  91. .end = IRQ_IOP321_I2C_1,
  92. .flags = IORESOURCE_IRQ
  93. }
  94. };
  95. static struct platform_device iop32x_i2c_0_controller = {
  96. .name = "IOP3xx-I2C",
  97. .id = 0,
  98. .num_resources = 2,
  99. .resource = iop32x_i2c_0_resources
  100. };
  101. static struct platform_device iop32x_i2c_1_controller = {
  102. .name = "IOP3xx-I2C",
  103. .id = 1,
  104. .num_resources = 2,
  105. .resource = iop32x_i2c_1_resources
  106. };
  107. static struct platform_device *iop32x_devices[] __initdata = {
  108. &iop32x_i2c_0_controller,
  109. &iop32x_i2c_1_controller
  110. };
  111. void __init iop32x_init(void)
  112. {
  113. if(iop_is_321())
  114. {
  115. platform_add_devices(iop32x_devices,
  116. ARRAY_SIZE(iop32x_devices));
  117. }
  118. }
  119. void __init iop321_map_io(void)
  120. {
  121. iotable_init(iop321_std_desc, ARRAY_SIZE(iop321_std_desc));
  122. early_serial_setup(&iop321_serial_ports[0]);
  123. }
  124. #ifdef CONFIG_ARCH_IQ80321
  125. extern void iq80321_map_io(void);
  126. extern struct sys_timer iop321_timer;
  127. extern void iop321_init_time(void);
  128. #endif
  129. #ifdef CONFIG_ARCH_IQ31244
  130. extern void iq31244_map_io(void);
  131. extern struct sys_timer iop321_timer;
  132. extern void iop321_init_time(void);
  133. #endif
  134. #if defined(CONFIG_ARCH_IQ80321)
  135. MACHINE_START(IQ80321, "Intel IQ80321")
  136. /* Maintainer: Intel Corporation */
  137. .phys_io = IQ80321_UART,
  138. .io_pg_offst = ((IQ80321_UART) >> 18) & 0xfffc,
  139. .map_io = iq80321_map_io,
  140. .init_irq = iop321_init_irq,
  141. .timer = &iop321_timer,
  142. .boot_params = 0xa0000100,
  143. .init_machine = iop32x_init,
  144. MACHINE_END
  145. #elif defined(CONFIG_ARCH_IQ31244)
  146. MACHINE_START(IQ31244, "Intel IQ31244")
  147. /* Maintainer: Intel Corp. */
  148. .phys_io = IQ31244_UART,
  149. .io_pg_offst = ((IQ31244_UART) >> 18) & 0xfffc,
  150. .map_io = iq31244_map_io,
  151. .init_irq = iop321_init_irq,
  152. .timer = &iop321_timer,
  153. .boot_params = 0xa0000100,
  154. .init_machine = iop32x_init,
  155. MACHINE_END
  156. #else
  157. #error No machine descriptor defined for this IOP3XX implementation
  158. #endif