sa1111.c 32 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/sa1111.c
  3. *
  4. * SA1111 support
  5. *
  6. * Original code by John Dorsey
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This file contains all generic SA1111 support.
  13. *
  14. * All initialization functions provided here are intended to be called
  15. * from machine specific code with proper arguments when required.
  16. */
  17. #include <linux/config.h>
  18. #include <linux/module.h>
  19. #include <linux/init.h>
  20. #include <linux/kernel.h>
  21. #include <linux/delay.h>
  22. #include <linux/ptrace.h>
  23. #include <linux/errno.h>
  24. #include <linux/ioport.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/slab.h>
  27. #include <linux/spinlock.h>
  28. #include <linux/dma-mapping.h>
  29. #include <linux/clk.h>
  30. #include <asm/hardware.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/io.h>
  33. #include <asm/irq.h>
  34. #include <asm/mach/irq.h>
  35. #include <asm/sizes.h>
  36. #include <asm/hardware/sa1111.h>
  37. extern void __init sa1110_mb_enable(void);
  38. /*
  39. * We keep the following data for the overall SA1111. Note that the
  40. * struct device and struct resource are "fake"; they should be supplied
  41. * by the bus above us. However, in the interests of getting all SA1111
  42. * drivers converted over to the device model, we provide this as an
  43. * anchor point for all the other drivers.
  44. */
  45. struct sa1111 {
  46. struct device *dev;
  47. struct clk *clk;
  48. unsigned long phys;
  49. int irq;
  50. spinlock_t lock;
  51. void __iomem *base;
  52. };
  53. /*
  54. * We _really_ need to eliminate this. Its only users
  55. * are the PWM and DMA checking code.
  56. */
  57. static struct sa1111 *g_sa1111;
  58. struct sa1111_dev_info {
  59. unsigned long offset;
  60. unsigned long skpcr_mask;
  61. unsigned int devid;
  62. unsigned int irq[6];
  63. };
  64. static struct sa1111_dev_info sa1111_devices[] = {
  65. {
  66. .offset = SA1111_USB,
  67. .skpcr_mask = SKPCR_UCLKEN,
  68. .devid = SA1111_DEVID_USB,
  69. .irq = {
  70. IRQ_USBPWR,
  71. IRQ_HCIM,
  72. IRQ_HCIBUFFACC,
  73. IRQ_HCIRMTWKP,
  74. IRQ_NHCIMFCIR,
  75. IRQ_USB_PORT_RESUME
  76. },
  77. },
  78. {
  79. .offset = 0x0600,
  80. .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN,
  81. .devid = SA1111_DEVID_SAC,
  82. .irq = {
  83. AUDXMTDMADONEA,
  84. AUDXMTDMADONEB,
  85. AUDRCVDMADONEA,
  86. AUDRCVDMADONEB
  87. },
  88. },
  89. {
  90. .offset = 0x0800,
  91. .skpcr_mask = SKPCR_SCLKEN,
  92. .devid = SA1111_DEVID_SSP,
  93. },
  94. {
  95. .offset = SA1111_KBD,
  96. .skpcr_mask = SKPCR_PTCLKEN,
  97. .devid = SA1111_DEVID_PS2,
  98. .irq = {
  99. IRQ_TPRXINT,
  100. IRQ_TPTXINT
  101. },
  102. },
  103. {
  104. .offset = SA1111_MSE,
  105. .skpcr_mask = SKPCR_PMCLKEN,
  106. .devid = SA1111_DEVID_PS2,
  107. .irq = {
  108. IRQ_MSRXINT,
  109. IRQ_MSTXINT
  110. },
  111. },
  112. {
  113. .offset = 0x1800,
  114. .skpcr_mask = 0,
  115. .devid = SA1111_DEVID_PCMCIA,
  116. .irq = {
  117. IRQ_S0_READY_NINT,
  118. IRQ_S0_CD_VALID,
  119. IRQ_S0_BVD1_STSCHG,
  120. IRQ_S1_READY_NINT,
  121. IRQ_S1_CD_VALID,
  122. IRQ_S1_BVD1_STSCHG,
  123. },
  124. },
  125. };
  126. void __init sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes)
  127. {
  128. unsigned int sz = SZ_1M >> PAGE_SHIFT;
  129. if (node != 0)
  130. sz = 0;
  131. size[1] = size[0] - sz;
  132. size[0] = sz;
  133. }
  134. /*
  135. * SA1111 interrupt support. Since clearing an IRQ while there are
  136. * active IRQs causes the interrupt output to pulse, the upper levels
  137. * will call us again if there are more interrupts to process.
  138. */
  139. static void
  140. sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
  141. {
  142. unsigned int stat0, stat1, i;
  143. void __iomem *base = desc->data;
  144. stat0 = sa1111_readl(base + SA1111_INTSTATCLR0);
  145. stat1 = sa1111_readl(base + SA1111_INTSTATCLR1);
  146. sa1111_writel(stat0, base + SA1111_INTSTATCLR0);
  147. desc->chip->ack(irq);
  148. sa1111_writel(stat1, base + SA1111_INTSTATCLR1);
  149. if (stat0 == 0 && stat1 == 0) {
  150. do_bad_IRQ(irq, desc, regs);
  151. return;
  152. }
  153. for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1)
  154. if (stat0 & 1)
  155. do_edge_IRQ(i, irq_desc + i, regs);
  156. for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1)
  157. if (stat1 & 1)
  158. do_edge_IRQ(i, irq_desc + i, regs);
  159. /* For level-based interrupts */
  160. desc->chip->unmask(irq);
  161. }
  162. #define SA1111_IRQMASK_LO(x) (1 << (x - IRQ_SA1111_START))
  163. #define SA1111_IRQMASK_HI(x) (1 << (x - IRQ_SA1111_START - 32))
  164. static void sa1111_ack_irq(unsigned int irq)
  165. {
  166. }
  167. static void sa1111_mask_lowirq(unsigned int irq)
  168. {
  169. void __iomem *mapbase = get_irq_chipdata(irq);
  170. unsigned long ie0;
  171. ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
  172. ie0 &= ~SA1111_IRQMASK_LO(irq);
  173. writel(ie0, mapbase + SA1111_INTEN0);
  174. }
  175. static void sa1111_unmask_lowirq(unsigned int irq)
  176. {
  177. void __iomem *mapbase = get_irq_chipdata(irq);
  178. unsigned long ie0;
  179. ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
  180. ie0 |= SA1111_IRQMASK_LO(irq);
  181. sa1111_writel(ie0, mapbase + SA1111_INTEN0);
  182. }
  183. /*
  184. * Attempt to re-trigger the interrupt. The SA1111 contains a register
  185. * (INTSET) which claims to do this. However, in practice no amount of
  186. * manipulation of INTEN and INTSET guarantees that the interrupt will
  187. * be triggered. In fact, its very difficult, if not impossible to get
  188. * INTSET to re-trigger the interrupt.
  189. */
  190. static int sa1111_retrigger_lowirq(unsigned int irq)
  191. {
  192. unsigned int mask = SA1111_IRQMASK_LO(irq);
  193. void __iomem *mapbase = get_irq_chipdata(irq);
  194. unsigned long ip0;
  195. int i;
  196. ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
  197. for (i = 0; i < 8; i++) {
  198. sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0);
  199. sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
  200. if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
  201. break;
  202. }
  203. if (i == 8)
  204. printk(KERN_ERR "Danger Will Robinson: failed to "
  205. "re-trigger IRQ%d\n", irq);
  206. return i == 8 ? -1 : 0;
  207. }
  208. static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
  209. {
  210. unsigned int mask = SA1111_IRQMASK_LO(irq);
  211. void __iomem *mapbase = get_irq_chipdata(irq);
  212. unsigned long ip0;
  213. if (flags == IRQT_PROBE)
  214. return 0;
  215. if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
  216. return -EINVAL;
  217. ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
  218. if (flags & __IRQT_RISEDGE)
  219. ip0 &= ~mask;
  220. else
  221. ip0 |= mask;
  222. sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
  223. sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0);
  224. return 0;
  225. }
  226. static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
  227. {
  228. unsigned int mask = SA1111_IRQMASK_LO(irq);
  229. void __iomem *mapbase = get_irq_chipdata(irq);
  230. unsigned long we0;
  231. we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
  232. if (on)
  233. we0 |= mask;
  234. else
  235. we0 &= ~mask;
  236. sa1111_writel(we0, mapbase + SA1111_WAKEEN0);
  237. return 0;
  238. }
  239. static struct irqchip sa1111_low_chip = {
  240. .ack = sa1111_ack_irq,
  241. .mask = sa1111_mask_lowirq,
  242. .unmask = sa1111_unmask_lowirq,
  243. .retrigger = sa1111_retrigger_lowirq,
  244. .set_type = sa1111_type_lowirq,
  245. .set_wake = sa1111_wake_lowirq,
  246. };
  247. static void sa1111_mask_highirq(unsigned int irq)
  248. {
  249. void __iomem *mapbase = get_irq_chipdata(irq);
  250. unsigned long ie1;
  251. ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
  252. ie1 &= ~SA1111_IRQMASK_HI(irq);
  253. sa1111_writel(ie1, mapbase + SA1111_INTEN1);
  254. }
  255. static void sa1111_unmask_highirq(unsigned int irq)
  256. {
  257. void __iomem *mapbase = get_irq_chipdata(irq);
  258. unsigned long ie1;
  259. ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
  260. ie1 |= SA1111_IRQMASK_HI(irq);
  261. sa1111_writel(ie1, mapbase + SA1111_INTEN1);
  262. }
  263. /*
  264. * Attempt to re-trigger the interrupt. The SA1111 contains a register
  265. * (INTSET) which claims to do this. However, in practice no amount of
  266. * manipulation of INTEN and INTSET guarantees that the interrupt will
  267. * be triggered. In fact, its very difficult, if not impossible to get
  268. * INTSET to re-trigger the interrupt.
  269. */
  270. static int sa1111_retrigger_highirq(unsigned int irq)
  271. {
  272. unsigned int mask = SA1111_IRQMASK_HI(irq);
  273. void __iomem *mapbase = get_irq_chipdata(irq);
  274. unsigned long ip1;
  275. int i;
  276. ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
  277. for (i = 0; i < 8; i++) {
  278. sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1);
  279. sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
  280. if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
  281. break;
  282. }
  283. if (i == 8)
  284. printk(KERN_ERR "Danger Will Robinson: failed to "
  285. "re-trigger IRQ%d\n", irq);
  286. return i == 8 ? -1 : 0;
  287. }
  288. static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
  289. {
  290. unsigned int mask = SA1111_IRQMASK_HI(irq);
  291. void __iomem *mapbase = get_irq_chipdata(irq);
  292. unsigned long ip1;
  293. if (flags == IRQT_PROBE)
  294. return 0;
  295. if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
  296. return -EINVAL;
  297. ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
  298. if (flags & __IRQT_RISEDGE)
  299. ip1 &= ~mask;
  300. else
  301. ip1 |= mask;
  302. sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
  303. sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1);
  304. return 0;
  305. }
  306. static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
  307. {
  308. unsigned int mask = SA1111_IRQMASK_HI(irq);
  309. void __iomem *mapbase = get_irq_chipdata(irq);
  310. unsigned long we1;
  311. we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
  312. if (on)
  313. we1 |= mask;
  314. else
  315. we1 &= ~mask;
  316. sa1111_writel(we1, mapbase + SA1111_WAKEEN1);
  317. return 0;
  318. }
  319. static struct irqchip sa1111_high_chip = {
  320. .ack = sa1111_ack_irq,
  321. .mask = sa1111_mask_highirq,
  322. .unmask = sa1111_unmask_highirq,
  323. .retrigger = sa1111_retrigger_highirq,
  324. .set_type = sa1111_type_highirq,
  325. .set_wake = sa1111_wake_highirq,
  326. };
  327. static void sa1111_setup_irq(struct sa1111 *sachip)
  328. {
  329. void __iomem *irqbase = sachip->base + SA1111_INTC;
  330. unsigned int irq;
  331. /*
  332. * We're guaranteed that this region hasn't been taken.
  333. */
  334. request_mem_region(sachip->phys + SA1111_INTC, 512, "irq");
  335. /* disable all IRQs */
  336. sa1111_writel(0, irqbase + SA1111_INTEN0);
  337. sa1111_writel(0, irqbase + SA1111_INTEN1);
  338. sa1111_writel(0, irqbase + SA1111_WAKEEN0);
  339. sa1111_writel(0, irqbase + SA1111_WAKEEN1);
  340. /*
  341. * detect on rising edge. Note: Feb 2001 Errata for SA1111
  342. * specifies that S0ReadyInt and S1ReadyInt should be '1'.
  343. */
  344. sa1111_writel(0, irqbase + SA1111_INTPOL0);
  345. sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) |
  346. SA1111_IRQMASK_HI(IRQ_S1_READY_NINT),
  347. irqbase + SA1111_INTPOL1);
  348. /* clear all IRQs */
  349. sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0);
  350. sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1);
  351. for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
  352. set_irq_chip(irq, &sa1111_low_chip);
  353. set_irq_chipdata(irq, irqbase);
  354. set_irq_handler(irq, do_edge_IRQ);
  355. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  356. }
  357. for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
  358. set_irq_chip(irq, &sa1111_high_chip);
  359. set_irq_chipdata(irq, irqbase);
  360. set_irq_handler(irq, do_edge_IRQ);
  361. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  362. }
  363. /*
  364. * Register SA1111 interrupt
  365. */
  366. set_irq_type(sachip->irq, IRQT_RISING);
  367. set_irq_data(sachip->irq, irqbase);
  368. set_irq_chained_handler(sachip->irq, sa1111_irq_handler);
  369. }
  370. /*
  371. * Bring the SA1111 out of reset. This requires a set procedure:
  372. * 1. nRESET asserted (by hardware)
  373. * 2. CLK turned on from SA1110
  374. * 3. nRESET deasserted
  375. * 4. VCO turned on, PLL_BYPASS turned off
  376. * 5. Wait lock time, then assert RCLKEn
  377. * 7. PCR set to allow clocking of individual functions
  378. *
  379. * Until we've done this, the only registers we can access are:
  380. * SBI_SKCR
  381. * SBI_SMCR
  382. * SBI_SKID
  383. */
  384. static void sa1111_wake(struct sa1111 *sachip)
  385. {
  386. unsigned long flags, r;
  387. spin_lock_irqsave(&sachip->lock, flags);
  388. clk_enable(sachip->clk);
  389. /*
  390. * Turn VCO on, and disable PLL Bypass.
  391. */
  392. r = sa1111_readl(sachip->base + SA1111_SKCR);
  393. r &= ~SKCR_VCO_OFF;
  394. sa1111_writel(r, sachip->base + SA1111_SKCR);
  395. r |= SKCR_PLL_BYPASS | SKCR_OE_EN;
  396. sa1111_writel(r, sachip->base + SA1111_SKCR);
  397. /*
  398. * Wait lock time. SA1111 manual _doesn't_
  399. * specify a figure for this! We choose 100us.
  400. */
  401. udelay(100);
  402. /*
  403. * Enable RCLK. We also ensure that RDYEN is set.
  404. */
  405. r |= SKCR_RCLKEN | SKCR_RDYEN;
  406. sa1111_writel(r, sachip->base + SA1111_SKCR);
  407. /*
  408. * Wait 14 RCLK cycles for the chip to finish coming out
  409. * of reset. (RCLK=24MHz). This is 590ns.
  410. */
  411. udelay(1);
  412. /*
  413. * Ensure all clocks are initially off.
  414. */
  415. sa1111_writel(0, sachip->base + SA1111_SKPCR);
  416. spin_unlock_irqrestore(&sachip->lock, flags);
  417. }
  418. #ifdef CONFIG_ARCH_SA1100
  419. static u32 sa1111_dma_mask[] = {
  420. ~0,
  421. ~(1 << 20),
  422. ~(1 << 23),
  423. ~(1 << 24),
  424. ~(1 << 25),
  425. ~(1 << 20),
  426. ~(1 << 20),
  427. 0,
  428. };
  429. /*
  430. * Configure the SA1111 shared memory controller.
  431. */
  432. void
  433. sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
  434. unsigned int cas_latency)
  435. {
  436. unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC);
  437. if (cas_latency == 3)
  438. smcr |= SMCR_CLAT;
  439. sa1111_writel(smcr, sachip->base + SA1111_SMCR);
  440. /*
  441. * Now clear the bits in the DMA mask to work around the SA1111
  442. * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion
  443. * Chip Specification Update, June 2000, Erratum #7).
  444. */
  445. if (sachip->dev->dma_mask)
  446. *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2];
  447. sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2];
  448. }
  449. #endif
  450. static void sa1111_dev_release(struct device *_dev)
  451. {
  452. struct sa1111_dev *dev = SA1111_DEV(_dev);
  453. release_resource(&dev->res);
  454. kfree(dev);
  455. }
  456. static int
  457. sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
  458. struct sa1111_dev_info *info)
  459. {
  460. struct sa1111_dev *dev;
  461. int ret;
  462. dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL);
  463. if (!dev) {
  464. ret = -ENOMEM;
  465. goto out;
  466. }
  467. snprintf(dev->dev.bus_id, sizeof(dev->dev.bus_id),
  468. "%4.4lx", info->offset);
  469. dev->devid = info->devid;
  470. dev->dev.parent = sachip->dev;
  471. dev->dev.bus = &sa1111_bus_type;
  472. dev->dev.release = sa1111_dev_release;
  473. dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
  474. dev->res.start = sachip->phys + info->offset;
  475. dev->res.end = dev->res.start + 511;
  476. dev->res.name = dev->dev.bus_id;
  477. dev->res.flags = IORESOURCE_MEM;
  478. dev->mapbase = sachip->base + info->offset;
  479. dev->skpcr_mask = info->skpcr_mask;
  480. memmove(dev->irq, info->irq, sizeof(dev->irq));
  481. ret = request_resource(parent, &dev->res);
  482. if (ret) {
  483. printk("SA1111: failed to allocate resource for %s\n",
  484. dev->res.name);
  485. kfree(dev);
  486. goto out;
  487. }
  488. ret = device_register(&dev->dev);
  489. if (ret) {
  490. release_resource(&dev->res);
  491. kfree(dev);
  492. goto out;
  493. }
  494. /*
  495. * If the parent device has a DMA mask associated with it,
  496. * propagate it down to the children.
  497. */
  498. if (sachip->dev->dma_mask) {
  499. dev->dma_mask = *sachip->dev->dma_mask;
  500. dev->dev.dma_mask = &dev->dma_mask;
  501. if (dev->dma_mask != 0xffffffffUL) {
  502. ret = dmabounce_register_dev(&dev->dev, 1024, 4096);
  503. if (ret) {
  504. printk("SA1111: Failed to register %s with dmabounce", dev->dev.bus_id);
  505. device_unregister(&dev->dev);
  506. }
  507. }
  508. }
  509. out:
  510. return ret;
  511. }
  512. /**
  513. * sa1111_probe - probe for a single SA1111 chip.
  514. * @phys_addr: physical address of device.
  515. *
  516. * Probe for a SA1111 chip. This must be called
  517. * before any other SA1111-specific code.
  518. *
  519. * Returns:
  520. * %-ENODEV device not found.
  521. * %-EBUSY physical address already marked in-use.
  522. * %0 successful.
  523. */
  524. static int
  525. __sa1111_probe(struct device *me, struct resource *mem, int irq)
  526. {
  527. struct sa1111 *sachip;
  528. unsigned long id;
  529. unsigned int has_devs, val;
  530. int i, ret = -ENODEV;
  531. sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL);
  532. if (!sachip)
  533. return -ENOMEM;
  534. sachip->clk = clk_get(me, "GPIO27_CLK");
  535. if (!sachip->clk) {
  536. ret = PTR_ERR(sachip->clk);
  537. goto err_free;
  538. }
  539. spin_lock_init(&sachip->lock);
  540. sachip->dev = me;
  541. dev_set_drvdata(sachip->dev, sachip);
  542. sachip->phys = mem->start;
  543. sachip->irq = irq;
  544. /*
  545. * Map the whole region. This also maps the
  546. * registers for our children.
  547. */
  548. sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
  549. if (!sachip->base) {
  550. ret = -ENOMEM;
  551. goto err_clkput;
  552. }
  553. /*
  554. * Probe for the chip. Only touch the SBI registers.
  555. */
  556. id = sa1111_readl(sachip->base + SA1111_SKID);
  557. if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
  558. printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
  559. ret = -ENODEV;
  560. goto err_unmap;
  561. }
  562. printk(KERN_INFO "SA1111 Microprocessor Companion Chip: "
  563. "silicon revision %lx, metal revision %lx\n",
  564. (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK));
  565. /*
  566. * We found it. Wake the chip up, and initialise.
  567. */
  568. sa1111_wake(sachip);
  569. #ifdef CONFIG_ARCH_SA1100
  570. /*
  571. * The SDRAM configuration of the SA1110 and the SA1111 must
  572. * match. This is very important to ensure that SA1111 accesses
  573. * don't corrupt the SDRAM. Note that this ungates the SA1111's
  574. * MBGNT signal, so we must have called sa1110_mb_disable()
  575. * beforehand.
  576. */
  577. sa1111_configure_smc(sachip, 1,
  578. FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
  579. FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
  580. /*
  581. * We only need to turn on DCLK whenever we want to use the
  582. * DMA. It can otherwise be held firmly in the off position.
  583. * (currently, we always enable it.)
  584. */
  585. val = sa1111_readl(sachip->base + SA1111_SKPCR);
  586. sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR);
  587. /*
  588. * Enable the SA1110 memory bus request and grant signals.
  589. */
  590. sa1110_mb_enable();
  591. #endif
  592. /*
  593. * The interrupt controller must be initialised before any
  594. * other device to ensure that the interrupts are available.
  595. */
  596. if (sachip->irq != NO_IRQ)
  597. sa1111_setup_irq(sachip);
  598. g_sa1111 = sachip;
  599. has_devs = ~0;
  600. if (machine_is_assabet() || machine_is_jornada720() ||
  601. machine_is_badge4())
  602. has_devs &= ~(1 << 4);
  603. else
  604. has_devs &= ~(1 << 1);
  605. for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++)
  606. if (has_devs & (1 << i))
  607. sa1111_init_one_child(sachip, mem, &sa1111_devices[i]);
  608. return 0;
  609. err_unmap:
  610. iounmap(sachip->base);
  611. err_clkput:
  612. clk_put(sachip->clk);
  613. err_free:
  614. kfree(sachip);
  615. return ret;
  616. }
  617. static int sa1111_remove_one(struct device *dev, void *data)
  618. {
  619. device_unregister(dev);
  620. return 0;
  621. }
  622. static void __sa1111_remove(struct sa1111 *sachip)
  623. {
  624. void __iomem *irqbase = sachip->base + SA1111_INTC;
  625. device_for_each_child(sachip->dev, NULL, sa1111_remove_one);
  626. /* disable all IRQs */
  627. sa1111_writel(0, irqbase + SA1111_INTEN0);
  628. sa1111_writel(0, irqbase + SA1111_INTEN1);
  629. sa1111_writel(0, irqbase + SA1111_WAKEEN0);
  630. sa1111_writel(0, irqbase + SA1111_WAKEEN1);
  631. clk_disable(sachip->clk);
  632. if (sachip->irq != NO_IRQ) {
  633. set_irq_chained_handler(sachip->irq, NULL);
  634. set_irq_data(sachip->irq, NULL);
  635. release_mem_region(sachip->phys + SA1111_INTC, 512);
  636. }
  637. iounmap(sachip->base);
  638. clk_put(sachip->clk);
  639. kfree(sachip);
  640. }
  641. /*
  642. * According to the "Intel StrongARM SA-1111 Microprocessor Companion
  643. * Chip Specification Update" (June 2000), erratum #7, there is a
  644. * significant bug in the SA1111 SDRAM shared memory controller. If
  645. * an access to a region of memory above 1MB relative to the bank base,
  646. * it is important that address bit 10 _NOT_ be asserted. Depending
  647. * on the configuration of the RAM, bit 10 may correspond to one
  648. * of several different (processor-relative) address bits.
  649. *
  650. * This routine only identifies whether or not a given DMA address
  651. * is susceptible to the bug.
  652. *
  653. * This should only get called for sa1111_device types due to the
  654. * way we configure our device dma_masks.
  655. */
  656. int dma_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
  657. {
  658. /*
  659. * Section 4.6 of the "Intel StrongARM SA-1111 Development Module
  660. * User's Guide" mentions that jumpers R51 and R52 control the
  661. * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
  662. * SDRAM bank 1 on Neponset). The default configuration selects
  663. * Assabet, so any address in bank 1 is necessarily invalid.
  664. */
  665. return ((machine_is_assabet() || machine_is_pfs168()) &&
  666. (addr >= 0xc8000000 || (addr + size) >= 0xc8000000));
  667. }
  668. struct sa1111_save_data {
  669. unsigned int skcr;
  670. unsigned int skpcr;
  671. unsigned int skcdr;
  672. unsigned char skaud;
  673. unsigned char skpwm0;
  674. unsigned char skpwm1;
  675. /*
  676. * Interrupt controller
  677. */
  678. unsigned int intpol0;
  679. unsigned int intpol1;
  680. unsigned int inten0;
  681. unsigned int inten1;
  682. unsigned int wakepol0;
  683. unsigned int wakepol1;
  684. unsigned int wakeen0;
  685. unsigned int wakeen1;
  686. };
  687. #ifdef CONFIG_PM
  688. static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
  689. {
  690. struct sa1111 *sachip = platform_get_drvdata(dev);
  691. struct sa1111_save_data *save;
  692. unsigned long flags;
  693. unsigned int val;
  694. void __iomem *base;
  695. save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
  696. if (!save)
  697. return -ENOMEM;
  698. dev->dev.power.saved_state = save;
  699. spin_lock_irqsave(&sachip->lock, flags);
  700. /*
  701. * Save state.
  702. */
  703. base = sachip->base;
  704. save->skcr = sa1111_readl(base + SA1111_SKCR);
  705. save->skpcr = sa1111_readl(base + SA1111_SKPCR);
  706. save->skcdr = sa1111_readl(base + SA1111_SKCDR);
  707. save->skaud = sa1111_readl(base + SA1111_SKAUD);
  708. save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0);
  709. save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1);
  710. base = sachip->base + SA1111_INTC;
  711. save->intpol0 = sa1111_readl(base + SA1111_INTPOL0);
  712. save->intpol1 = sa1111_readl(base + SA1111_INTPOL1);
  713. save->inten0 = sa1111_readl(base + SA1111_INTEN0);
  714. save->inten1 = sa1111_readl(base + SA1111_INTEN1);
  715. save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0);
  716. save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1);
  717. save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0);
  718. save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1);
  719. /*
  720. * Disable.
  721. */
  722. val = sa1111_readl(sachip->base + SA1111_SKCR);
  723. sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
  724. sa1111_writel(0, sachip->base + SA1111_SKPWM0);
  725. sa1111_writel(0, sachip->base + SA1111_SKPWM1);
  726. clk_disable(sachip->clk);
  727. spin_unlock_irqrestore(&sachip->lock, flags);
  728. return 0;
  729. }
  730. /*
  731. * sa1111_resume - Restore the SA1111 device state.
  732. * @dev: device to restore
  733. *
  734. * Restore the general state of the SA1111; clock control and
  735. * interrupt controller. Other parts of the SA1111 must be
  736. * restored by their respective drivers, and must be called
  737. * via LDM after this function.
  738. */
  739. static int sa1111_resume(struct platform_device *dev)
  740. {
  741. struct sa1111 *sachip = platform_get_drvdata(dev);
  742. struct sa1111_save_data *save;
  743. unsigned long flags, id;
  744. void __iomem *base;
  745. save = (struct sa1111_save_data *)dev->dev.power.saved_state;
  746. if (!save)
  747. return 0;
  748. spin_lock_irqsave(&sachip->lock, flags);
  749. /*
  750. * Ensure that the SA1111 is still here.
  751. * FIXME: shouldn't do this here.
  752. */
  753. id = sa1111_readl(sachip->base + SA1111_SKID);
  754. if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
  755. __sa1111_remove(sachip);
  756. platform_set_drvdata(dev, NULL);
  757. kfree(save);
  758. return 0;
  759. }
  760. /*
  761. * First of all, wake up the chip.
  762. */
  763. sa1111_wake(sachip);
  764. sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
  765. sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
  766. base = sachip->base;
  767. sa1111_writel(save->skcr, base + SA1111_SKCR);
  768. sa1111_writel(save->skpcr, base + SA1111_SKPCR);
  769. sa1111_writel(save->skcdr, base + SA1111_SKCDR);
  770. sa1111_writel(save->skaud, base + SA1111_SKAUD);
  771. sa1111_writel(save->skpwm0, base + SA1111_SKPWM0);
  772. sa1111_writel(save->skpwm1, base + SA1111_SKPWM1);
  773. base = sachip->base + SA1111_INTC;
  774. sa1111_writel(save->intpol0, base + SA1111_INTPOL0);
  775. sa1111_writel(save->intpol1, base + SA1111_INTPOL1);
  776. sa1111_writel(save->inten0, base + SA1111_INTEN0);
  777. sa1111_writel(save->inten1, base + SA1111_INTEN1);
  778. sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0);
  779. sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1);
  780. sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0);
  781. sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1);
  782. spin_unlock_irqrestore(&sachip->lock, flags);
  783. dev->dev.power.saved_state = NULL;
  784. kfree(save);
  785. return 0;
  786. }
  787. #else
  788. #define sa1111_suspend NULL
  789. #define sa1111_resume NULL
  790. #endif
  791. static int sa1111_probe(struct platform_device *pdev)
  792. {
  793. struct resource *mem;
  794. int irq;
  795. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  796. if (!mem)
  797. return -EINVAL;
  798. irq = platform_get_irq(pdev, 0);
  799. if (irq < 0)
  800. return -ENXIO;
  801. return __sa1111_probe(&pdev->dev, mem, irq);
  802. }
  803. static int sa1111_remove(struct platform_device *pdev)
  804. {
  805. struct sa1111 *sachip = platform_get_drvdata(pdev);
  806. if (sachip) {
  807. __sa1111_remove(sachip);
  808. platform_set_drvdata(pdev, NULL);
  809. #ifdef CONFIG_PM
  810. kfree(pdev->dev.power.saved_state);
  811. pdev->dev.power.saved_state = NULL;
  812. #endif
  813. }
  814. return 0;
  815. }
  816. /*
  817. * Not sure if this should be on the system bus or not yet.
  818. * We really want some way to register a system device at
  819. * the per-machine level, and then have this driver pick
  820. * up the registered devices.
  821. *
  822. * We also need to handle the SDRAM configuration for
  823. * PXA250/SA1110 machine classes.
  824. */
  825. static struct platform_driver sa1111_device_driver = {
  826. .probe = sa1111_probe,
  827. .remove = sa1111_remove,
  828. .suspend = sa1111_suspend,
  829. .resume = sa1111_resume,
  830. .driver = {
  831. .name = "sa1111",
  832. },
  833. };
  834. /*
  835. * Get the parent device driver (us) structure
  836. * from a child function device
  837. */
  838. static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev)
  839. {
  840. return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent);
  841. }
  842. /*
  843. * The bits in the opdiv field are non-linear.
  844. */
  845. static unsigned char opdiv_table[] = { 1, 4, 2, 8 };
  846. static unsigned int __sa1111_pll_clock(struct sa1111 *sachip)
  847. {
  848. unsigned int skcdr, fbdiv, ipdiv, opdiv;
  849. skcdr = sa1111_readl(sachip->base + SA1111_SKCDR);
  850. fbdiv = (skcdr & 0x007f) + 2;
  851. ipdiv = ((skcdr & 0x0f80) >> 7) + 2;
  852. opdiv = opdiv_table[(skcdr & 0x3000) >> 12];
  853. return 3686400 * fbdiv / (ipdiv * opdiv);
  854. }
  855. /**
  856. * sa1111_pll_clock - return the current PLL clock frequency.
  857. * @sadev: SA1111 function block
  858. *
  859. * BUG: we should look at SKCR. We also blindly believe that
  860. * the chip is being fed with the 3.6864MHz clock.
  861. *
  862. * Returns the PLL clock in Hz.
  863. */
  864. unsigned int sa1111_pll_clock(struct sa1111_dev *sadev)
  865. {
  866. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  867. return __sa1111_pll_clock(sachip);
  868. }
  869. /**
  870. * sa1111_select_audio_mode - select I2S or AC link mode
  871. * @sadev: SA1111 function block
  872. * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S
  873. *
  874. * Frob the SKCR to select AC Link mode or I2S mode for
  875. * the audio block.
  876. */
  877. void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode)
  878. {
  879. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  880. unsigned long flags;
  881. unsigned int val;
  882. spin_lock_irqsave(&sachip->lock, flags);
  883. val = sa1111_readl(sachip->base + SA1111_SKCR);
  884. if (mode == SA1111_AUDIO_I2S) {
  885. val &= ~SKCR_SELAC;
  886. } else {
  887. val |= SKCR_SELAC;
  888. }
  889. sa1111_writel(val, sachip->base + SA1111_SKCR);
  890. spin_unlock_irqrestore(&sachip->lock, flags);
  891. }
  892. /**
  893. * sa1111_set_audio_rate - set the audio sample rate
  894. * @sadev: SA1111 SAC function block
  895. * @rate: sample rate to select
  896. */
  897. int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate)
  898. {
  899. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  900. unsigned int div;
  901. if (sadev->devid != SA1111_DEVID_SAC)
  902. return -EINVAL;
  903. div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate;
  904. if (div == 0)
  905. div = 1;
  906. if (div > 128)
  907. div = 128;
  908. sa1111_writel(div - 1, sachip->base + SA1111_SKAUD);
  909. return 0;
  910. }
  911. /**
  912. * sa1111_get_audio_rate - get the audio sample rate
  913. * @sadev: SA1111 SAC function block device
  914. */
  915. int sa1111_get_audio_rate(struct sa1111_dev *sadev)
  916. {
  917. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  918. unsigned long div;
  919. if (sadev->devid != SA1111_DEVID_SAC)
  920. return -EINVAL;
  921. div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1;
  922. return __sa1111_pll_clock(sachip) / (256 * div);
  923. }
  924. void sa1111_set_io_dir(struct sa1111_dev *sadev,
  925. unsigned int bits, unsigned int dir,
  926. unsigned int sleep_dir)
  927. {
  928. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  929. unsigned long flags;
  930. unsigned int val;
  931. void __iomem *gpio = sachip->base + SA1111_GPIO;
  932. #define MODIFY_BITS(port, mask, dir) \
  933. if (mask) { \
  934. val = sa1111_readl(port); \
  935. val &= ~(mask); \
  936. val |= (dir) & (mask); \
  937. sa1111_writel(val, port); \
  938. }
  939. spin_lock_irqsave(&sachip->lock, flags);
  940. MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir);
  941. MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8);
  942. MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16);
  943. MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir);
  944. MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8);
  945. MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16);
  946. spin_unlock_irqrestore(&sachip->lock, flags);
  947. }
  948. void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
  949. {
  950. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  951. unsigned long flags;
  952. unsigned int val;
  953. void __iomem *gpio = sachip->base + SA1111_GPIO;
  954. spin_lock_irqsave(&sachip->lock, flags);
  955. MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v);
  956. MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8);
  957. MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16);
  958. spin_unlock_irqrestore(&sachip->lock, flags);
  959. }
  960. void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
  961. {
  962. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  963. unsigned long flags;
  964. unsigned int val;
  965. void __iomem *gpio = sachip->base + SA1111_GPIO;
  966. spin_lock_irqsave(&sachip->lock, flags);
  967. MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v);
  968. MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8);
  969. MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16);
  970. spin_unlock_irqrestore(&sachip->lock, flags);
  971. }
  972. /*
  973. * Individual device operations.
  974. */
  975. /**
  976. * sa1111_enable_device - enable an on-chip SA1111 function block
  977. * @sadev: SA1111 function block device to enable
  978. */
  979. void sa1111_enable_device(struct sa1111_dev *sadev)
  980. {
  981. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  982. unsigned long flags;
  983. unsigned int val;
  984. spin_lock_irqsave(&sachip->lock, flags);
  985. val = sa1111_readl(sachip->base + SA1111_SKPCR);
  986. sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
  987. spin_unlock_irqrestore(&sachip->lock, flags);
  988. }
  989. /**
  990. * sa1111_disable_device - disable an on-chip SA1111 function block
  991. * @sadev: SA1111 function block device to disable
  992. */
  993. void sa1111_disable_device(struct sa1111_dev *sadev)
  994. {
  995. struct sa1111 *sachip = sa1111_chip_driver(sadev);
  996. unsigned long flags;
  997. unsigned int val;
  998. spin_lock_irqsave(&sachip->lock, flags);
  999. val = sa1111_readl(sachip->base + SA1111_SKPCR);
  1000. sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
  1001. spin_unlock_irqrestore(&sachip->lock, flags);
  1002. }
  1003. /*
  1004. * SA1111 "Register Access Bus."
  1005. *
  1006. * We model this as a regular bus type, and hang devices directly
  1007. * off this.
  1008. */
  1009. static int sa1111_match(struct device *_dev, struct device_driver *_drv)
  1010. {
  1011. struct sa1111_dev *dev = SA1111_DEV(_dev);
  1012. struct sa1111_driver *drv = SA1111_DRV(_drv);
  1013. return dev->devid == drv->devid;
  1014. }
  1015. static int sa1111_bus_suspend(struct device *dev, pm_message_t state)
  1016. {
  1017. struct sa1111_dev *sadev = SA1111_DEV(dev);
  1018. struct sa1111_driver *drv = SA1111_DRV(dev->driver);
  1019. int ret = 0;
  1020. if (drv && drv->suspend)
  1021. ret = drv->suspend(sadev, state);
  1022. return ret;
  1023. }
  1024. static int sa1111_bus_resume(struct device *dev)
  1025. {
  1026. struct sa1111_dev *sadev = SA1111_DEV(dev);
  1027. struct sa1111_driver *drv = SA1111_DRV(dev->driver);
  1028. int ret = 0;
  1029. if (drv && drv->resume)
  1030. ret = drv->resume(sadev);
  1031. return ret;
  1032. }
  1033. static int sa1111_bus_probe(struct device *dev)
  1034. {
  1035. struct sa1111_dev *sadev = SA1111_DEV(dev);
  1036. struct sa1111_driver *drv = SA1111_DRV(dev->driver);
  1037. int ret = -ENODEV;
  1038. if (drv->probe)
  1039. ret = drv->probe(sadev);
  1040. return ret;
  1041. }
  1042. static int sa1111_bus_remove(struct device *dev)
  1043. {
  1044. struct sa1111_dev *sadev = SA1111_DEV(dev);
  1045. struct sa1111_driver *drv = SA1111_DRV(dev->driver);
  1046. int ret = 0;
  1047. if (drv->remove)
  1048. ret = drv->remove(sadev);
  1049. return ret;
  1050. }
  1051. struct bus_type sa1111_bus_type = {
  1052. .name = "sa1111-rab",
  1053. .match = sa1111_match,
  1054. .probe = sa1111_bus_probe,
  1055. .remove = sa1111_bus_remove,
  1056. .suspend = sa1111_bus_suspend,
  1057. .resume = sa1111_bus_resume,
  1058. };
  1059. int sa1111_driver_register(struct sa1111_driver *driver)
  1060. {
  1061. driver->drv.bus = &sa1111_bus_type;
  1062. return driver_register(&driver->drv);
  1063. }
  1064. void sa1111_driver_unregister(struct sa1111_driver *driver)
  1065. {
  1066. driver_unregister(&driver->drv);
  1067. }
  1068. static int __init sa1111_init(void)
  1069. {
  1070. int ret = bus_register(&sa1111_bus_type);
  1071. if (ret == 0)
  1072. platform_driver_register(&sa1111_device_driver);
  1073. return ret;
  1074. }
  1075. static void __exit sa1111_exit(void)
  1076. {
  1077. platform_driver_unregister(&sa1111_device_driver);
  1078. bus_unregister(&sa1111_bus_type);
  1079. }
  1080. subsys_initcall(sa1111_init);
  1081. module_exit(sa1111_exit);
  1082. MODULE_DESCRIPTION("Intel Corporation SA1111 core driver");
  1083. MODULE_LICENSE("GPL");
  1084. EXPORT_SYMBOL(sa1111_select_audio_mode);
  1085. EXPORT_SYMBOL(sa1111_set_audio_rate);
  1086. EXPORT_SYMBOL(sa1111_get_audio_rate);
  1087. EXPORT_SYMBOL(sa1111_set_io_dir);
  1088. EXPORT_SYMBOL(sa1111_set_io);
  1089. EXPORT_SYMBOL(sa1111_set_sleep_io);
  1090. EXPORT_SYMBOL(sa1111_enable_device);
  1091. EXPORT_SYMBOL(sa1111_disable_device);
  1092. EXPORT_SYMBOL(sa1111_pll_clock);
  1093. EXPORT_SYMBOL(sa1111_bus_type);
  1094. EXPORT_SYMBOL(sa1111_driver_register);
  1095. EXPORT_SYMBOL(sa1111_driver_unregister);