smp.c 22 KB

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  1. /*
  2. * linux/arch/alpha/kernel/smp.c
  3. *
  4. * 2001-07-09 Phil Ezolt (Phillip.Ezolt@compaq.com)
  5. * Renamed modified smp_call_function to smp_call_function_on_cpu()
  6. * Created an function that conforms to the old calling convention
  7. * of smp_call_function().
  8. *
  9. * This is helpful for DCPI.
  10. *
  11. */
  12. #include <linux/errno.h>
  13. #include <linux/kernel.h>
  14. #include <linux/kernel_stat.h>
  15. #include <linux/module.h>
  16. #include <linux/sched.h>
  17. #include <linux/mm.h>
  18. #include <linux/threads.h>
  19. #include <linux/smp.h>
  20. #include <linux/smp_lock.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/init.h>
  23. #include <linux/delay.h>
  24. #include <linux/spinlock.h>
  25. #include <linux/irq.h>
  26. #include <linux/cache.h>
  27. #include <linux/profile.h>
  28. #include <linux/bitops.h>
  29. #include <asm/hwrpb.h>
  30. #include <asm/ptrace.h>
  31. #include <asm/atomic.h>
  32. #include <asm/io.h>
  33. #include <asm/irq.h>
  34. #include <asm/pgtable.h>
  35. #include <asm/pgalloc.h>
  36. #include <asm/mmu_context.h>
  37. #include <asm/tlbflush.h>
  38. #include "proto.h"
  39. #include "irq_impl.h"
  40. #define DEBUG_SMP 0
  41. #if DEBUG_SMP
  42. #define DBGS(args) printk args
  43. #else
  44. #define DBGS(args)
  45. #endif
  46. /* A collection of per-processor data. */
  47. struct cpuinfo_alpha cpu_data[NR_CPUS];
  48. /* A collection of single bit ipi messages. */
  49. static struct {
  50. unsigned long bits ____cacheline_aligned;
  51. } ipi_data[NR_CPUS] __cacheline_aligned;
  52. enum ipi_message_type {
  53. IPI_RESCHEDULE,
  54. IPI_CALL_FUNC,
  55. IPI_CPU_STOP,
  56. };
  57. /* Set to a secondary's cpuid when it comes online. */
  58. static int smp_secondary_alive __initdata = 0;
  59. /* Which cpus ids came online. */
  60. cpumask_t cpu_present_mask;
  61. cpumask_t cpu_online_map;
  62. EXPORT_SYMBOL(cpu_online_map);
  63. int smp_num_probed; /* Internal processor count */
  64. int smp_num_cpus = 1; /* Number that came online. */
  65. extern void calibrate_delay(void);
  66. /*
  67. * Called by both boot and secondaries to move global data into
  68. * per-processor storage.
  69. */
  70. static inline void __init
  71. smp_store_cpu_info(int cpuid)
  72. {
  73. cpu_data[cpuid].loops_per_jiffy = loops_per_jiffy;
  74. cpu_data[cpuid].last_asn = ASN_FIRST_VERSION;
  75. cpu_data[cpuid].need_new_asn = 0;
  76. cpu_data[cpuid].asn_lock = 0;
  77. }
  78. /*
  79. * Ideally sets up per-cpu profiling hooks. Doesn't do much now...
  80. */
  81. static inline void __init
  82. smp_setup_percpu_timer(int cpuid)
  83. {
  84. cpu_data[cpuid].prof_counter = 1;
  85. cpu_data[cpuid].prof_multiplier = 1;
  86. }
  87. static void __init
  88. wait_boot_cpu_to_stop(int cpuid)
  89. {
  90. unsigned long stop = jiffies + 10*HZ;
  91. while (time_before(jiffies, stop)) {
  92. if (!smp_secondary_alive)
  93. return;
  94. barrier();
  95. }
  96. printk("wait_boot_cpu_to_stop: FAILED on CPU %d, hanging now\n", cpuid);
  97. for (;;)
  98. barrier();
  99. }
  100. /*
  101. * Where secondaries begin a life of C.
  102. */
  103. void __init
  104. smp_callin(void)
  105. {
  106. int cpuid = hard_smp_processor_id();
  107. if (cpu_test_and_set(cpuid, cpu_online_map)) {
  108. printk("??, cpu 0x%x already present??\n", cpuid);
  109. BUG();
  110. }
  111. /* Turn on machine checks. */
  112. wrmces(7);
  113. /* Set trap vectors. */
  114. trap_init();
  115. /* Set interrupt vector. */
  116. wrent(entInt, 0);
  117. /* Get our local ticker going. */
  118. smp_setup_percpu_timer(cpuid);
  119. /* Call platform-specific callin, if specified */
  120. if (alpha_mv.smp_callin) alpha_mv.smp_callin();
  121. /* All kernel threads share the same mm context. */
  122. atomic_inc(&init_mm.mm_count);
  123. current->active_mm = &init_mm;
  124. /* Must have completely accurate bogos. */
  125. local_irq_enable();
  126. /* Wait boot CPU to stop with irq enabled before running
  127. calibrate_delay. */
  128. wait_boot_cpu_to_stop(cpuid);
  129. mb();
  130. calibrate_delay();
  131. smp_store_cpu_info(cpuid);
  132. /* Allow master to continue only after we written loops_per_jiffy. */
  133. wmb();
  134. smp_secondary_alive = 1;
  135. DBGS(("smp_callin: commencing CPU %d current %p active_mm %p\n",
  136. cpuid, current, current->active_mm));
  137. /* Do nothing. */
  138. cpu_idle();
  139. }
  140. /* Wait until hwrpb->txrdy is clear for cpu. Return -1 on timeout. */
  141. static int __init
  142. wait_for_txrdy (unsigned long cpumask)
  143. {
  144. unsigned long timeout;
  145. if (!(hwrpb->txrdy & cpumask))
  146. return 0;
  147. timeout = jiffies + 10*HZ;
  148. while (time_before(jiffies, timeout)) {
  149. if (!(hwrpb->txrdy & cpumask))
  150. return 0;
  151. udelay(10);
  152. barrier();
  153. }
  154. return -1;
  155. }
  156. /*
  157. * Send a message to a secondary's console. "START" is one such
  158. * interesting message. ;-)
  159. */
  160. static void __init
  161. send_secondary_console_msg(char *str, int cpuid)
  162. {
  163. struct percpu_struct *cpu;
  164. register char *cp1, *cp2;
  165. unsigned long cpumask;
  166. size_t len;
  167. cpu = (struct percpu_struct *)
  168. ((char*)hwrpb
  169. + hwrpb->processor_offset
  170. + cpuid * hwrpb->processor_size);
  171. cpumask = (1UL << cpuid);
  172. if (wait_for_txrdy(cpumask))
  173. goto timeout;
  174. cp2 = str;
  175. len = strlen(cp2);
  176. *(unsigned int *)&cpu->ipc_buffer[0] = len;
  177. cp1 = (char *) &cpu->ipc_buffer[1];
  178. memcpy(cp1, cp2, len);
  179. /* atomic test and set */
  180. wmb();
  181. set_bit(cpuid, &hwrpb->rxrdy);
  182. if (wait_for_txrdy(cpumask))
  183. goto timeout;
  184. return;
  185. timeout:
  186. printk("Processor %x not ready\n", cpuid);
  187. }
  188. /*
  189. * A secondary console wants to send a message. Receive it.
  190. */
  191. static void
  192. recv_secondary_console_msg(void)
  193. {
  194. int mycpu, i, cnt;
  195. unsigned long txrdy = hwrpb->txrdy;
  196. char *cp1, *cp2, buf[80];
  197. struct percpu_struct *cpu;
  198. DBGS(("recv_secondary_console_msg: TXRDY 0x%lx.\n", txrdy));
  199. mycpu = hard_smp_processor_id();
  200. for (i = 0; i < NR_CPUS; i++) {
  201. if (!(txrdy & (1UL << i)))
  202. continue;
  203. DBGS(("recv_secondary_console_msg: "
  204. "TXRDY contains CPU %d.\n", i));
  205. cpu = (struct percpu_struct *)
  206. ((char*)hwrpb
  207. + hwrpb->processor_offset
  208. + i * hwrpb->processor_size);
  209. DBGS(("recv_secondary_console_msg: on %d from %d"
  210. " HALT_REASON 0x%lx FLAGS 0x%lx\n",
  211. mycpu, i, cpu->halt_reason, cpu->flags));
  212. cnt = cpu->ipc_buffer[0] >> 32;
  213. if (cnt <= 0 || cnt >= 80)
  214. strcpy(buf, "<<< BOGUS MSG >>>");
  215. else {
  216. cp1 = (char *) &cpu->ipc_buffer[11];
  217. cp2 = buf;
  218. strcpy(cp2, cp1);
  219. while ((cp2 = strchr(cp2, '\r')) != 0) {
  220. *cp2 = ' ';
  221. if (cp2[1] == '\n')
  222. cp2[1] = ' ';
  223. }
  224. }
  225. DBGS((KERN_INFO "recv_secondary_console_msg: on %d "
  226. "message is '%s'\n", mycpu, buf));
  227. }
  228. hwrpb->txrdy = 0;
  229. }
  230. /*
  231. * Convince the console to have a secondary cpu begin execution.
  232. */
  233. static int __init
  234. secondary_cpu_start(int cpuid, struct task_struct *idle)
  235. {
  236. struct percpu_struct *cpu;
  237. struct pcb_struct *hwpcb, *ipcb;
  238. unsigned long timeout;
  239. cpu = (struct percpu_struct *)
  240. ((char*)hwrpb
  241. + hwrpb->processor_offset
  242. + cpuid * hwrpb->processor_size);
  243. hwpcb = (struct pcb_struct *) cpu->hwpcb;
  244. ipcb = &task_thread_info(idle)->pcb;
  245. /* Initialize the CPU's HWPCB to something just good enough for
  246. us to get started. Immediately after starting, we'll swpctx
  247. to the target idle task's pcb. Reuse the stack in the mean
  248. time. Precalculate the target PCBB. */
  249. hwpcb->ksp = (unsigned long)ipcb + sizeof(union thread_union) - 16;
  250. hwpcb->usp = 0;
  251. hwpcb->ptbr = ipcb->ptbr;
  252. hwpcb->pcc = 0;
  253. hwpcb->asn = 0;
  254. hwpcb->unique = virt_to_phys(ipcb);
  255. hwpcb->flags = ipcb->flags;
  256. hwpcb->res1 = hwpcb->res2 = 0;
  257. #if 0
  258. DBGS(("KSP 0x%lx PTBR 0x%lx VPTBR 0x%lx UNIQUE 0x%lx\n",
  259. hwpcb->ksp, hwpcb->ptbr, hwrpb->vptb, hwpcb->unique));
  260. #endif
  261. DBGS(("Starting secondary cpu %d: state 0x%lx pal_flags 0x%lx\n",
  262. cpuid, idle->state, ipcb->flags));
  263. /* Setup HWRPB fields that SRM uses to activate secondary CPU */
  264. hwrpb->CPU_restart = __smp_callin;
  265. hwrpb->CPU_restart_data = (unsigned long) __smp_callin;
  266. /* Recalculate and update the HWRPB checksum */
  267. hwrpb_update_checksum(hwrpb);
  268. /*
  269. * Send a "start" command to the specified processor.
  270. */
  271. /* SRM III 3.4.1.3 */
  272. cpu->flags |= 0x22; /* turn on Context Valid and Restart Capable */
  273. cpu->flags &= ~1; /* turn off Bootstrap In Progress */
  274. wmb();
  275. send_secondary_console_msg("START\r\n", cpuid);
  276. /* Wait 10 seconds for an ACK from the console. */
  277. timeout = jiffies + 10*HZ;
  278. while (time_before(jiffies, timeout)) {
  279. if (cpu->flags & 1)
  280. goto started;
  281. udelay(10);
  282. barrier();
  283. }
  284. printk(KERN_ERR "SMP: Processor %d failed to start.\n", cpuid);
  285. return -1;
  286. started:
  287. DBGS(("secondary_cpu_start: SUCCESS for CPU %d!!!\n", cpuid));
  288. return 0;
  289. }
  290. /*
  291. * Bring one cpu online.
  292. */
  293. static int __init
  294. smp_boot_one_cpu(int cpuid)
  295. {
  296. struct task_struct *idle;
  297. unsigned long timeout;
  298. /* Cook up an idler for this guy. Note that the address we
  299. give to kernel_thread is irrelevant -- it's going to start
  300. where HWRPB.CPU_restart says to start. But this gets all
  301. the other task-y sort of data structures set up like we
  302. wish. We can't use kernel_thread since we must avoid
  303. rescheduling the child. */
  304. idle = fork_idle(cpuid);
  305. if (IS_ERR(idle))
  306. panic("failed fork for CPU %d", cpuid);
  307. DBGS(("smp_boot_one_cpu: CPU %d state 0x%lx flags 0x%lx\n",
  308. cpuid, idle->state, idle->flags));
  309. /* Signal the secondary to wait a moment. */
  310. smp_secondary_alive = -1;
  311. /* Whirrr, whirrr, whirrrrrrrrr... */
  312. if (secondary_cpu_start(cpuid, idle))
  313. return -1;
  314. /* Notify the secondary CPU it can run calibrate_delay. */
  315. mb();
  316. smp_secondary_alive = 0;
  317. /* We've been acked by the console; wait one second for
  318. the task to start up for real. */
  319. timeout = jiffies + 1*HZ;
  320. while (time_before(jiffies, timeout)) {
  321. if (smp_secondary_alive == 1)
  322. goto alive;
  323. udelay(10);
  324. barrier();
  325. }
  326. /* We failed to boot the CPU. */
  327. printk(KERN_ERR "SMP: Processor %d is stuck.\n", cpuid);
  328. return -1;
  329. alive:
  330. /* Another "Red Snapper". */
  331. return 0;
  332. }
  333. /*
  334. * Called from setup_arch. Detect an SMP system and which processors
  335. * are present.
  336. */
  337. void __init
  338. setup_smp(void)
  339. {
  340. struct percpu_struct *cpubase, *cpu;
  341. unsigned long i;
  342. if (boot_cpuid != 0) {
  343. printk(KERN_WARNING "SMP: Booting off cpu %d instead of 0?\n",
  344. boot_cpuid);
  345. }
  346. if (hwrpb->nr_processors > 1) {
  347. int boot_cpu_palrev;
  348. DBGS(("setup_smp: nr_processors %ld\n",
  349. hwrpb->nr_processors));
  350. cpubase = (struct percpu_struct *)
  351. ((char*)hwrpb + hwrpb->processor_offset);
  352. boot_cpu_palrev = cpubase->pal_revision;
  353. for (i = 0; i < hwrpb->nr_processors; i++) {
  354. cpu = (struct percpu_struct *)
  355. ((char *)cpubase + i*hwrpb->processor_size);
  356. if ((cpu->flags & 0x1cc) == 0x1cc) {
  357. smp_num_probed++;
  358. /* Assume here that "whami" == index */
  359. cpu_set(i, cpu_present_mask);
  360. cpu->pal_revision = boot_cpu_palrev;
  361. }
  362. DBGS(("setup_smp: CPU %d: flags 0x%lx type 0x%lx\n",
  363. i, cpu->flags, cpu->type));
  364. DBGS(("setup_smp: CPU %d: PAL rev 0x%lx\n",
  365. i, cpu->pal_revision));
  366. }
  367. } else {
  368. smp_num_probed = 1;
  369. cpu_set(boot_cpuid, cpu_present_mask);
  370. }
  371. printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_mask = %lx\n",
  372. smp_num_probed, cpu_possible_map.bits[0]);
  373. }
  374. /*
  375. * Called by smp_init prepare the secondaries
  376. */
  377. void __init
  378. smp_prepare_cpus(unsigned int max_cpus)
  379. {
  380. /* Take care of some initial bookkeeping. */
  381. memset(ipi_data, 0, sizeof(ipi_data));
  382. current_thread_info()->cpu = boot_cpuid;
  383. smp_store_cpu_info(boot_cpuid);
  384. smp_setup_percpu_timer(boot_cpuid);
  385. /* Nothing to do on a UP box, or when told not to. */
  386. if (smp_num_probed == 1 || max_cpus == 0) {
  387. cpu_present_mask = cpumask_of_cpu(boot_cpuid);
  388. printk(KERN_INFO "SMP mode deactivated.\n");
  389. return;
  390. }
  391. printk(KERN_INFO "SMP starting up secondaries.\n");
  392. smp_num_cpus = smp_num_probed;
  393. }
  394. void __devinit
  395. smp_prepare_boot_cpu(void)
  396. {
  397. /*
  398. * Mark the boot cpu (current cpu) as online
  399. */
  400. cpu_set(smp_processor_id(), cpu_online_map);
  401. }
  402. int __devinit
  403. __cpu_up(unsigned int cpu)
  404. {
  405. smp_boot_one_cpu(cpu);
  406. return cpu_online(cpu) ? 0 : -ENOSYS;
  407. }
  408. void __init
  409. smp_cpus_done(unsigned int max_cpus)
  410. {
  411. int cpu;
  412. unsigned long bogosum = 0;
  413. for(cpu = 0; cpu < NR_CPUS; cpu++)
  414. if (cpu_online(cpu))
  415. bogosum += cpu_data[cpu].loops_per_jiffy;
  416. printk(KERN_INFO "SMP: Total of %d processors activated "
  417. "(%lu.%02lu BogoMIPS).\n",
  418. num_online_cpus(),
  419. (bogosum + 2500) / (500000/HZ),
  420. ((bogosum + 2500) / (5000/HZ)) % 100);
  421. }
  422. void
  423. smp_percpu_timer_interrupt(struct pt_regs *regs)
  424. {
  425. int cpu = smp_processor_id();
  426. unsigned long user = user_mode(regs);
  427. struct cpuinfo_alpha *data = &cpu_data[cpu];
  428. /* Record kernel PC. */
  429. profile_tick(CPU_PROFILING, regs);
  430. if (!--data->prof_counter) {
  431. /* We need to make like a normal interrupt -- otherwise
  432. timer interrupts ignore the global interrupt lock,
  433. which would be a Bad Thing. */
  434. irq_enter();
  435. update_process_times(user);
  436. data->prof_counter = data->prof_multiplier;
  437. irq_exit();
  438. }
  439. }
  440. int __init
  441. setup_profiling_timer(unsigned int multiplier)
  442. {
  443. return -EINVAL;
  444. }
  445. static void
  446. send_ipi_message(cpumask_t to_whom, enum ipi_message_type operation)
  447. {
  448. int i;
  449. mb();
  450. for_each_cpu_mask(i, to_whom)
  451. set_bit(operation, &ipi_data[i].bits);
  452. mb();
  453. for_each_cpu_mask(i, to_whom)
  454. wripir(i);
  455. }
  456. /* Structure and data for smp_call_function. This is designed to
  457. minimize static memory requirements. Plus it looks cleaner. */
  458. struct smp_call_struct {
  459. void (*func) (void *info);
  460. void *info;
  461. long wait;
  462. atomic_t unstarted_count;
  463. atomic_t unfinished_count;
  464. };
  465. static struct smp_call_struct *smp_call_function_data;
  466. /* Atomicly drop data into a shared pointer. The pointer is free if
  467. it is initially locked. If retry, spin until free. */
  468. static int
  469. pointer_lock (void *lock, void *data, int retry)
  470. {
  471. void *old, *tmp;
  472. mb();
  473. again:
  474. /* Compare and swap with zero. */
  475. asm volatile (
  476. "1: ldq_l %0,%1\n"
  477. " mov %3,%2\n"
  478. " bne %0,2f\n"
  479. " stq_c %2,%1\n"
  480. " beq %2,1b\n"
  481. "2:"
  482. : "=&r"(old), "=m"(*(void **)lock), "=&r"(tmp)
  483. : "r"(data)
  484. : "memory");
  485. if (old == 0)
  486. return 0;
  487. if (! retry)
  488. return -EBUSY;
  489. while (*(void **)lock)
  490. barrier();
  491. goto again;
  492. }
  493. void
  494. handle_ipi(struct pt_regs *regs)
  495. {
  496. int this_cpu = smp_processor_id();
  497. unsigned long *pending_ipis = &ipi_data[this_cpu].bits;
  498. unsigned long ops;
  499. #if 0
  500. DBGS(("handle_ipi: on CPU %d ops 0x%lx PC 0x%lx\n",
  501. this_cpu, *pending_ipis, regs->pc));
  502. #endif
  503. mb(); /* Order interrupt and bit testing. */
  504. while ((ops = xchg(pending_ipis, 0)) != 0) {
  505. mb(); /* Order bit clearing and data access. */
  506. do {
  507. unsigned long which;
  508. which = ops & -ops;
  509. ops &= ~which;
  510. which = __ffs(which);
  511. switch (which) {
  512. case IPI_RESCHEDULE:
  513. /* Reschedule callback. Everything to be done
  514. is done by the interrupt return path. */
  515. break;
  516. case IPI_CALL_FUNC:
  517. {
  518. struct smp_call_struct *data;
  519. void (*func)(void *info);
  520. void *info;
  521. int wait;
  522. data = smp_call_function_data;
  523. func = data->func;
  524. info = data->info;
  525. wait = data->wait;
  526. /* Notify the sending CPU that the data has been
  527. received, and execution is about to begin. */
  528. mb();
  529. atomic_dec (&data->unstarted_count);
  530. /* At this point the structure may be gone unless
  531. wait is true. */
  532. (*func)(info);
  533. /* Notify the sending CPU that the task is done. */
  534. mb();
  535. if (wait) atomic_dec (&data->unfinished_count);
  536. break;
  537. }
  538. case IPI_CPU_STOP:
  539. halt();
  540. default:
  541. printk(KERN_CRIT "Unknown IPI on CPU %d: %lu\n",
  542. this_cpu, which);
  543. break;
  544. }
  545. } while (ops);
  546. mb(); /* Order data access and bit testing. */
  547. }
  548. cpu_data[this_cpu].ipi_count++;
  549. if (hwrpb->txrdy)
  550. recv_secondary_console_msg();
  551. }
  552. void
  553. smp_send_reschedule(int cpu)
  554. {
  555. #ifdef DEBUG_IPI_MSG
  556. if (cpu == hard_smp_processor_id())
  557. printk(KERN_WARNING
  558. "smp_send_reschedule: Sending IPI to self.\n");
  559. #endif
  560. send_ipi_message(cpumask_of_cpu(cpu), IPI_RESCHEDULE);
  561. }
  562. void
  563. smp_send_stop(void)
  564. {
  565. cpumask_t to_whom = cpu_possible_map;
  566. cpu_clear(smp_processor_id(), to_whom);
  567. #ifdef DEBUG_IPI_MSG
  568. if (hard_smp_processor_id() != boot_cpu_id)
  569. printk(KERN_WARNING "smp_send_stop: Not on boot cpu.\n");
  570. #endif
  571. send_ipi_message(to_whom, IPI_CPU_STOP);
  572. }
  573. /*
  574. * Run a function on all other CPUs.
  575. * <func> The function to run. This must be fast and non-blocking.
  576. * <info> An arbitrary pointer to pass to the function.
  577. * <retry> If true, keep retrying until ready.
  578. * <wait> If true, wait until function has completed on other CPUs.
  579. * [RETURNS] 0 on success, else a negative status code.
  580. *
  581. * Does not return until remote CPUs are nearly ready to execute <func>
  582. * or are or have executed.
  583. * You must not call this function with disabled interrupts or from a
  584. * hardware interrupt handler or from a bottom half handler.
  585. */
  586. int
  587. smp_call_function_on_cpu (void (*func) (void *info), void *info, int retry,
  588. int wait, cpumask_t to_whom)
  589. {
  590. struct smp_call_struct data;
  591. unsigned long timeout;
  592. int num_cpus_to_call;
  593. /* Can deadlock when called with interrupts disabled */
  594. WARN_ON(irqs_disabled());
  595. data.func = func;
  596. data.info = info;
  597. data.wait = wait;
  598. cpu_clear(smp_processor_id(), to_whom);
  599. num_cpus_to_call = cpus_weight(to_whom);
  600. atomic_set(&data.unstarted_count, num_cpus_to_call);
  601. atomic_set(&data.unfinished_count, num_cpus_to_call);
  602. /* Acquire the smp_call_function_data mutex. */
  603. if (pointer_lock(&smp_call_function_data, &data, retry))
  604. return -EBUSY;
  605. /* Send a message to the requested CPUs. */
  606. send_ipi_message(to_whom, IPI_CALL_FUNC);
  607. /* Wait for a minimal response. */
  608. timeout = jiffies + HZ;
  609. while (atomic_read (&data.unstarted_count) > 0
  610. && time_before (jiffies, timeout))
  611. barrier();
  612. /* If there's no response yet, log a message but allow a longer
  613. * timeout period -- if we get a response this time, log
  614. * a message saying when we got it..
  615. */
  616. if (atomic_read(&data.unstarted_count) > 0) {
  617. long start_time = jiffies;
  618. printk(KERN_ERR "%s: initial timeout -- trying long wait\n",
  619. __FUNCTION__);
  620. timeout = jiffies + 30 * HZ;
  621. while (atomic_read(&data.unstarted_count) > 0
  622. && time_before(jiffies, timeout))
  623. barrier();
  624. if (atomic_read(&data.unstarted_count) <= 0) {
  625. long delta = jiffies - start_time;
  626. printk(KERN_ERR
  627. "%s: response %ld.%ld seconds into long wait\n",
  628. __FUNCTION__, delta / HZ,
  629. (100 * (delta - ((delta / HZ) * HZ))) / HZ);
  630. }
  631. }
  632. /* We either got one or timed out -- clear the lock. */
  633. mb();
  634. smp_call_function_data = NULL;
  635. /*
  636. * If after both the initial and long timeout periods we still don't
  637. * have a response, something is very wrong...
  638. */
  639. BUG_ON(atomic_read (&data.unstarted_count) > 0);
  640. /* Wait for a complete response, if needed. */
  641. if (wait) {
  642. while (atomic_read (&data.unfinished_count) > 0)
  643. barrier();
  644. }
  645. return 0;
  646. }
  647. int
  648. smp_call_function (void (*func) (void *info), void *info, int retry, int wait)
  649. {
  650. return smp_call_function_on_cpu (func, info, retry, wait,
  651. cpu_online_map);
  652. }
  653. static void
  654. ipi_imb(void *ignored)
  655. {
  656. imb();
  657. }
  658. void
  659. smp_imb(void)
  660. {
  661. /* Must wait other processors to flush their icache before continue. */
  662. if (on_each_cpu(ipi_imb, NULL, 1, 1))
  663. printk(KERN_CRIT "smp_imb: timed out\n");
  664. }
  665. static void
  666. ipi_flush_tlb_all(void *ignored)
  667. {
  668. tbia();
  669. }
  670. void
  671. flush_tlb_all(void)
  672. {
  673. /* Although we don't have any data to pass, we do want to
  674. synchronize with the other processors. */
  675. if (on_each_cpu(ipi_flush_tlb_all, NULL, 1, 1)) {
  676. printk(KERN_CRIT "flush_tlb_all: timed out\n");
  677. }
  678. }
  679. #define asn_locked() (cpu_data[smp_processor_id()].asn_lock)
  680. static void
  681. ipi_flush_tlb_mm(void *x)
  682. {
  683. struct mm_struct *mm = (struct mm_struct *) x;
  684. if (mm == current->active_mm && !asn_locked())
  685. flush_tlb_current(mm);
  686. else
  687. flush_tlb_other(mm);
  688. }
  689. void
  690. flush_tlb_mm(struct mm_struct *mm)
  691. {
  692. preempt_disable();
  693. if (mm == current->active_mm) {
  694. flush_tlb_current(mm);
  695. if (atomic_read(&mm->mm_users) <= 1) {
  696. int cpu, this_cpu = smp_processor_id();
  697. for (cpu = 0; cpu < NR_CPUS; cpu++) {
  698. if (!cpu_online(cpu) || cpu == this_cpu)
  699. continue;
  700. if (mm->context[cpu])
  701. mm->context[cpu] = 0;
  702. }
  703. preempt_enable();
  704. return;
  705. }
  706. }
  707. if (smp_call_function(ipi_flush_tlb_mm, mm, 1, 1)) {
  708. printk(KERN_CRIT "flush_tlb_mm: timed out\n");
  709. }
  710. preempt_enable();
  711. }
  712. struct flush_tlb_page_struct {
  713. struct vm_area_struct *vma;
  714. struct mm_struct *mm;
  715. unsigned long addr;
  716. };
  717. static void
  718. ipi_flush_tlb_page(void *x)
  719. {
  720. struct flush_tlb_page_struct *data = (struct flush_tlb_page_struct *)x;
  721. struct mm_struct * mm = data->mm;
  722. if (mm == current->active_mm && !asn_locked())
  723. flush_tlb_current_page(mm, data->vma, data->addr);
  724. else
  725. flush_tlb_other(mm);
  726. }
  727. void
  728. flush_tlb_page(struct vm_area_struct *vma, unsigned long addr)
  729. {
  730. struct flush_tlb_page_struct data;
  731. struct mm_struct *mm = vma->vm_mm;
  732. preempt_disable();
  733. if (mm == current->active_mm) {
  734. flush_tlb_current_page(mm, vma, addr);
  735. if (atomic_read(&mm->mm_users) <= 1) {
  736. int cpu, this_cpu = smp_processor_id();
  737. for (cpu = 0; cpu < NR_CPUS; cpu++) {
  738. if (!cpu_online(cpu) || cpu == this_cpu)
  739. continue;
  740. if (mm->context[cpu])
  741. mm->context[cpu] = 0;
  742. }
  743. preempt_enable();
  744. return;
  745. }
  746. }
  747. data.vma = vma;
  748. data.mm = mm;
  749. data.addr = addr;
  750. if (smp_call_function(ipi_flush_tlb_page, &data, 1, 1)) {
  751. printk(KERN_CRIT "flush_tlb_page: timed out\n");
  752. }
  753. preempt_enable();
  754. }
  755. void
  756. flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
  757. {
  758. /* On the Alpha we always flush the whole user tlb. */
  759. flush_tlb_mm(vma->vm_mm);
  760. }
  761. static void
  762. ipi_flush_icache_page(void *x)
  763. {
  764. struct mm_struct *mm = (struct mm_struct *) x;
  765. if (mm == current->active_mm && !asn_locked())
  766. __load_new_mm_context(mm);
  767. else
  768. flush_tlb_other(mm);
  769. }
  770. void
  771. flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
  772. unsigned long addr, int len)
  773. {
  774. struct mm_struct *mm = vma->vm_mm;
  775. if ((vma->vm_flags & VM_EXEC) == 0)
  776. return;
  777. preempt_disable();
  778. if (mm == current->active_mm) {
  779. __load_new_mm_context(mm);
  780. if (atomic_read(&mm->mm_users) <= 1) {
  781. int cpu, this_cpu = smp_processor_id();
  782. for (cpu = 0; cpu < NR_CPUS; cpu++) {
  783. if (!cpu_online(cpu) || cpu == this_cpu)
  784. continue;
  785. if (mm->context[cpu])
  786. mm->context[cpu] = 0;
  787. }
  788. preempt_enable();
  789. return;
  790. }
  791. }
  792. if (smp_call_function(ipi_flush_icache_page, mm, 1, 1)) {
  793. printk(KERN_CRIT "flush_icache_page: timed out\n");
  794. }
  795. preempt_enable();
  796. }