davinci-pcm.c 26 KB

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  1. /*
  2. * ALSA PCM interface for the TI DAVINCI processor
  3. *
  4. * Author: Vladimir Barinov, <vbarinov@embeddedalley.com>
  5. * Copyright: (C) 2007 MontaVista Software, Inc., <source@mvista.com>
  6. * added SRAM ping/pong (C) 2008 Troy Kisky <troy.kisky@boundarydevices.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/slab.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/kernel.h>
  18. #include <linux/genalloc.h>
  19. #include <sound/core.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/soc.h>
  23. #include <asm/dma.h>
  24. #include "davinci-pcm.h"
  25. #ifdef DEBUG
  26. static void print_buf_info(int slot, char *name)
  27. {
  28. struct edmacc_param p;
  29. if (slot < 0)
  30. return;
  31. edma_read_slot(slot, &p);
  32. printk(KERN_DEBUG "%s: 0x%x, opt=%x, src=%x, a_b_cnt=%x dst=%x\n",
  33. name, slot, p.opt, p.src, p.a_b_cnt, p.dst);
  34. printk(KERN_DEBUG " src_dst_bidx=%x link_bcntrld=%x src_dst_cidx=%x ccnt=%x\n",
  35. p.src_dst_bidx, p.link_bcntrld, p.src_dst_cidx, p.ccnt);
  36. }
  37. #else
  38. static void print_buf_info(int slot, char *name)
  39. {
  40. }
  41. #endif
  42. #define DAVINCI_PCM_FMTBITS (\
  43. SNDRV_PCM_FMTBIT_S8 |\
  44. SNDRV_PCM_FMTBIT_U8 |\
  45. SNDRV_PCM_FMTBIT_S16_LE |\
  46. SNDRV_PCM_FMTBIT_S16_BE |\
  47. SNDRV_PCM_FMTBIT_U16_LE |\
  48. SNDRV_PCM_FMTBIT_U16_BE |\
  49. SNDRV_PCM_FMTBIT_S24_LE |\
  50. SNDRV_PCM_FMTBIT_S24_BE |\
  51. SNDRV_PCM_FMTBIT_U24_LE |\
  52. SNDRV_PCM_FMTBIT_U24_BE |\
  53. SNDRV_PCM_FMTBIT_S32_LE |\
  54. SNDRV_PCM_FMTBIT_S32_BE |\
  55. SNDRV_PCM_FMTBIT_U32_LE |\
  56. SNDRV_PCM_FMTBIT_U32_BE)
  57. static struct snd_pcm_hardware pcm_hardware_playback = {
  58. .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  59. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  60. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME|
  61. SNDRV_PCM_INFO_BATCH),
  62. .formats = DAVINCI_PCM_FMTBITS,
  63. .rates = SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT,
  64. .rate_min = 8000,
  65. .rate_max = 192000,
  66. .channels_min = 2,
  67. .channels_max = 384,
  68. .buffer_bytes_max = 128 * 1024,
  69. .period_bytes_min = 32,
  70. .period_bytes_max = 8 * 1024,
  71. .periods_min = 16,
  72. .periods_max = 255,
  73. .fifo_size = 0,
  74. };
  75. static struct snd_pcm_hardware pcm_hardware_capture = {
  76. .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  77. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  78. SNDRV_PCM_INFO_PAUSE |
  79. SNDRV_PCM_INFO_BATCH),
  80. .formats = DAVINCI_PCM_FMTBITS,
  81. .rates = SNDRV_PCM_RATE_8000_192000 | SNDRV_PCM_RATE_KNOT,
  82. .rate_min = 8000,
  83. .rate_max = 192000,
  84. .channels_min = 2,
  85. .channels_max = 384,
  86. .buffer_bytes_max = 128 * 1024,
  87. .period_bytes_min = 32,
  88. .period_bytes_max = 8 * 1024,
  89. .periods_min = 16,
  90. .periods_max = 255,
  91. .fifo_size = 0,
  92. };
  93. /*
  94. * How ping/pong works....
  95. *
  96. * Playback:
  97. * ram_params - copys 2*ping_size from start of SDRAM to iram,
  98. * links to ram_link2
  99. * ram_link2 - copys rest of SDRAM to iram in ping_size units,
  100. * links to ram_link
  101. * ram_link - copys entire SDRAM to iram in ping_size uints,
  102. * links to self
  103. *
  104. * asp_params - same as asp_link[0]
  105. * asp_link[0] - copys from lower half of iram to asp port
  106. * links to asp_link[1], triggers iram copy event on completion
  107. * asp_link[1] - copys from upper half of iram to asp port
  108. * links to asp_link[0], triggers iram copy event on completion
  109. * triggers interrupt only needed to let upper SOC levels update position
  110. * in stream on completion
  111. *
  112. * When playback is started:
  113. * ram_params started
  114. * asp_params started
  115. *
  116. * Capture:
  117. * ram_params - same as ram_link,
  118. * links to ram_link
  119. * ram_link - same as playback
  120. * links to self
  121. *
  122. * asp_params - same as playback
  123. * asp_link[0] - same as playback
  124. * asp_link[1] - same as playback
  125. *
  126. * When capture is started:
  127. * asp_params started
  128. */
  129. struct davinci_runtime_data {
  130. spinlock_t lock;
  131. int period; /* current DMA period */
  132. int asp_channel; /* Master DMA channel */
  133. int asp_link[2]; /* asp parameter link channel, ping/pong */
  134. struct davinci_pcm_dma_params *params; /* DMA params */
  135. int ram_channel;
  136. int ram_link;
  137. int ram_link2;
  138. struct edmacc_param asp_params;
  139. struct edmacc_param ram_params;
  140. };
  141. static void davinci_pcm_period_elapsed(struct snd_pcm_substream *substream)
  142. {
  143. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  144. struct snd_pcm_runtime *runtime = substream->runtime;
  145. prtd->period++;
  146. if (unlikely(prtd->period >= runtime->periods))
  147. prtd->period = 0;
  148. }
  149. static void davinci_pcm_period_reset(struct snd_pcm_substream *substream)
  150. {
  151. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  152. prtd->period = 0;
  153. }
  154. /*
  155. * Not used with ping/pong
  156. */
  157. static void davinci_pcm_enqueue_dma(struct snd_pcm_substream *substream)
  158. {
  159. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  160. struct snd_pcm_runtime *runtime = substream->runtime;
  161. unsigned int period_size;
  162. unsigned int dma_offset;
  163. dma_addr_t dma_pos;
  164. dma_addr_t src, dst;
  165. unsigned short src_bidx, dst_bidx;
  166. unsigned short src_cidx, dst_cidx;
  167. unsigned int data_type;
  168. unsigned short acnt;
  169. unsigned int count;
  170. unsigned int fifo_level;
  171. period_size = snd_pcm_lib_period_bytes(substream);
  172. dma_offset = prtd->period * period_size;
  173. dma_pos = runtime->dma_addr + dma_offset;
  174. fifo_level = prtd->params->fifo_level;
  175. pr_debug("davinci_pcm: audio_set_dma_params_play channel = %d "
  176. "dma_ptr = %x period_size=%x\n", prtd->asp_link[0], dma_pos,
  177. period_size);
  178. data_type = prtd->params->data_type;
  179. count = period_size / data_type;
  180. if (fifo_level)
  181. count /= fifo_level;
  182. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  183. src = dma_pos;
  184. dst = prtd->params->dma_addr;
  185. src_bidx = data_type;
  186. dst_bidx = 4;
  187. src_cidx = data_type * fifo_level;
  188. dst_cidx = 0;
  189. } else {
  190. src = prtd->params->dma_addr;
  191. dst = dma_pos;
  192. src_bidx = 0;
  193. dst_bidx = data_type;
  194. src_cidx = 0;
  195. dst_cidx = data_type * fifo_level;
  196. }
  197. acnt = prtd->params->acnt;
  198. edma_set_src(prtd->asp_link[0], src, INCR, W8BIT);
  199. edma_set_dest(prtd->asp_link[0], dst, INCR, W8BIT);
  200. edma_set_src_index(prtd->asp_link[0], src_bidx, src_cidx);
  201. edma_set_dest_index(prtd->asp_link[0], dst_bidx, dst_cidx);
  202. if (!fifo_level)
  203. edma_set_transfer_params(prtd->asp_link[0], acnt, count, 1, 0,
  204. ASYNC);
  205. else
  206. edma_set_transfer_params(prtd->asp_link[0], acnt,
  207. fifo_level,
  208. count, fifo_level,
  209. ABSYNC);
  210. }
  211. static void davinci_pcm_dma_irq(unsigned link, u16 ch_status, void *data)
  212. {
  213. struct snd_pcm_substream *substream = data;
  214. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  215. print_buf_info(prtd->ram_channel, "i ram_channel");
  216. pr_debug("davinci_pcm: link=%d, status=0x%x\n", link, ch_status);
  217. if (unlikely(ch_status != DMA_COMPLETE))
  218. return;
  219. if (snd_pcm_running(substream)) {
  220. spin_lock(&prtd->lock);
  221. if (prtd->ram_channel < 0) {
  222. /* No ping/pong must fix up link dma data*/
  223. davinci_pcm_enqueue_dma(substream);
  224. }
  225. davinci_pcm_period_elapsed(substream);
  226. spin_unlock(&prtd->lock);
  227. snd_pcm_period_elapsed(substream);
  228. }
  229. }
  230. #ifdef CONFIG_GENERIC_ALLOCATOR
  231. static int allocate_sram(struct snd_pcm_substream *substream,
  232. struct gen_pool *sram_pool, unsigned size,
  233. struct snd_pcm_hardware *ppcm)
  234. {
  235. struct snd_dma_buffer *buf = &substream->dma_buffer;
  236. struct snd_dma_buffer *iram_dma = NULL;
  237. dma_addr_t iram_phys = 0;
  238. void *iram_virt = NULL;
  239. if (buf->private_data || !size)
  240. return 0;
  241. ppcm->period_bytes_max = size;
  242. iram_virt = (void *)gen_pool_alloc(sram_pool, size);
  243. if (!iram_virt)
  244. goto exit1;
  245. iram_phys = gen_pool_virt_to_phys(sram_pool, (unsigned)iram_virt);
  246. iram_dma = kzalloc(sizeof(*iram_dma), GFP_KERNEL);
  247. if (!iram_dma)
  248. goto exit2;
  249. iram_dma->area = iram_virt;
  250. iram_dma->addr = iram_phys;
  251. memset(iram_dma->area, 0, size);
  252. iram_dma->bytes = size;
  253. buf->private_data = iram_dma;
  254. return 0;
  255. exit2:
  256. if (iram_virt)
  257. gen_pool_free(sram_pool, (unsigned)iram_virt, size);
  258. exit1:
  259. return -ENOMEM;
  260. }
  261. static void davinci_free_sram(struct snd_pcm_substream *substream,
  262. struct snd_dma_buffer *iram_dma)
  263. {
  264. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  265. struct gen_pool *sram_pool = prtd->params->sram_pool;
  266. gen_pool_free(sram_pool, (unsigned) iram_dma->area, iram_dma->bytes);
  267. }
  268. #else
  269. static int allocate_sram(struct snd_pcm_substream *substream,
  270. struct gen_pool *sram_pool, unsigned size,
  271. struct snd_pcm_hardware *ppcm)
  272. {
  273. return 0;
  274. }
  275. static void davinci_free_sram(struct snd_pcm_substream *substream,
  276. struct snd_dma_buffer *iram_dma)
  277. {
  278. }
  279. #endif
  280. /*
  281. * Only used with ping/pong.
  282. * This is called after runtime->dma_addr, period_bytes and data_type are valid
  283. */
  284. static int ping_pong_dma_setup(struct snd_pcm_substream *substream)
  285. {
  286. unsigned short ram_src_cidx, ram_dst_cidx;
  287. struct snd_pcm_runtime *runtime = substream->runtime;
  288. struct davinci_runtime_data *prtd = runtime->private_data;
  289. struct snd_dma_buffer *iram_dma =
  290. (struct snd_dma_buffer *)substream->dma_buffer.private_data;
  291. struct davinci_pcm_dma_params *params = prtd->params;
  292. unsigned int data_type = params->data_type;
  293. unsigned int acnt = params->acnt;
  294. /* divide by 2 for ping/pong */
  295. unsigned int ping_size = snd_pcm_lib_period_bytes(substream) >> 1;
  296. unsigned int fifo_level = prtd->params->fifo_level;
  297. unsigned int count;
  298. if ((data_type == 0) || (data_type > 4)) {
  299. printk(KERN_ERR "%s: data_type=%i\n", __func__, data_type);
  300. return -EINVAL;
  301. }
  302. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  303. dma_addr_t asp_src_pong = iram_dma->addr + ping_size;
  304. ram_src_cidx = ping_size;
  305. ram_dst_cidx = -ping_size;
  306. edma_set_src(prtd->asp_link[1], asp_src_pong, INCR, W8BIT);
  307. edma_set_src_index(prtd->asp_link[0], data_type,
  308. data_type * fifo_level);
  309. edma_set_src_index(prtd->asp_link[1], data_type,
  310. data_type * fifo_level);
  311. edma_set_src(prtd->ram_link, runtime->dma_addr, INCR, W32BIT);
  312. } else {
  313. dma_addr_t asp_dst_pong = iram_dma->addr + ping_size;
  314. ram_src_cidx = -ping_size;
  315. ram_dst_cidx = ping_size;
  316. edma_set_dest(prtd->asp_link[1], asp_dst_pong, INCR, W8BIT);
  317. edma_set_dest_index(prtd->asp_link[0], data_type,
  318. data_type * fifo_level);
  319. edma_set_dest_index(prtd->asp_link[1], data_type,
  320. data_type * fifo_level);
  321. edma_set_dest(prtd->ram_link, runtime->dma_addr, INCR, W32BIT);
  322. }
  323. if (!fifo_level) {
  324. count = ping_size / data_type;
  325. edma_set_transfer_params(prtd->asp_link[0], acnt, count,
  326. 1, 0, ASYNC);
  327. edma_set_transfer_params(prtd->asp_link[1], acnt, count,
  328. 1, 0, ASYNC);
  329. } else {
  330. count = ping_size / (data_type * fifo_level);
  331. edma_set_transfer_params(prtd->asp_link[0], acnt, fifo_level,
  332. count, fifo_level, ABSYNC);
  333. edma_set_transfer_params(prtd->asp_link[1], acnt, fifo_level,
  334. count, fifo_level, ABSYNC);
  335. }
  336. edma_set_src_index(prtd->ram_link, ping_size, ram_src_cidx);
  337. edma_set_dest_index(prtd->ram_link, ping_size, ram_dst_cidx);
  338. edma_set_transfer_params(prtd->ram_link, ping_size, 2,
  339. runtime->periods, 2, ASYNC);
  340. /* init master params */
  341. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  342. edma_read_slot(prtd->ram_link, &prtd->ram_params);
  343. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  344. struct edmacc_param p_ram;
  345. /* Copy entire iram buffer before playback started */
  346. prtd->ram_params.a_b_cnt = (1 << 16) | (ping_size << 1);
  347. /* 0 dst_bidx */
  348. prtd->ram_params.src_dst_bidx = (ping_size << 1);
  349. /* 0 dst_cidx */
  350. prtd->ram_params.src_dst_cidx = (ping_size << 1);
  351. prtd->ram_params.ccnt = 1;
  352. /* Skip 1st period */
  353. edma_read_slot(prtd->ram_link, &p_ram);
  354. p_ram.src += (ping_size << 1);
  355. p_ram.ccnt -= 1;
  356. edma_write_slot(prtd->ram_link2, &p_ram);
  357. /*
  358. * When 1st started, ram -> iram dma channel will fill the
  359. * entire iram. Then, whenever a ping/pong asp buffer finishes,
  360. * 1/2 iram will be filled.
  361. */
  362. prtd->ram_params.link_bcntrld =
  363. EDMA_CHAN_SLOT(prtd->ram_link2) << 5;
  364. }
  365. return 0;
  366. }
  367. /* 1 asp tx or rx channel using 2 parameter channels
  368. * 1 ram to/from iram channel using 1 parameter channel
  369. *
  370. * Playback
  371. * ram copy channel kicks off first,
  372. * 1st ram copy of entire iram buffer completion kicks off asp channel
  373. * asp tcc always kicks off ram copy of 1/2 iram buffer
  374. *
  375. * Record
  376. * asp channel starts, tcc kicks off ram copy
  377. */
  378. static int request_ping_pong(struct snd_pcm_substream *substream,
  379. struct davinci_runtime_data *prtd,
  380. struct snd_dma_buffer *iram_dma)
  381. {
  382. dma_addr_t asp_src_ping;
  383. dma_addr_t asp_dst_ping;
  384. int ret;
  385. struct davinci_pcm_dma_params *params = prtd->params;
  386. /* Request ram master channel */
  387. ret = prtd->ram_channel = edma_alloc_channel(EDMA_CHANNEL_ANY,
  388. davinci_pcm_dma_irq, substream,
  389. prtd->params->ram_chan_q);
  390. if (ret < 0)
  391. goto exit1;
  392. /* Request ram link channel */
  393. ret = prtd->ram_link = edma_alloc_slot(
  394. EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
  395. if (ret < 0)
  396. goto exit2;
  397. ret = prtd->asp_link[1] = edma_alloc_slot(
  398. EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
  399. if (ret < 0)
  400. goto exit3;
  401. prtd->ram_link2 = -1;
  402. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  403. ret = prtd->ram_link2 = edma_alloc_slot(
  404. EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
  405. if (ret < 0)
  406. goto exit4;
  407. }
  408. /* circle ping-pong buffers */
  409. edma_link(prtd->asp_link[0], prtd->asp_link[1]);
  410. edma_link(prtd->asp_link[1], prtd->asp_link[0]);
  411. /* circle ram buffers */
  412. edma_link(prtd->ram_link, prtd->ram_link);
  413. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  414. asp_src_ping = iram_dma->addr;
  415. asp_dst_ping = params->dma_addr; /* fifo */
  416. } else {
  417. asp_src_ping = params->dma_addr; /* fifo */
  418. asp_dst_ping = iram_dma->addr;
  419. }
  420. /* ping */
  421. edma_set_src(prtd->asp_link[0], asp_src_ping, INCR, W16BIT);
  422. edma_set_dest(prtd->asp_link[0], asp_dst_ping, INCR, W16BIT);
  423. edma_set_src_index(prtd->asp_link[0], 0, 0);
  424. edma_set_dest_index(prtd->asp_link[0], 0, 0);
  425. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  426. prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f) | TCINTEN);
  427. prtd->asp_params.opt |= TCCHEN |
  428. EDMA_TCC(prtd->ram_channel & 0x3f);
  429. edma_write_slot(prtd->asp_link[0], &prtd->asp_params);
  430. /* pong */
  431. edma_set_src(prtd->asp_link[1], asp_src_ping, INCR, W16BIT);
  432. edma_set_dest(prtd->asp_link[1], asp_dst_ping, INCR, W16BIT);
  433. edma_set_src_index(prtd->asp_link[1], 0, 0);
  434. edma_set_dest_index(prtd->asp_link[1], 0, 0);
  435. edma_read_slot(prtd->asp_link[1], &prtd->asp_params);
  436. prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f));
  437. /* interrupt after every pong completion */
  438. prtd->asp_params.opt |= TCINTEN | TCCHEN |
  439. EDMA_TCC(prtd->ram_channel & 0x3f);
  440. edma_write_slot(prtd->asp_link[1], &prtd->asp_params);
  441. /* ram */
  442. edma_set_src(prtd->ram_link, iram_dma->addr, INCR, W32BIT);
  443. edma_set_dest(prtd->ram_link, iram_dma->addr, INCR, W32BIT);
  444. pr_debug("%s: audio dma channels/slots in use for ram:%u %u %u,"
  445. "for asp:%u %u %u\n", __func__,
  446. prtd->ram_channel, prtd->ram_link, prtd->ram_link2,
  447. prtd->asp_channel, prtd->asp_link[0],
  448. prtd->asp_link[1]);
  449. return 0;
  450. exit4:
  451. edma_free_channel(prtd->asp_link[1]);
  452. prtd->asp_link[1] = -1;
  453. exit3:
  454. edma_free_channel(prtd->ram_link);
  455. prtd->ram_link = -1;
  456. exit2:
  457. edma_free_channel(prtd->ram_channel);
  458. prtd->ram_channel = -1;
  459. exit1:
  460. return ret;
  461. }
  462. static int davinci_pcm_dma_request(struct snd_pcm_substream *substream)
  463. {
  464. struct snd_dma_buffer *iram_dma;
  465. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  466. struct davinci_pcm_dma_params *params = prtd->params;
  467. int ret;
  468. if (!params)
  469. return -ENODEV;
  470. /* Request asp master DMA channel */
  471. ret = prtd->asp_channel = edma_alloc_channel(params->channel,
  472. davinci_pcm_dma_irq, substream,
  473. prtd->params->asp_chan_q);
  474. if (ret < 0)
  475. goto exit1;
  476. /* Request asp link channels */
  477. ret = prtd->asp_link[0] = edma_alloc_slot(
  478. EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
  479. if (ret < 0)
  480. goto exit2;
  481. iram_dma = (struct snd_dma_buffer *)substream->dma_buffer.private_data;
  482. if (iram_dma) {
  483. if (request_ping_pong(substream, prtd, iram_dma) == 0)
  484. return 0;
  485. printk(KERN_WARNING "%s: dma channel allocation failed,"
  486. "not using sram\n", __func__);
  487. }
  488. /* Issue transfer completion IRQ when the channel completes a
  489. * transfer, then always reload from the same slot (by a kind
  490. * of loopback link). The completion IRQ handler will update
  491. * the reload slot with a new buffer.
  492. *
  493. * REVISIT save p_ram here after setting up everything except
  494. * the buffer and its length (ccnt) ... use it as a template
  495. * so davinci_pcm_enqueue_dma() takes less time in IRQ.
  496. */
  497. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  498. prtd->asp_params.opt |= TCINTEN |
  499. EDMA_TCC(EDMA_CHAN_SLOT(prtd->asp_channel));
  500. prtd->asp_params.link_bcntrld = EDMA_CHAN_SLOT(prtd->asp_link[0]) << 5;
  501. edma_write_slot(prtd->asp_link[0], &prtd->asp_params);
  502. return 0;
  503. exit2:
  504. edma_free_channel(prtd->asp_channel);
  505. prtd->asp_channel = -1;
  506. exit1:
  507. return ret;
  508. }
  509. static int davinci_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  510. {
  511. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  512. int ret = 0;
  513. spin_lock(&prtd->lock);
  514. switch (cmd) {
  515. case SNDRV_PCM_TRIGGER_START:
  516. edma_start(prtd->asp_channel);
  517. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
  518. prtd->ram_channel >= 0) {
  519. /* copy 1st iram buffer */
  520. edma_start(prtd->ram_channel);
  521. }
  522. break;
  523. case SNDRV_PCM_TRIGGER_RESUME:
  524. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  525. edma_resume(prtd->asp_channel);
  526. break;
  527. case SNDRV_PCM_TRIGGER_STOP:
  528. case SNDRV_PCM_TRIGGER_SUSPEND:
  529. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  530. edma_pause(prtd->asp_channel);
  531. break;
  532. default:
  533. ret = -EINVAL;
  534. break;
  535. }
  536. spin_unlock(&prtd->lock);
  537. return ret;
  538. }
  539. static int davinci_pcm_prepare(struct snd_pcm_substream *substream)
  540. {
  541. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  542. davinci_pcm_period_reset(substream);
  543. if (prtd->ram_channel >= 0) {
  544. int ret = ping_pong_dma_setup(substream);
  545. if (ret < 0)
  546. return ret;
  547. edma_write_slot(prtd->ram_channel, &prtd->ram_params);
  548. edma_write_slot(prtd->asp_channel, &prtd->asp_params);
  549. print_buf_info(prtd->ram_channel, "ram_channel");
  550. print_buf_info(prtd->ram_link, "ram_link");
  551. print_buf_info(prtd->ram_link2, "ram_link2");
  552. print_buf_info(prtd->asp_channel, "asp_channel");
  553. print_buf_info(prtd->asp_link[0], "asp_link[0]");
  554. print_buf_info(prtd->asp_link[1], "asp_link[1]");
  555. /*
  556. * There is a phase offset of 2 periods between the position
  557. * used by dma setup and the position reported in the pointer
  558. * function.
  559. *
  560. * The phase offset, when not using ping-pong buffers, is due to
  561. * the two consecutive calls to davinci_pcm_enqueue_dma() below.
  562. *
  563. * Whereas here, with ping-pong buffers, the phase is due to
  564. * there being an entire buffer transfer complete before the
  565. * first dma completion event triggers davinci_pcm_dma_irq().
  566. */
  567. davinci_pcm_period_elapsed(substream);
  568. davinci_pcm_period_elapsed(substream);
  569. return 0;
  570. }
  571. davinci_pcm_enqueue_dma(substream);
  572. davinci_pcm_period_elapsed(substream);
  573. /* Copy self-linked parameter RAM entry into master channel */
  574. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  575. edma_write_slot(prtd->asp_channel, &prtd->asp_params);
  576. davinci_pcm_enqueue_dma(substream);
  577. davinci_pcm_period_elapsed(substream);
  578. return 0;
  579. }
  580. static snd_pcm_uframes_t
  581. davinci_pcm_pointer(struct snd_pcm_substream *substream)
  582. {
  583. struct snd_pcm_runtime *runtime = substream->runtime;
  584. struct davinci_runtime_data *prtd = runtime->private_data;
  585. unsigned int offset;
  586. int asp_count;
  587. unsigned int period_size = snd_pcm_lib_period_bytes(substream);
  588. /*
  589. * There is a phase offset of 2 periods between the position used by dma
  590. * setup and the position reported in the pointer function. Either +2 in
  591. * the dma setup or -2 here in the pointer function (with wrapping,
  592. * both) accounts for this offset -- choose the latter since it makes
  593. * the first-time setup clearer.
  594. */
  595. spin_lock(&prtd->lock);
  596. asp_count = prtd->period - 2;
  597. spin_unlock(&prtd->lock);
  598. if (asp_count < 0)
  599. asp_count += runtime->periods;
  600. asp_count *= period_size;
  601. offset = bytes_to_frames(runtime, asp_count);
  602. if (offset >= runtime->buffer_size)
  603. offset = 0;
  604. return offset;
  605. }
  606. static int davinci_pcm_open(struct snd_pcm_substream *substream)
  607. {
  608. struct snd_pcm_runtime *runtime = substream->runtime;
  609. struct davinci_runtime_data *prtd;
  610. struct snd_pcm_hardware *ppcm;
  611. int ret = 0;
  612. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  613. struct davinci_pcm_dma_params *pa;
  614. struct davinci_pcm_dma_params *params;
  615. pa = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
  616. if (!pa)
  617. return -ENODEV;
  618. params = &pa[substream->stream];
  619. ppcm = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
  620. &pcm_hardware_playback : &pcm_hardware_capture;
  621. allocate_sram(substream, params->sram_pool, params->sram_size, ppcm);
  622. snd_soc_set_runtime_hwparams(substream, ppcm);
  623. /* ensure that buffer size is a multiple of period size */
  624. ret = snd_pcm_hw_constraint_integer(runtime,
  625. SNDRV_PCM_HW_PARAM_PERIODS);
  626. if (ret < 0)
  627. return ret;
  628. prtd = kzalloc(sizeof(struct davinci_runtime_data), GFP_KERNEL);
  629. if (prtd == NULL)
  630. return -ENOMEM;
  631. spin_lock_init(&prtd->lock);
  632. prtd->params = params;
  633. prtd->asp_channel = -1;
  634. prtd->asp_link[0] = prtd->asp_link[1] = -1;
  635. prtd->ram_channel = -1;
  636. prtd->ram_link = -1;
  637. prtd->ram_link2 = -1;
  638. runtime->private_data = prtd;
  639. ret = davinci_pcm_dma_request(substream);
  640. if (ret) {
  641. printk(KERN_ERR "davinci_pcm: Failed to get dma channels\n");
  642. kfree(prtd);
  643. }
  644. return ret;
  645. }
  646. static int davinci_pcm_close(struct snd_pcm_substream *substream)
  647. {
  648. struct snd_pcm_runtime *runtime = substream->runtime;
  649. struct davinci_runtime_data *prtd = runtime->private_data;
  650. if (prtd->ram_channel >= 0)
  651. edma_stop(prtd->ram_channel);
  652. if (prtd->asp_channel >= 0)
  653. edma_stop(prtd->asp_channel);
  654. if (prtd->asp_link[0] >= 0)
  655. edma_unlink(prtd->asp_link[0]);
  656. if (prtd->asp_link[1] >= 0)
  657. edma_unlink(prtd->asp_link[1]);
  658. if (prtd->ram_link >= 0)
  659. edma_unlink(prtd->ram_link);
  660. if (prtd->asp_link[0] >= 0)
  661. edma_free_slot(prtd->asp_link[0]);
  662. if (prtd->asp_link[1] >= 0)
  663. edma_free_slot(prtd->asp_link[1]);
  664. if (prtd->asp_channel >= 0)
  665. edma_free_channel(prtd->asp_channel);
  666. if (prtd->ram_link >= 0)
  667. edma_free_slot(prtd->ram_link);
  668. if (prtd->ram_link2 >= 0)
  669. edma_free_slot(prtd->ram_link2);
  670. if (prtd->ram_channel >= 0)
  671. edma_free_channel(prtd->ram_channel);
  672. kfree(prtd);
  673. return 0;
  674. }
  675. static int davinci_pcm_hw_params(struct snd_pcm_substream *substream,
  676. struct snd_pcm_hw_params *hw_params)
  677. {
  678. return snd_pcm_lib_malloc_pages(substream,
  679. params_buffer_bytes(hw_params));
  680. }
  681. static int davinci_pcm_hw_free(struct snd_pcm_substream *substream)
  682. {
  683. return snd_pcm_lib_free_pages(substream);
  684. }
  685. static int davinci_pcm_mmap(struct snd_pcm_substream *substream,
  686. struct vm_area_struct *vma)
  687. {
  688. struct snd_pcm_runtime *runtime = substream->runtime;
  689. return dma_mmap_writecombine(substream->pcm->card->dev, vma,
  690. runtime->dma_area,
  691. runtime->dma_addr,
  692. runtime->dma_bytes);
  693. }
  694. static struct snd_pcm_ops davinci_pcm_ops = {
  695. .open = davinci_pcm_open,
  696. .close = davinci_pcm_close,
  697. .ioctl = snd_pcm_lib_ioctl,
  698. .hw_params = davinci_pcm_hw_params,
  699. .hw_free = davinci_pcm_hw_free,
  700. .prepare = davinci_pcm_prepare,
  701. .trigger = davinci_pcm_trigger,
  702. .pointer = davinci_pcm_pointer,
  703. .mmap = davinci_pcm_mmap,
  704. };
  705. static int davinci_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream,
  706. size_t size)
  707. {
  708. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  709. struct snd_dma_buffer *buf = &substream->dma_buffer;
  710. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  711. buf->dev.dev = pcm->card->dev;
  712. buf->private_data = NULL;
  713. buf->area = dma_alloc_writecombine(pcm->card->dev, size,
  714. &buf->addr, GFP_KERNEL);
  715. pr_debug("davinci_pcm: preallocate_dma_buffer: area=%p, addr=%p, "
  716. "size=%d\n", (void *) buf->area, (void *) buf->addr, size);
  717. if (!buf->area)
  718. return -ENOMEM;
  719. buf->bytes = size;
  720. return 0;
  721. }
  722. static void davinci_pcm_free(struct snd_pcm *pcm)
  723. {
  724. struct snd_pcm_substream *substream;
  725. struct snd_dma_buffer *buf;
  726. int stream;
  727. for (stream = 0; stream < 2; stream++) {
  728. struct snd_dma_buffer *iram_dma;
  729. substream = pcm->streams[stream].substream;
  730. if (!substream)
  731. continue;
  732. buf = &substream->dma_buffer;
  733. if (!buf->area)
  734. continue;
  735. dma_free_writecombine(pcm->card->dev, buf->bytes,
  736. buf->area, buf->addr);
  737. buf->area = NULL;
  738. iram_dma = buf->private_data;
  739. if (iram_dma) {
  740. davinci_free_sram(substream, iram_dma);
  741. kfree(iram_dma);
  742. }
  743. }
  744. }
  745. static u64 davinci_pcm_dmamask = DMA_BIT_MASK(32);
  746. static int davinci_pcm_new(struct snd_soc_pcm_runtime *rtd)
  747. {
  748. struct snd_card *card = rtd->card->snd_card;
  749. struct snd_pcm *pcm = rtd->pcm;
  750. int ret;
  751. if (!card->dev->dma_mask)
  752. card->dev->dma_mask = &davinci_pcm_dmamask;
  753. if (!card->dev->coherent_dma_mask)
  754. card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
  755. if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
  756. ret = davinci_pcm_preallocate_dma_buffer(pcm,
  757. SNDRV_PCM_STREAM_PLAYBACK,
  758. pcm_hardware_playback.buffer_bytes_max);
  759. if (ret)
  760. return ret;
  761. }
  762. if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
  763. ret = davinci_pcm_preallocate_dma_buffer(pcm,
  764. SNDRV_PCM_STREAM_CAPTURE,
  765. pcm_hardware_capture.buffer_bytes_max);
  766. if (ret)
  767. return ret;
  768. }
  769. return 0;
  770. }
  771. static struct snd_soc_platform_driver davinci_soc_platform = {
  772. .ops = &davinci_pcm_ops,
  773. .pcm_new = davinci_pcm_new,
  774. .pcm_free = davinci_pcm_free,
  775. };
  776. int davinci_soc_platform_register(struct device *dev)
  777. {
  778. return snd_soc_register_platform(dev, &davinci_soc_platform);
  779. }
  780. EXPORT_SYMBOL_GPL(davinci_soc_platform_register);
  781. void davinci_soc_platform_unregister(struct device *dev)
  782. {
  783. snd_soc_unregister_platform(dev);
  784. }
  785. EXPORT_SYMBOL_GPL(davinci_soc_platform_unregister);
  786. MODULE_AUTHOR("Vladimir Barinov");
  787. MODULE_DESCRIPTION("TI DAVINCI PCM DMA module");
  788. MODULE_LICENSE("GPL");