tegra_drm.h 3.3 KB

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  1. /*
  2. * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  15. */
  16. #ifndef _UAPI_TEGRA_DRM_H_
  17. #define _UAPI_TEGRA_DRM_H_
  18. struct drm_tegra_gem_create {
  19. __u64 size;
  20. __u32 flags;
  21. __u32 handle;
  22. };
  23. struct drm_tegra_gem_mmap {
  24. __u32 handle;
  25. __u32 offset;
  26. };
  27. struct drm_tegra_syncpt_read {
  28. __u32 id;
  29. __u32 value;
  30. };
  31. struct drm_tegra_syncpt_incr {
  32. __u32 id;
  33. __u32 pad;
  34. };
  35. struct drm_tegra_syncpt_wait {
  36. __u32 id;
  37. __u32 thresh;
  38. __u32 timeout;
  39. __u32 value;
  40. };
  41. #define DRM_TEGRA_NO_TIMEOUT (0xffffffff)
  42. struct drm_tegra_open_channel {
  43. __u32 client;
  44. __u32 pad;
  45. __u64 context;
  46. };
  47. struct drm_tegra_close_channel {
  48. __u64 context;
  49. };
  50. struct drm_tegra_get_syncpt {
  51. __u64 context;
  52. __u32 index;
  53. __u32 id;
  54. };
  55. struct drm_tegra_syncpt {
  56. __u32 id;
  57. __u32 incrs;
  58. };
  59. struct drm_tegra_cmdbuf {
  60. __u32 handle;
  61. __u32 offset;
  62. __u32 words;
  63. __u32 pad;
  64. };
  65. struct drm_tegra_reloc {
  66. struct {
  67. __u32 handle;
  68. __u32 offset;
  69. } cmdbuf;
  70. struct {
  71. __u32 handle;
  72. __u32 offset;
  73. } target;
  74. __u32 shift;
  75. __u32 pad;
  76. };
  77. struct drm_tegra_waitchk {
  78. __u32 handle;
  79. __u32 offset;
  80. __u32 syncpt;
  81. __u32 thresh;
  82. };
  83. struct drm_tegra_submit {
  84. __u64 context;
  85. __u32 num_syncpts;
  86. __u32 num_cmdbufs;
  87. __u32 num_relocs;
  88. __u32 num_waitchks;
  89. __u32 waitchk_mask;
  90. __u32 timeout;
  91. __u32 pad;
  92. __u64 syncpts;
  93. __u64 cmdbufs;
  94. __u64 relocs;
  95. __u64 waitchks;
  96. __u32 fence; /* Return value */
  97. __u32 reserved[5]; /* future expansion */
  98. };
  99. #define DRM_TEGRA_GEM_CREATE 0x00
  100. #define DRM_TEGRA_GEM_MMAP 0x01
  101. #define DRM_TEGRA_SYNCPT_READ 0x02
  102. #define DRM_TEGRA_SYNCPT_INCR 0x03
  103. #define DRM_TEGRA_SYNCPT_WAIT 0x04
  104. #define DRM_TEGRA_OPEN_CHANNEL 0x05
  105. #define DRM_TEGRA_CLOSE_CHANNEL 0x06
  106. #define DRM_TEGRA_GET_SYNCPT 0x07
  107. #define DRM_TEGRA_SUBMIT 0x08
  108. #define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE, struct drm_tegra_gem_create)
  109. #define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP, struct drm_tegra_gem_mmap)
  110. #define DRM_IOCTL_TEGRA_SYNCPT_READ DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_READ, struct drm_tegra_syncpt_read)
  111. #define DRM_IOCTL_TEGRA_SYNCPT_INCR DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_INCR, struct drm_tegra_syncpt_incr)
  112. #define DRM_IOCTL_TEGRA_SYNCPT_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_WAIT, struct drm_tegra_syncpt_wait)
  113. #define DRM_IOCTL_TEGRA_OPEN_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_OPEN_CHANNEL, struct drm_tegra_open_channel)
  114. #define DRM_IOCTL_TEGRA_CLOSE_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_CLOSE_CHANNEL, struct drm_tegra_open_channel)
  115. #define DRM_IOCTL_TEGRA_GET_SYNCPT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT, struct drm_tegra_get_syncpt)
  116. #define DRM_IOCTL_TEGRA_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SUBMIT, struct drm_tegra_submit)
  117. #endif