rtc-stmp3xxx.c 9.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342
  1. /*
  2. * Freescale STMP37XX/STMP378X Real Time Clock driver
  3. *
  4. * Copyright (c) 2007 Sigmatel, Inc.
  5. * Peter Hartley, <peter.hartley@sigmatel.com>
  6. *
  7. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  8. * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
  9. * Copyright 2011 Wolfram Sang, Pengutronix e.K.
  10. */
  11. /*
  12. * The code contained herein is licensed under the GNU General Public
  13. * License. You may obtain a copy of the GNU General Public License
  14. * Version 2 or later at the following locations:
  15. *
  16. * http://www.opensource.org/licenses/gpl-license.html
  17. * http://www.gnu.org/copyleft/gpl.html
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/io.h>
  22. #include <linux/init.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/rtc.h>
  26. #include <linux/slab.h>
  27. #include <linux/of_device.h>
  28. #include <linux/of.h>
  29. #include <linux/stmp_device.h>
  30. #include <linux/stmp3xxx_rtc_wdt.h>
  31. #define STMP3XXX_RTC_CTRL 0x0
  32. #define STMP3XXX_RTC_CTRL_SET 0x4
  33. #define STMP3XXX_RTC_CTRL_CLR 0x8
  34. #define STMP3XXX_RTC_CTRL_ALARM_IRQ_EN 0x00000001
  35. #define STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN 0x00000002
  36. #define STMP3XXX_RTC_CTRL_ALARM_IRQ 0x00000004
  37. #define STMP3XXX_RTC_CTRL_WATCHDOGEN 0x00000010
  38. #define STMP3XXX_RTC_STAT 0x10
  39. #define STMP3XXX_RTC_STAT_STALE_SHIFT 16
  40. #define STMP3XXX_RTC_STAT_RTC_PRESENT 0x80000000
  41. #define STMP3XXX_RTC_SECONDS 0x30
  42. #define STMP3XXX_RTC_ALARM 0x40
  43. #define STMP3XXX_RTC_WATCHDOG 0x50
  44. #define STMP3XXX_RTC_PERSISTENT0 0x60
  45. #define STMP3XXX_RTC_PERSISTENT0_SET 0x64
  46. #define STMP3XXX_RTC_PERSISTENT0_CLR 0x68
  47. #define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN 0x00000002
  48. #define STMP3XXX_RTC_PERSISTENT0_ALARM_EN 0x00000004
  49. #define STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE 0x00000080
  50. #define STMP3XXX_RTC_PERSISTENT1 0x70
  51. /* missing bitmask in headers */
  52. #define STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER 0x80000000
  53. struct stmp3xxx_rtc_data {
  54. struct rtc_device *rtc;
  55. void __iomem *io;
  56. int irq_alarm;
  57. };
  58. #if IS_ENABLED(CONFIG_STMP3XXX_RTC_WATCHDOG)
  59. /**
  60. * stmp3xxx_wdt_set_timeout - configure the watchdog inside the STMP3xxx RTC
  61. * @dev: the parent device of the watchdog (= the RTC)
  62. * @timeout: the desired value for the timeout register of the watchdog.
  63. * 0 disables the watchdog
  64. *
  65. * The watchdog needs one register and two bits which are in the RTC domain.
  66. * To handle the resource conflict, the RTC driver will create another
  67. * platform_device for the watchdog driver as a child of the RTC device.
  68. * The watchdog driver is passed the below accessor function via platform_data
  69. * to configure the watchdog. Locking is not needed because accessing SET/CLR
  70. * registers is atomic.
  71. */
  72. static void stmp3xxx_wdt_set_timeout(struct device *dev, u32 timeout)
  73. {
  74. struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
  75. if (timeout) {
  76. writel(timeout, rtc_data->io + STMP3XXX_RTC_WATCHDOG);
  77. writel(STMP3XXX_RTC_CTRL_WATCHDOGEN,
  78. rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_SET);
  79. writel(STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER,
  80. rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_SET);
  81. } else {
  82. writel(STMP3XXX_RTC_CTRL_WATCHDOGEN,
  83. rtc_data->io + STMP3XXX_RTC_CTRL + STMP_OFFSET_REG_CLR);
  84. writel(STMP3XXX_RTC_PERSISTENT1_FORCE_UPDATER,
  85. rtc_data->io + STMP3XXX_RTC_PERSISTENT1 + STMP_OFFSET_REG_CLR);
  86. }
  87. }
  88. static struct stmp3xxx_wdt_pdata wdt_pdata = {
  89. .wdt_set_timeout = stmp3xxx_wdt_set_timeout,
  90. };
  91. static void stmp3xxx_wdt_register(struct platform_device *rtc_pdev)
  92. {
  93. struct platform_device *wdt_pdev =
  94. platform_device_alloc("stmp3xxx_rtc_wdt", rtc_pdev->id);
  95. if (wdt_pdev) {
  96. wdt_pdev->dev.parent = &rtc_pdev->dev;
  97. wdt_pdev->dev.platform_data = &wdt_pdata;
  98. platform_device_add(wdt_pdev);
  99. }
  100. }
  101. #else
  102. static void stmp3xxx_wdt_register(struct platform_device *rtc_pdev)
  103. {
  104. }
  105. #endif /* CONFIG_STMP3XXX_RTC_WATCHDOG */
  106. static void stmp3xxx_wait_time(struct stmp3xxx_rtc_data *rtc_data)
  107. {
  108. /*
  109. * The datasheet doesn't say which way round the
  110. * NEW_REGS/STALE_REGS bitfields go. In fact it's 0x1=P0,
  111. * 0x2=P1, .., 0x20=P5, 0x40=ALARM, 0x80=SECONDS
  112. */
  113. while (readl(rtc_data->io + STMP3XXX_RTC_STAT) &
  114. (0x80 << STMP3XXX_RTC_STAT_STALE_SHIFT))
  115. cpu_relax();
  116. }
  117. /* Time read/write */
  118. static int stmp3xxx_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
  119. {
  120. struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
  121. stmp3xxx_wait_time(rtc_data);
  122. rtc_time_to_tm(readl(rtc_data->io + STMP3XXX_RTC_SECONDS), rtc_tm);
  123. return 0;
  124. }
  125. static int stmp3xxx_rtc_set_mmss(struct device *dev, unsigned long t)
  126. {
  127. struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
  128. writel(t, rtc_data->io + STMP3XXX_RTC_SECONDS);
  129. stmp3xxx_wait_time(rtc_data);
  130. return 0;
  131. }
  132. /* interrupt(s) handler */
  133. static irqreturn_t stmp3xxx_rtc_interrupt(int irq, void *dev_id)
  134. {
  135. struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev_id);
  136. u32 status = readl(rtc_data->io + STMP3XXX_RTC_CTRL);
  137. if (status & STMP3XXX_RTC_CTRL_ALARM_IRQ) {
  138. writel(STMP3XXX_RTC_CTRL_ALARM_IRQ,
  139. rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
  140. rtc_update_irq(rtc_data->rtc, 1, RTC_AF | RTC_IRQF);
  141. return IRQ_HANDLED;
  142. }
  143. return IRQ_NONE;
  144. }
  145. static int stmp3xxx_alarm_irq_enable(struct device *dev, unsigned int enabled)
  146. {
  147. struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
  148. if (enabled) {
  149. writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
  150. STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN,
  151. rtc_data->io + STMP3XXX_RTC_PERSISTENT0_SET);
  152. writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
  153. rtc_data->io + STMP3XXX_RTC_CTRL_SET);
  154. } else {
  155. writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
  156. STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN,
  157. rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR);
  158. writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
  159. rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
  160. }
  161. return 0;
  162. }
  163. static int stmp3xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  164. {
  165. struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
  166. rtc_time_to_tm(readl(rtc_data->io + STMP3XXX_RTC_ALARM), &alm->time);
  167. return 0;
  168. }
  169. static int stmp3xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  170. {
  171. unsigned long t;
  172. struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
  173. rtc_tm_to_time(&alm->time, &t);
  174. writel(t, rtc_data->io + STMP3XXX_RTC_ALARM);
  175. stmp3xxx_alarm_irq_enable(dev, alm->enabled);
  176. return 0;
  177. }
  178. static struct rtc_class_ops stmp3xxx_rtc_ops = {
  179. .alarm_irq_enable =
  180. stmp3xxx_alarm_irq_enable,
  181. .read_time = stmp3xxx_rtc_gettime,
  182. .set_mmss = stmp3xxx_rtc_set_mmss,
  183. .read_alarm = stmp3xxx_rtc_read_alarm,
  184. .set_alarm = stmp3xxx_rtc_set_alarm,
  185. };
  186. static int stmp3xxx_rtc_remove(struct platform_device *pdev)
  187. {
  188. struct stmp3xxx_rtc_data *rtc_data = platform_get_drvdata(pdev);
  189. if (!rtc_data)
  190. return 0;
  191. writel(STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
  192. rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
  193. platform_set_drvdata(pdev, NULL);
  194. return 0;
  195. }
  196. static int stmp3xxx_rtc_probe(struct platform_device *pdev)
  197. {
  198. struct stmp3xxx_rtc_data *rtc_data;
  199. struct resource *r;
  200. int err;
  201. rtc_data = devm_kzalloc(&pdev->dev, sizeof(*rtc_data), GFP_KERNEL);
  202. if (!rtc_data)
  203. return -ENOMEM;
  204. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  205. if (!r) {
  206. dev_err(&pdev->dev, "failed to get resource\n");
  207. return -ENXIO;
  208. }
  209. rtc_data->io = devm_ioremap(&pdev->dev, r->start, resource_size(r));
  210. if (!rtc_data->io) {
  211. dev_err(&pdev->dev, "ioremap failed\n");
  212. return -EIO;
  213. }
  214. rtc_data->irq_alarm = platform_get_irq(pdev, 0);
  215. if (!(readl(STMP3XXX_RTC_STAT + rtc_data->io) &
  216. STMP3XXX_RTC_STAT_RTC_PRESENT)) {
  217. dev_err(&pdev->dev, "no device onboard\n");
  218. return -ENODEV;
  219. }
  220. platform_set_drvdata(pdev, rtc_data);
  221. stmp_reset_block(rtc_data->io);
  222. writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
  223. STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN |
  224. STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE,
  225. rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR);
  226. writel(STMP3XXX_RTC_CTRL_ONEMSEC_IRQ_EN |
  227. STMP3XXX_RTC_CTRL_ALARM_IRQ_EN,
  228. rtc_data->io + STMP3XXX_RTC_CTRL_CLR);
  229. rtc_data->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
  230. &stmp3xxx_rtc_ops, THIS_MODULE);
  231. if (IS_ERR(rtc_data->rtc)) {
  232. err = PTR_ERR(rtc_data->rtc);
  233. goto out;
  234. }
  235. err = devm_request_irq(&pdev->dev, rtc_data->irq_alarm,
  236. stmp3xxx_rtc_interrupt, 0, "RTC alarm", &pdev->dev);
  237. if (err) {
  238. dev_err(&pdev->dev, "Cannot claim IRQ%d\n",
  239. rtc_data->irq_alarm);
  240. goto out;
  241. }
  242. stmp3xxx_wdt_register(pdev);
  243. return 0;
  244. out:
  245. platform_set_drvdata(pdev, NULL);
  246. return err;
  247. }
  248. #ifdef CONFIG_PM_SLEEP
  249. static int stmp3xxx_rtc_suspend(struct device *dev)
  250. {
  251. return 0;
  252. }
  253. static int stmp3xxx_rtc_resume(struct device *dev)
  254. {
  255. struct stmp3xxx_rtc_data *rtc_data = dev_get_drvdata(dev);
  256. stmp_reset_block(rtc_data->io);
  257. writel(STMP3XXX_RTC_PERSISTENT0_ALARM_EN |
  258. STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE_EN |
  259. STMP3XXX_RTC_PERSISTENT0_ALARM_WAKE,
  260. rtc_data->io + STMP3XXX_RTC_PERSISTENT0_CLR);
  261. return 0;
  262. }
  263. #endif
  264. static SIMPLE_DEV_PM_OPS(stmp3xxx_rtc_pm_ops, stmp3xxx_rtc_suspend,
  265. stmp3xxx_rtc_resume);
  266. static const struct of_device_id rtc_dt_ids[] = {
  267. { .compatible = "fsl,stmp3xxx-rtc", },
  268. { /* sentinel */ }
  269. };
  270. MODULE_DEVICE_TABLE(of, rtc_dt_ids);
  271. static struct platform_driver stmp3xxx_rtcdrv = {
  272. .probe = stmp3xxx_rtc_probe,
  273. .remove = stmp3xxx_rtc_remove,
  274. .driver = {
  275. .name = "stmp3xxx-rtc",
  276. .owner = THIS_MODULE,
  277. .pm = &stmp3xxx_rtc_pm_ops,
  278. .of_match_table = of_match_ptr(rtc_dt_ids),
  279. },
  280. };
  281. module_platform_driver(stmp3xxx_rtcdrv);
  282. MODULE_DESCRIPTION("STMP3xxx RTC Driver");
  283. MODULE_AUTHOR("dmitry pervushin <dpervushin@embeddedalley.com> and "
  284. "Wolfram Sang <w.sang@pengutronix.de>");
  285. MODULE_LICENSE("GPL");