aerdrv_core.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835
  1. /*
  2. * drivers/pci/pcie/aer/aerdrv_core.c
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * This file implements the core part of PCI-Express AER. When an pci-express
  9. * error is delivered, an error message will be collected and printed to
  10. * console, then, an error recovery procedure will be executed by following
  11. * the pci error recovery rules.
  12. *
  13. * Copyright (C) 2006 Intel Corp.
  14. * Tom Long Nguyen (tom.l.nguyen@intel.com)
  15. * Zhang Yanmin (yanmin.zhang@intel.com)
  16. *
  17. */
  18. #include <linux/module.h>
  19. #include <linux/pci.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/pm.h>
  23. #include <linux/suspend.h>
  24. #include <linux/delay.h>
  25. #include <linux/slab.h>
  26. #include <linux/kfifo.h>
  27. #include "aerdrv.h"
  28. static bool forceload;
  29. static bool nosourceid;
  30. module_param(forceload, bool, 0);
  31. module_param(nosourceid, bool, 0);
  32. #define PCI_EXP_AER_FLAGS (PCI_EXP_DEVCTL_CERE | PCI_EXP_DEVCTL_NFERE | \
  33. PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE)
  34. int pci_enable_pcie_error_reporting(struct pci_dev *dev)
  35. {
  36. if (pcie_aer_get_firmware_first(dev))
  37. return -EIO;
  38. if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR))
  39. return -EIO;
  40. return pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_AER_FLAGS);
  41. }
  42. EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
  43. int pci_disable_pcie_error_reporting(struct pci_dev *dev)
  44. {
  45. if (pcie_aer_get_firmware_first(dev))
  46. return -EIO;
  47. return pcie_capability_clear_word(dev, PCI_EXP_DEVCTL,
  48. PCI_EXP_AER_FLAGS);
  49. }
  50. EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
  51. int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
  52. {
  53. int pos;
  54. u32 status;
  55. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  56. if (!pos)
  57. return -EIO;
  58. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
  59. if (status)
  60. pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
  61. return 0;
  62. }
  63. EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status);
  64. /**
  65. * add_error_device - list device to be handled
  66. * @e_info: pointer to error info
  67. * @dev: pointer to pci_dev to be added
  68. */
  69. static int add_error_device(struct aer_err_info *e_info, struct pci_dev *dev)
  70. {
  71. if (e_info->error_dev_num < AER_MAX_MULTI_ERR_DEVICES) {
  72. e_info->dev[e_info->error_dev_num] = dev;
  73. e_info->error_dev_num++;
  74. return 0;
  75. }
  76. return -ENOSPC;
  77. }
  78. /**
  79. * is_error_source - check whether the device is source of reported error
  80. * @dev: pointer to pci_dev to be checked
  81. * @e_info: pointer to reported error info
  82. */
  83. static bool is_error_source(struct pci_dev *dev, struct aer_err_info *e_info)
  84. {
  85. int pos;
  86. u32 status, mask;
  87. u16 reg16;
  88. /*
  89. * When bus id is equal to 0, it might be a bad id
  90. * reported by root port.
  91. */
  92. if (!nosourceid && (PCI_BUS_NUM(e_info->id) != 0)) {
  93. /* Device ID match? */
  94. if (e_info->id == ((dev->bus->number << 8) | dev->devfn))
  95. return true;
  96. /* Continue id comparing if there is no multiple error */
  97. if (!e_info->multi_error_valid)
  98. return false;
  99. }
  100. /*
  101. * When either
  102. * 1) nosourceid==y;
  103. * 2) bus id is equal to 0. Some ports might lose the bus
  104. * id of error source id;
  105. * 3) There are multiple errors and prior id comparing fails;
  106. * We check AER status registers to find possible reporter.
  107. */
  108. if (atomic_read(&dev->enable_cnt) == 0)
  109. return false;
  110. /* Check if AER is enabled */
  111. pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &reg16);
  112. if (!(reg16 & PCI_EXP_AER_FLAGS))
  113. return false;
  114. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  115. if (!pos)
  116. return false;
  117. /* Check if error is recorded */
  118. if (e_info->severity == AER_CORRECTABLE) {
  119. pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &status);
  120. pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK, &mask);
  121. } else {
  122. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
  123. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, &mask);
  124. }
  125. if (status & ~mask)
  126. return true;
  127. return false;
  128. }
  129. static int find_device_iter(struct pci_dev *dev, void *data)
  130. {
  131. struct aer_err_info *e_info = (struct aer_err_info *)data;
  132. if (is_error_source(dev, e_info)) {
  133. /* List this device */
  134. if (add_error_device(e_info, dev)) {
  135. /* We cannot handle more... Stop iteration */
  136. /* TODO: Should print error message here? */
  137. return 1;
  138. }
  139. /* If there is only a single error, stop iteration */
  140. if (!e_info->multi_error_valid)
  141. return 1;
  142. }
  143. return 0;
  144. }
  145. /**
  146. * find_source_device - search through device hierarchy for source device
  147. * @parent: pointer to Root Port pci_dev data structure
  148. * @e_info: including detailed error information such like id
  149. *
  150. * Return true if found.
  151. *
  152. * Invoked by DPC when error is detected at the Root Port.
  153. * Caller of this function must set id, severity, and multi_error_valid of
  154. * struct aer_err_info pointed by @e_info properly. This function must fill
  155. * e_info->error_dev_num and e_info->dev[], based on the given information.
  156. */
  157. static bool find_source_device(struct pci_dev *parent,
  158. struct aer_err_info *e_info)
  159. {
  160. struct pci_dev *dev = parent;
  161. int result;
  162. /* Must reset in this function */
  163. e_info->error_dev_num = 0;
  164. /* Is Root Port an agent that sends error message? */
  165. result = find_device_iter(dev, e_info);
  166. if (result)
  167. return true;
  168. pci_walk_bus(parent->subordinate, find_device_iter, e_info);
  169. if (!e_info->error_dev_num) {
  170. dev_printk(KERN_DEBUG, &parent->dev,
  171. "can't find device of ID%04x\n",
  172. e_info->id);
  173. return false;
  174. }
  175. return true;
  176. }
  177. static int report_error_detected(struct pci_dev *dev, void *data)
  178. {
  179. pci_ers_result_t vote;
  180. const struct pci_error_handlers *err_handler;
  181. struct aer_broadcast_data *result_data;
  182. result_data = (struct aer_broadcast_data *) data;
  183. device_lock(&dev->dev);
  184. dev->error_state = result_data->state;
  185. if (!dev->driver ||
  186. !dev->driver->err_handler ||
  187. !dev->driver->err_handler->error_detected) {
  188. if (result_data->state == pci_channel_io_frozen &&
  189. !(dev->hdr_type & PCI_HEADER_TYPE_BRIDGE)) {
  190. /*
  191. * In case of fatal recovery, if one of down-
  192. * stream device has no driver. We might be
  193. * unable to recover because a later insmod
  194. * of a driver for this device is unaware of
  195. * its hw state.
  196. */
  197. dev_printk(KERN_DEBUG, &dev->dev, "device has %s\n",
  198. dev->driver ?
  199. "no AER-aware driver" : "no driver");
  200. }
  201. /*
  202. * If there's any device in the subtree that does not
  203. * have an error_detected callback, returning
  204. * PCI_ERS_RESULT_NO_AER_DRIVER prevents calling of
  205. * the subsequent mmio_enabled/slot_reset/resume
  206. * callbacks of "any" device in the subtree. All the
  207. * devices in the subtree are left in the error state
  208. * without recovery.
  209. */
  210. if (!(dev->hdr_type & PCI_HEADER_TYPE_BRIDGE))
  211. vote = PCI_ERS_RESULT_NO_AER_DRIVER;
  212. else
  213. vote = PCI_ERS_RESULT_NONE;
  214. } else {
  215. err_handler = dev->driver->err_handler;
  216. vote = err_handler->error_detected(dev, result_data->state);
  217. }
  218. result_data->result = merge_result(result_data->result, vote);
  219. device_unlock(&dev->dev);
  220. return 0;
  221. }
  222. static int report_mmio_enabled(struct pci_dev *dev, void *data)
  223. {
  224. pci_ers_result_t vote;
  225. const struct pci_error_handlers *err_handler;
  226. struct aer_broadcast_data *result_data;
  227. result_data = (struct aer_broadcast_data *) data;
  228. device_lock(&dev->dev);
  229. if (!dev->driver ||
  230. !dev->driver->err_handler ||
  231. !dev->driver->err_handler->mmio_enabled)
  232. goto out;
  233. err_handler = dev->driver->err_handler;
  234. vote = err_handler->mmio_enabled(dev);
  235. result_data->result = merge_result(result_data->result, vote);
  236. out:
  237. device_unlock(&dev->dev);
  238. return 0;
  239. }
  240. static int report_slot_reset(struct pci_dev *dev, void *data)
  241. {
  242. pci_ers_result_t vote;
  243. const struct pci_error_handlers *err_handler;
  244. struct aer_broadcast_data *result_data;
  245. result_data = (struct aer_broadcast_data *) data;
  246. device_lock(&dev->dev);
  247. if (!dev->driver ||
  248. !dev->driver->err_handler ||
  249. !dev->driver->err_handler->slot_reset)
  250. goto out;
  251. err_handler = dev->driver->err_handler;
  252. vote = err_handler->slot_reset(dev);
  253. result_data->result = merge_result(result_data->result, vote);
  254. out:
  255. device_unlock(&dev->dev);
  256. return 0;
  257. }
  258. static int report_resume(struct pci_dev *dev, void *data)
  259. {
  260. const struct pci_error_handlers *err_handler;
  261. device_lock(&dev->dev);
  262. dev->error_state = pci_channel_io_normal;
  263. if (!dev->driver ||
  264. !dev->driver->err_handler ||
  265. !dev->driver->err_handler->resume)
  266. goto out;
  267. err_handler = dev->driver->err_handler;
  268. err_handler->resume(dev);
  269. out:
  270. device_unlock(&dev->dev);
  271. return 0;
  272. }
  273. /**
  274. * broadcast_error_message - handle message broadcast to downstream drivers
  275. * @dev: pointer to from where in a hierarchy message is broadcasted down
  276. * @state: error state
  277. * @error_mesg: message to print
  278. * @cb: callback to be broadcasted
  279. *
  280. * Invoked during error recovery process. Once being invoked, the content
  281. * of error severity will be broadcasted to all downstream drivers in a
  282. * hierarchy in question.
  283. */
  284. static pci_ers_result_t broadcast_error_message(struct pci_dev *dev,
  285. enum pci_channel_state state,
  286. char *error_mesg,
  287. int (*cb)(struct pci_dev *, void *))
  288. {
  289. struct aer_broadcast_data result_data;
  290. dev_printk(KERN_DEBUG, &dev->dev, "broadcast %s message\n", error_mesg);
  291. result_data.state = state;
  292. if (cb == report_error_detected)
  293. result_data.result = PCI_ERS_RESULT_CAN_RECOVER;
  294. else
  295. result_data.result = PCI_ERS_RESULT_RECOVERED;
  296. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE) {
  297. /*
  298. * If the error is reported by a bridge, we think this error
  299. * is related to the downstream link of the bridge, so we
  300. * do error recovery on all subordinates of the bridge instead
  301. * of the bridge and clear the error status of the bridge.
  302. */
  303. if (cb == report_error_detected)
  304. dev->error_state = state;
  305. pci_walk_bus(dev->subordinate, cb, &result_data);
  306. if (cb == report_resume) {
  307. pci_cleanup_aer_uncorrect_error_status(dev);
  308. dev->error_state = pci_channel_io_normal;
  309. }
  310. } else {
  311. /*
  312. * If the error is reported by an end point, we think this
  313. * error is related to the upstream link of the end point.
  314. */
  315. pci_walk_bus(dev->bus, cb, &result_data);
  316. }
  317. return result_data.result;
  318. }
  319. /**
  320. * aer_do_secondary_bus_reset - perform secondary bus reset
  321. * @dev: pointer to bridge's pci_dev data structure
  322. *
  323. * Invoked when performing link reset at Root Port or Downstream Port.
  324. */
  325. void aer_do_secondary_bus_reset(struct pci_dev *dev)
  326. {
  327. u16 p2p_ctrl;
  328. /* Assert Secondary Bus Reset */
  329. pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &p2p_ctrl);
  330. p2p_ctrl |= PCI_BRIDGE_CTL_BUS_RESET;
  331. pci_write_config_word(dev, PCI_BRIDGE_CONTROL, p2p_ctrl);
  332. /*
  333. * we should send hot reset message for 2ms to allow it time to
  334. * propagate to all downstream ports
  335. */
  336. msleep(2);
  337. /* De-assert Secondary Bus Reset */
  338. p2p_ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET;
  339. pci_write_config_word(dev, PCI_BRIDGE_CONTROL, p2p_ctrl);
  340. /*
  341. * System software must wait for at least 100ms from the end
  342. * of a reset of one or more device before it is permitted
  343. * to issue Configuration Requests to those devices.
  344. */
  345. msleep(200);
  346. }
  347. /**
  348. * default_downstream_reset_link - default reset function for Downstream Port
  349. * @dev: pointer to downstream port's pci_dev data structure
  350. *
  351. * Invoked when performing link reset at Downstream Port w/ no aer driver.
  352. */
  353. static pci_ers_result_t default_downstream_reset_link(struct pci_dev *dev)
  354. {
  355. aer_do_secondary_bus_reset(dev);
  356. dev_printk(KERN_DEBUG, &dev->dev,
  357. "Downstream Port link has been reset\n");
  358. return PCI_ERS_RESULT_RECOVERED;
  359. }
  360. static int find_aer_service_iter(struct device *device, void *data)
  361. {
  362. struct pcie_port_service_driver *service_driver, **drv;
  363. drv = (struct pcie_port_service_driver **) data;
  364. if (device->bus == &pcie_port_bus_type && device->driver) {
  365. service_driver = to_service_driver(device->driver);
  366. if (service_driver->service == PCIE_PORT_SERVICE_AER) {
  367. *drv = service_driver;
  368. return 1;
  369. }
  370. }
  371. return 0;
  372. }
  373. static struct pcie_port_service_driver *find_aer_service(struct pci_dev *dev)
  374. {
  375. struct pcie_port_service_driver *drv = NULL;
  376. device_for_each_child(&dev->dev, &drv, find_aer_service_iter);
  377. return drv;
  378. }
  379. static pci_ers_result_t reset_link(struct pci_dev *dev)
  380. {
  381. struct pci_dev *udev;
  382. pci_ers_result_t status;
  383. struct pcie_port_service_driver *driver;
  384. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE) {
  385. /* Reset this port for all subordinates */
  386. udev = dev;
  387. } else {
  388. /* Reset the upstream component (likely downstream port) */
  389. udev = dev->bus->self;
  390. }
  391. /* Use the aer driver of the component firstly */
  392. driver = find_aer_service(udev);
  393. if (driver && driver->reset_link) {
  394. status = driver->reset_link(udev);
  395. } else if (pci_pcie_type(udev) == PCI_EXP_TYPE_DOWNSTREAM) {
  396. status = default_downstream_reset_link(udev);
  397. } else {
  398. dev_printk(KERN_DEBUG, &dev->dev,
  399. "no link-reset support at upstream device %s\n",
  400. pci_name(udev));
  401. return PCI_ERS_RESULT_DISCONNECT;
  402. }
  403. if (status != PCI_ERS_RESULT_RECOVERED) {
  404. dev_printk(KERN_DEBUG, &dev->dev,
  405. "link reset at upstream device %s failed\n",
  406. pci_name(udev));
  407. return PCI_ERS_RESULT_DISCONNECT;
  408. }
  409. return status;
  410. }
  411. /**
  412. * do_recovery - handle nonfatal/fatal error recovery process
  413. * @dev: pointer to a pci_dev data structure of agent detecting an error
  414. * @severity: error severity type
  415. *
  416. * Invoked when an error is nonfatal/fatal. Once being invoked, broadcast
  417. * error detected message to all downstream drivers within a hierarchy in
  418. * question and return the returned code.
  419. */
  420. static void do_recovery(struct pci_dev *dev, int severity)
  421. {
  422. pci_ers_result_t status, result = PCI_ERS_RESULT_RECOVERED;
  423. enum pci_channel_state state;
  424. if (severity == AER_FATAL)
  425. state = pci_channel_io_frozen;
  426. else
  427. state = pci_channel_io_normal;
  428. status = broadcast_error_message(dev,
  429. state,
  430. "error_detected",
  431. report_error_detected);
  432. if (severity == AER_FATAL) {
  433. result = reset_link(dev);
  434. if (result != PCI_ERS_RESULT_RECOVERED)
  435. goto failed;
  436. }
  437. if (status == PCI_ERS_RESULT_CAN_RECOVER)
  438. status = broadcast_error_message(dev,
  439. state,
  440. "mmio_enabled",
  441. report_mmio_enabled);
  442. if (status == PCI_ERS_RESULT_NEED_RESET) {
  443. /*
  444. * TODO: Should call platform-specific
  445. * functions to reset slot before calling
  446. * drivers' slot_reset callbacks?
  447. */
  448. status = broadcast_error_message(dev,
  449. state,
  450. "slot_reset",
  451. report_slot_reset);
  452. }
  453. if (status != PCI_ERS_RESULT_RECOVERED)
  454. goto failed;
  455. broadcast_error_message(dev,
  456. state,
  457. "resume",
  458. report_resume);
  459. dev_info(&dev->dev, "AER: Device recovery successful\n");
  460. return;
  461. failed:
  462. /* TODO: Should kernel panic here? */
  463. dev_info(&dev->dev, "AER: Device recovery failed\n");
  464. }
  465. /**
  466. * handle_error_source - handle logging error into an event log
  467. * @aerdev: pointer to pcie_device data structure of the root port
  468. * @dev: pointer to pci_dev data structure of error source device
  469. * @info: comprehensive error information
  470. *
  471. * Invoked when an error being detected by Root Port.
  472. */
  473. static void handle_error_source(struct pcie_device *aerdev,
  474. struct pci_dev *dev,
  475. struct aer_err_info *info)
  476. {
  477. int pos;
  478. if (info->severity == AER_CORRECTABLE) {
  479. /*
  480. * Correctable error does not need software intevention.
  481. * No need to go through error recovery process.
  482. */
  483. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  484. if (pos)
  485. pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS,
  486. info->status);
  487. } else
  488. do_recovery(dev, info->severity);
  489. }
  490. #ifdef CONFIG_ACPI_APEI_PCIEAER
  491. static void aer_recover_work_func(struct work_struct *work);
  492. #define AER_RECOVER_RING_ORDER 4
  493. #define AER_RECOVER_RING_SIZE (1 << AER_RECOVER_RING_ORDER)
  494. struct aer_recover_entry
  495. {
  496. u8 bus;
  497. u8 devfn;
  498. u16 domain;
  499. int severity;
  500. };
  501. static DEFINE_KFIFO(aer_recover_ring, struct aer_recover_entry,
  502. AER_RECOVER_RING_SIZE);
  503. /*
  504. * Mutual exclusion for writers of aer_recover_ring, reader side don't
  505. * need lock, because there is only one reader and lock is not needed
  506. * between reader and writer.
  507. */
  508. static DEFINE_SPINLOCK(aer_recover_ring_lock);
  509. static DECLARE_WORK(aer_recover_work, aer_recover_work_func);
  510. void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn,
  511. int severity)
  512. {
  513. unsigned long flags;
  514. struct aer_recover_entry entry = {
  515. .bus = bus,
  516. .devfn = devfn,
  517. .domain = domain,
  518. .severity = severity,
  519. };
  520. spin_lock_irqsave(&aer_recover_ring_lock, flags);
  521. if (kfifo_put(&aer_recover_ring, &entry))
  522. schedule_work(&aer_recover_work);
  523. else
  524. pr_err("AER recover: Buffer overflow when recovering AER for %04x:%02x:%02x:%x\n",
  525. domain, bus, PCI_SLOT(devfn), PCI_FUNC(devfn));
  526. spin_unlock_irqrestore(&aer_recover_ring_lock, flags);
  527. }
  528. EXPORT_SYMBOL_GPL(aer_recover_queue);
  529. static void aer_recover_work_func(struct work_struct *work)
  530. {
  531. struct aer_recover_entry entry;
  532. struct pci_dev *pdev;
  533. while (kfifo_get(&aer_recover_ring, &entry)) {
  534. pdev = pci_get_domain_bus_and_slot(entry.domain, entry.bus,
  535. entry.devfn);
  536. if (!pdev) {
  537. pr_err("AER recover: Can not find pci_dev for %04x:%02x:%02x:%x\n",
  538. entry.domain, entry.bus,
  539. PCI_SLOT(entry.devfn), PCI_FUNC(entry.devfn));
  540. continue;
  541. }
  542. do_recovery(pdev, entry.severity);
  543. pci_dev_put(pdev);
  544. }
  545. }
  546. #endif
  547. /**
  548. * get_device_error_info - read error status from dev and store it to info
  549. * @dev: pointer to the device expected to have a error record
  550. * @info: pointer to structure to store the error record
  551. *
  552. * Return 1 on success, 0 on error.
  553. *
  554. * Note that @info is reused among all error devices. Clear fields properly.
  555. */
  556. static int get_device_error_info(struct pci_dev *dev, struct aer_err_info *info)
  557. {
  558. int pos, temp;
  559. /* Must reset in this function */
  560. info->status = 0;
  561. info->tlp_header_valid = 0;
  562. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  563. /* The device might not support AER */
  564. if (!pos)
  565. return 1;
  566. if (info->severity == AER_CORRECTABLE) {
  567. pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS,
  568. &info->status);
  569. pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK,
  570. &info->mask);
  571. if (!(info->status & ~info->mask))
  572. return 0;
  573. } else if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE ||
  574. info->severity == AER_NONFATAL) {
  575. /* Link is still healthy for IO reads */
  576. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS,
  577. &info->status);
  578. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK,
  579. &info->mask);
  580. if (!(info->status & ~info->mask))
  581. return 0;
  582. /* Get First Error Pointer */
  583. pci_read_config_dword(dev, pos + PCI_ERR_CAP, &temp);
  584. info->first_error = PCI_ERR_CAP_FEP(temp);
  585. if (info->status & AER_LOG_TLP_MASKS) {
  586. info->tlp_header_valid = 1;
  587. pci_read_config_dword(dev,
  588. pos + PCI_ERR_HEADER_LOG, &info->tlp.dw0);
  589. pci_read_config_dword(dev,
  590. pos + PCI_ERR_HEADER_LOG + 4, &info->tlp.dw1);
  591. pci_read_config_dword(dev,
  592. pos + PCI_ERR_HEADER_LOG + 8, &info->tlp.dw2);
  593. pci_read_config_dword(dev,
  594. pos + PCI_ERR_HEADER_LOG + 12, &info->tlp.dw3);
  595. }
  596. }
  597. return 1;
  598. }
  599. static inline void aer_process_err_devices(struct pcie_device *p_device,
  600. struct aer_err_info *e_info)
  601. {
  602. int i;
  603. /* Report all before handle them, not to lost records by reset etc. */
  604. for (i = 0; i < e_info->error_dev_num && e_info->dev[i]; i++) {
  605. if (get_device_error_info(e_info->dev[i], e_info))
  606. aer_print_error(e_info->dev[i], e_info);
  607. }
  608. for (i = 0; i < e_info->error_dev_num && e_info->dev[i]; i++) {
  609. if (get_device_error_info(e_info->dev[i], e_info))
  610. handle_error_source(p_device, e_info->dev[i], e_info);
  611. }
  612. }
  613. /**
  614. * aer_isr_one_error - consume an error detected by root port
  615. * @p_device: pointer to error root port service device
  616. * @e_src: pointer to an error source
  617. */
  618. static void aer_isr_one_error(struct pcie_device *p_device,
  619. struct aer_err_source *e_src)
  620. {
  621. struct aer_err_info *e_info;
  622. /* struct aer_err_info might be big, so we allocate it with slab */
  623. e_info = kmalloc(sizeof(struct aer_err_info), GFP_KERNEL);
  624. if (!e_info) {
  625. dev_printk(KERN_DEBUG, &p_device->port->dev,
  626. "Can't allocate mem when processing AER errors\n");
  627. return;
  628. }
  629. /*
  630. * There is a possibility that both correctable error and
  631. * uncorrectable error being logged. Report correctable error first.
  632. */
  633. if (e_src->status & PCI_ERR_ROOT_COR_RCV) {
  634. e_info->id = ERR_COR_ID(e_src->id);
  635. e_info->severity = AER_CORRECTABLE;
  636. if (e_src->status & PCI_ERR_ROOT_MULTI_COR_RCV)
  637. e_info->multi_error_valid = 1;
  638. else
  639. e_info->multi_error_valid = 0;
  640. aer_print_port_info(p_device->port, e_info);
  641. if (find_source_device(p_device->port, e_info))
  642. aer_process_err_devices(p_device, e_info);
  643. }
  644. if (e_src->status & PCI_ERR_ROOT_UNCOR_RCV) {
  645. e_info->id = ERR_UNCOR_ID(e_src->id);
  646. if (e_src->status & PCI_ERR_ROOT_FATAL_RCV)
  647. e_info->severity = AER_FATAL;
  648. else
  649. e_info->severity = AER_NONFATAL;
  650. if (e_src->status & PCI_ERR_ROOT_MULTI_UNCOR_RCV)
  651. e_info->multi_error_valid = 1;
  652. else
  653. e_info->multi_error_valid = 0;
  654. aer_print_port_info(p_device->port, e_info);
  655. if (find_source_device(p_device->port, e_info))
  656. aer_process_err_devices(p_device, e_info);
  657. }
  658. kfree(e_info);
  659. }
  660. /**
  661. * get_e_source - retrieve an error source
  662. * @rpc: pointer to the root port which holds an error
  663. * @e_src: pointer to store retrieved error source
  664. *
  665. * Return 1 if an error source is retrieved, otherwise 0.
  666. *
  667. * Invoked by DPC handler to consume an error.
  668. */
  669. static int get_e_source(struct aer_rpc *rpc, struct aer_err_source *e_src)
  670. {
  671. unsigned long flags;
  672. /* Lock access to Root error producer/consumer index */
  673. spin_lock_irqsave(&rpc->e_lock, flags);
  674. if (rpc->prod_idx == rpc->cons_idx) {
  675. spin_unlock_irqrestore(&rpc->e_lock, flags);
  676. return 0;
  677. }
  678. *e_src = rpc->e_sources[rpc->cons_idx];
  679. rpc->cons_idx++;
  680. if (rpc->cons_idx == AER_ERROR_SOURCES_MAX)
  681. rpc->cons_idx = 0;
  682. spin_unlock_irqrestore(&rpc->e_lock, flags);
  683. return 1;
  684. }
  685. /**
  686. * aer_isr - consume errors detected by root port
  687. * @work: definition of this work item
  688. *
  689. * Invoked, as DPC, when root port records new detected error
  690. */
  691. void aer_isr(struct work_struct *work)
  692. {
  693. struct aer_rpc *rpc = container_of(work, struct aer_rpc, dpc_handler);
  694. struct pcie_device *p_device = rpc->rpd;
  695. struct aer_err_source uninitialized_var(e_src);
  696. mutex_lock(&rpc->rpc_mutex);
  697. while (get_e_source(rpc, &e_src))
  698. aer_isr_one_error(p_device, &e_src);
  699. mutex_unlock(&rpc->rpc_mutex);
  700. wake_up(&rpc->wait_release);
  701. }
  702. /**
  703. * aer_init - provide AER initialization
  704. * @dev: pointer to AER pcie device
  705. *
  706. * Invoked when AER service driver is loaded.
  707. */
  708. int aer_init(struct pcie_device *dev)
  709. {
  710. if (forceload) {
  711. dev_printk(KERN_DEBUG, &dev->device,
  712. "aerdrv forceload requested.\n");
  713. pcie_aer_force_firmware_first(dev->port, 0);
  714. }
  715. return 0;
  716. }