via-velocity.c 92 KB

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  1. /*
  2. * This code is derived from the VIA reference driver (copyright message
  3. * below) provided to Red Hat by VIA Networking Technologies, Inc. for
  4. * addition to the Linux kernel.
  5. *
  6. * The code has been merged into one source file, cleaned up to follow
  7. * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
  8. * for 64bit hardware platforms.
  9. *
  10. * TODO
  11. * rx_copybreak/alignment
  12. * More testing
  13. *
  14. * The changes are (c) Copyright 2004, Red Hat Inc. <alan@lxorguk.ukuu.org.uk>
  15. * Additional fixes and clean up: Francois Romieu
  16. *
  17. * This source has not been verified for use in safety critical systems.
  18. *
  19. * Please direct queries about the revamped driver to the linux-kernel
  20. * list not VIA.
  21. *
  22. * Original code:
  23. *
  24. * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
  25. * All rights reserved.
  26. *
  27. * This software may be redistributed and/or modified under
  28. * the terms of the GNU General Public License as published by the Free
  29. * Software Foundation; either version 2 of the License, or
  30. * any later version.
  31. *
  32. * This program is distributed in the hope that it will be useful, but
  33. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  34. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  35. * for more details.
  36. *
  37. * Author: Chuang Liang-Shing, AJ Jiang
  38. *
  39. * Date: Jan 24, 2003
  40. *
  41. * MODULE_LICENSE("GPL");
  42. *
  43. */
  44. #include <linux/module.h>
  45. #include <linux/types.h>
  46. #include <linux/bitops.h>
  47. #include <linux/init.h>
  48. #include <linux/mm.h>
  49. #include <linux/errno.h>
  50. #include <linux/ioport.h>
  51. #include <linux/pci.h>
  52. #include <linux/kernel.h>
  53. #include <linux/netdevice.h>
  54. #include <linux/etherdevice.h>
  55. #include <linux/skbuff.h>
  56. #include <linux/delay.h>
  57. #include <linux/timer.h>
  58. #include <linux/slab.h>
  59. #include <linux/interrupt.h>
  60. #include <linux/string.h>
  61. #include <linux/wait.h>
  62. #include <linux/io.h>
  63. #include <linux/if.h>
  64. #include <linux/uaccess.h>
  65. #include <linux/proc_fs.h>
  66. #include <linux/inetdevice.h>
  67. #include <linux/reboot.h>
  68. #include <linux/ethtool.h>
  69. #include <linux/mii.h>
  70. #include <linux/in.h>
  71. #include <linux/if_arp.h>
  72. #include <linux/if_vlan.h>
  73. #include <linux/ip.h>
  74. #include <linux/tcp.h>
  75. #include <linux/udp.h>
  76. #include <linux/crc-ccitt.h>
  77. #include <linux/crc32.h>
  78. #include "via-velocity.h"
  79. static int velocity_nics;
  80. static int msglevel = MSG_LEVEL_INFO;
  81. /**
  82. * mac_get_cam_mask - Read a CAM mask
  83. * @regs: register block for this velocity
  84. * @mask: buffer to store mask
  85. *
  86. * Fetch the mask bits of the selected CAM and store them into the
  87. * provided mask buffer.
  88. */
  89. static void mac_get_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
  90. {
  91. int i;
  92. /* Select CAM mask */
  93. BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
  94. writeb(0, &regs->CAMADDR);
  95. /* read mask */
  96. for (i = 0; i < 8; i++)
  97. *mask++ = readb(&(regs->MARCAM[i]));
  98. /* disable CAMEN */
  99. writeb(0, &regs->CAMADDR);
  100. /* Select mar */
  101. BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
  102. }
  103. /**
  104. * mac_set_cam_mask - Set a CAM mask
  105. * @regs: register block for this velocity
  106. * @mask: CAM mask to load
  107. *
  108. * Store a new mask into a CAM
  109. */
  110. static void mac_set_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
  111. {
  112. int i;
  113. /* Select CAM mask */
  114. BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
  115. writeb(CAMADDR_CAMEN, &regs->CAMADDR);
  116. for (i = 0; i < 8; i++)
  117. writeb(*mask++, &(regs->MARCAM[i]));
  118. /* disable CAMEN */
  119. writeb(0, &regs->CAMADDR);
  120. /* Select mar */
  121. BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
  122. }
  123. static void mac_set_vlan_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
  124. {
  125. int i;
  126. /* Select CAM mask */
  127. BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
  128. writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, &regs->CAMADDR);
  129. for (i = 0; i < 8; i++)
  130. writeb(*mask++, &(regs->MARCAM[i]));
  131. /* disable CAMEN */
  132. writeb(0, &regs->CAMADDR);
  133. /* Select mar */
  134. BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
  135. }
  136. /**
  137. * mac_set_cam - set CAM data
  138. * @regs: register block of this velocity
  139. * @idx: Cam index
  140. * @addr: 2 or 6 bytes of CAM data
  141. *
  142. * Load an address or vlan tag into a CAM
  143. */
  144. static void mac_set_cam(struct mac_regs __iomem *regs, int idx, const u8 *addr)
  145. {
  146. int i;
  147. /* Select CAM mask */
  148. BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
  149. idx &= (64 - 1);
  150. writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
  151. for (i = 0; i < 6; i++)
  152. writeb(*addr++, &(regs->MARCAM[i]));
  153. BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
  154. udelay(10);
  155. writeb(0, &regs->CAMADDR);
  156. /* Select mar */
  157. BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
  158. }
  159. static void mac_set_vlan_cam(struct mac_regs __iomem *regs, int idx,
  160. const u8 *addr)
  161. {
  162. /* Select CAM mask */
  163. BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
  164. idx &= (64 - 1);
  165. writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, &regs->CAMADDR);
  166. writew(*((u16 *) addr), &regs->MARCAM[0]);
  167. BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
  168. udelay(10);
  169. writeb(0, &regs->CAMADDR);
  170. /* Select mar */
  171. BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
  172. }
  173. /**
  174. * mac_wol_reset - reset WOL after exiting low power
  175. * @regs: register block of this velocity
  176. *
  177. * Called after we drop out of wake on lan mode in order to
  178. * reset the Wake on lan features. This function doesn't restore
  179. * the rest of the logic from the result of sleep/wakeup
  180. */
  181. static void mac_wol_reset(struct mac_regs __iomem *regs)
  182. {
  183. /* Turn off SWPTAG right after leaving power mode */
  184. BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW);
  185. /* clear sticky bits */
  186. BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
  187. BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR);
  188. BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
  189. /* disable force PME-enable */
  190. writeb(WOLCFG_PMEOVR, &regs->WOLCFGClr);
  191. /* disable power-event config bit */
  192. writew(0xFFFF, &regs->WOLCRClr);
  193. /* clear power status */
  194. writew(0xFFFF, &regs->WOLSRClr);
  195. }
  196. static const struct ethtool_ops velocity_ethtool_ops;
  197. /*
  198. Define module options
  199. */
  200. MODULE_AUTHOR("VIA Networking Technologies, Inc.");
  201. MODULE_LICENSE("GPL");
  202. MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
  203. #define VELOCITY_PARAM(N, D) \
  204. static int N[MAX_UNITS] = OPTION_DEFAULT;\
  205. module_param_array(N, int, NULL, 0); \
  206. MODULE_PARM_DESC(N, D);
  207. #define RX_DESC_MIN 64
  208. #define RX_DESC_MAX 255
  209. #define RX_DESC_DEF 64
  210. VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
  211. #define TX_DESC_MIN 16
  212. #define TX_DESC_MAX 256
  213. #define TX_DESC_DEF 64
  214. VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
  215. #define RX_THRESH_MIN 0
  216. #define RX_THRESH_MAX 3
  217. #define RX_THRESH_DEF 0
  218. /* rx_thresh[] is used for controlling the receive fifo threshold.
  219. 0: indicate the rxfifo threshold is 128 bytes.
  220. 1: indicate the rxfifo threshold is 512 bytes.
  221. 2: indicate the rxfifo threshold is 1024 bytes.
  222. 3: indicate the rxfifo threshold is store & forward.
  223. */
  224. VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
  225. #define DMA_LENGTH_MIN 0
  226. #define DMA_LENGTH_MAX 7
  227. #define DMA_LENGTH_DEF 6
  228. /* DMA_length[] is used for controlling the DMA length
  229. 0: 8 DWORDs
  230. 1: 16 DWORDs
  231. 2: 32 DWORDs
  232. 3: 64 DWORDs
  233. 4: 128 DWORDs
  234. 5: 256 DWORDs
  235. 6: SF(flush till emply)
  236. 7: SF(flush till emply)
  237. */
  238. VELOCITY_PARAM(DMA_length, "DMA length");
  239. #define IP_ALIG_DEF 0
  240. /* IP_byte_align[] is used for IP header DWORD byte aligned
  241. 0: indicate the IP header won't be DWORD byte aligned.(Default) .
  242. 1: indicate the IP header will be DWORD byte aligned.
  243. In some environment, the IP header should be DWORD byte aligned,
  244. or the packet will be droped when we receive it. (eg: IPVS)
  245. */
  246. VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
  247. #define FLOW_CNTL_DEF 1
  248. #define FLOW_CNTL_MIN 1
  249. #define FLOW_CNTL_MAX 5
  250. /* flow_control[] is used for setting the flow control ability of NIC.
  251. 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
  252. 2: enable TX flow control.
  253. 3: enable RX flow control.
  254. 4: enable RX/TX flow control.
  255. 5: disable
  256. */
  257. VELOCITY_PARAM(flow_control, "Enable flow control ability");
  258. #define MED_LNK_DEF 0
  259. #define MED_LNK_MIN 0
  260. #define MED_LNK_MAX 5
  261. /* speed_duplex[] is used for setting the speed and duplex mode of NIC.
  262. 0: indicate autonegotiation for both speed and duplex mode
  263. 1: indicate 100Mbps half duplex mode
  264. 2: indicate 100Mbps full duplex mode
  265. 3: indicate 10Mbps half duplex mode
  266. 4: indicate 10Mbps full duplex mode
  267. 5: indicate 1000Mbps full duplex mode
  268. Note:
  269. if EEPROM have been set to the force mode, this option is ignored
  270. by driver.
  271. */
  272. VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
  273. #define VAL_PKT_LEN_DEF 0
  274. /* ValPktLen[] is used for setting the checksum offload ability of NIC.
  275. 0: Receive frame with invalid layer 2 length (Default)
  276. 1: Drop frame with invalid layer 2 length
  277. */
  278. VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
  279. #define WOL_OPT_DEF 0
  280. #define WOL_OPT_MIN 0
  281. #define WOL_OPT_MAX 7
  282. /* wol_opts[] is used for controlling wake on lan behavior.
  283. 0: Wake up if recevied a magic packet. (Default)
  284. 1: Wake up if link status is on/off.
  285. 2: Wake up if recevied an arp packet.
  286. 4: Wake up if recevied any unicast packet.
  287. Those value can be sumed up to support more than one option.
  288. */
  289. VELOCITY_PARAM(wol_opts, "Wake On Lan options");
  290. static int rx_copybreak = 200;
  291. module_param(rx_copybreak, int, 0644);
  292. MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
  293. /*
  294. * Internal board variants. At the moment we have only one
  295. */
  296. static struct velocity_info_tbl chip_info_table[] = {
  297. {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
  298. { }
  299. };
  300. /*
  301. * Describe the PCI device identifiers that we support in this
  302. * device driver. Used for hotplug autoloading.
  303. */
  304. static DEFINE_PCI_DEVICE_TABLE(velocity_id_table) = {
  305. { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
  306. { }
  307. };
  308. MODULE_DEVICE_TABLE(pci, velocity_id_table);
  309. /**
  310. * get_chip_name - identifier to name
  311. * @id: chip identifier
  312. *
  313. * Given a chip identifier return a suitable description. Returns
  314. * a pointer a static string valid while the driver is loaded.
  315. */
  316. static const char *get_chip_name(enum chip_type chip_id)
  317. {
  318. int i;
  319. for (i = 0; chip_info_table[i].name != NULL; i++)
  320. if (chip_info_table[i].chip_id == chip_id)
  321. break;
  322. return chip_info_table[i].name;
  323. }
  324. /**
  325. * velocity_remove1 - device unplug
  326. * @pdev: PCI device being removed
  327. *
  328. * Device unload callback. Called on an unplug or on module
  329. * unload for each active device that is present. Disconnects
  330. * the device from the network layer and frees all the resources
  331. */
  332. static void velocity_remove1(struct pci_dev *pdev)
  333. {
  334. struct net_device *dev = pci_get_drvdata(pdev);
  335. struct velocity_info *vptr = netdev_priv(dev);
  336. unregister_netdev(dev);
  337. iounmap(vptr->mac_regs);
  338. pci_release_regions(pdev);
  339. pci_disable_device(pdev);
  340. pci_set_drvdata(pdev, NULL);
  341. free_netdev(dev);
  342. velocity_nics--;
  343. }
  344. /**
  345. * velocity_set_int_opt - parser for integer options
  346. * @opt: pointer to option value
  347. * @val: value the user requested (or -1 for default)
  348. * @min: lowest value allowed
  349. * @max: highest value allowed
  350. * @def: default value
  351. * @name: property name
  352. * @dev: device name
  353. *
  354. * Set an integer property in the module options. This function does
  355. * all the verification and checking as well as reporting so that
  356. * we don't duplicate code for each option.
  357. */
  358. static void velocity_set_int_opt(int *opt, int val, int min, int max, int def,
  359. char *name, const char *devname)
  360. {
  361. if (val == -1)
  362. *opt = def;
  363. else if (val < min || val > max) {
  364. VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
  365. devname, name, min, max);
  366. *opt = def;
  367. } else {
  368. VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
  369. devname, name, val);
  370. *opt = val;
  371. }
  372. }
  373. /**
  374. * velocity_set_bool_opt - parser for boolean options
  375. * @opt: pointer to option value
  376. * @val: value the user requested (or -1 for default)
  377. * @def: default value (yes/no)
  378. * @flag: numeric value to set for true.
  379. * @name: property name
  380. * @dev: device name
  381. *
  382. * Set a boolean property in the module options. This function does
  383. * all the verification and checking as well as reporting so that
  384. * we don't duplicate code for each option.
  385. */
  386. static void velocity_set_bool_opt(u32 *opt, int val, int def, u32 flag,
  387. char *name, const char *devname)
  388. {
  389. (*opt) &= (~flag);
  390. if (val == -1)
  391. *opt |= (def ? flag : 0);
  392. else if (val < 0 || val > 1) {
  393. printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
  394. devname, name);
  395. *opt |= (def ? flag : 0);
  396. } else {
  397. printk(KERN_INFO "%s: set parameter %s to %s\n",
  398. devname, name, val ? "TRUE" : "FALSE");
  399. *opt |= (val ? flag : 0);
  400. }
  401. }
  402. /**
  403. * velocity_get_options - set options on device
  404. * @opts: option structure for the device
  405. * @index: index of option to use in module options array
  406. * @devname: device name
  407. *
  408. * Turn the module and command options into a single structure
  409. * for the current device
  410. */
  411. static void velocity_get_options(struct velocity_opt *opts, int index,
  412. const char *devname)
  413. {
  414. velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
  415. velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
  416. velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
  417. velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
  418. velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
  419. velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
  420. velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname);
  421. velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
  422. velocity_set_int_opt(&opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
  423. opts->numrx = (opts->numrx & ~3);
  424. }
  425. /**
  426. * velocity_init_cam_filter - initialise CAM
  427. * @vptr: velocity to program
  428. *
  429. * Initialize the content addressable memory used for filters. Load
  430. * appropriately according to the presence of VLAN
  431. */
  432. static void velocity_init_cam_filter(struct velocity_info *vptr)
  433. {
  434. struct mac_regs __iomem *regs = vptr->mac_regs;
  435. unsigned int vid, i = 0;
  436. /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
  437. WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
  438. WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
  439. /* Disable all CAMs */
  440. memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
  441. memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
  442. mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
  443. mac_set_cam_mask(regs, vptr->mCAMmask);
  444. /* Enable VCAMs */
  445. for_each_set_bit(vid, vptr->active_vlans, VLAN_N_VID) {
  446. mac_set_vlan_cam(regs, i, (u8 *) &vid);
  447. vptr->vCAMmask[i / 8] |= 0x1 << (i % 8);
  448. if (++i >= VCAM_SIZE)
  449. break;
  450. }
  451. mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
  452. }
  453. static int velocity_vlan_rx_add_vid(struct net_device *dev,
  454. __be16 proto, u16 vid)
  455. {
  456. struct velocity_info *vptr = netdev_priv(dev);
  457. spin_lock_irq(&vptr->lock);
  458. set_bit(vid, vptr->active_vlans);
  459. velocity_init_cam_filter(vptr);
  460. spin_unlock_irq(&vptr->lock);
  461. return 0;
  462. }
  463. static int velocity_vlan_rx_kill_vid(struct net_device *dev,
  464. __be16 proto, u16 vid)
  465. {
  466. struct velocity_info *vptr = netdev_priv(dev);
  467. spin_lock_irq(&vptr->lock);
  468. clear_bit(vid, vptr->active_vlans);
  469. velocity_init_cam_filter(vptr);
  470. spin_unlock_irq(&vptr->lock);
  471. return 0;
  472. }
  473. static void velocity_init_rx_ring_indexes(struct velocity_info *vptr)
  474. {
  475. vptr->rx.dirty = vptr->rx.filled = vptr->rx.curr = 0;
  476. }
  477. /**
  478. * velocity_rx_reset - handle a receive reset
  479. * @vptr: velocity we are resetting
  480. *
  481. * Reset the ownership and status for the receive ring side.
  482. * Hand all the receive queue to the NIC.
  483. */
  484. static void velocity_rx_reset(struct velocity_info *vptr)
  485. {
  486. struct mac_regs __iomem *regs = vptr->mac_regs;
  487. int i;
  488. velocity_init_rx_ring_indexes(vptr);
  489. /*
  490. * Init state, all RD entries belong to the NIC
  491. */
  492. for (i = 0; i < vptr->options.numrx; ++i)
  493. vptr->rx.ring[i].rdesc0.len |= OWNED_BY_NIC;
  494. writew(vptr->options.numrx, &regs->RBRDU);
  495. writel(vptr->rx.pool_dma, &regs->RDBaseLo);
  496. writew(0, &regs->RDIdx);
  497. writew(vptr->options.numrx - 1, &regs->RDCSize);
  498. }
  499. /**
  500. * velocity_get_opt_media_mode - get media selection
  501. * @vptr: velocity adapter
  502. *
  503. * Get the media mode stored in EEPROM or module options and load
  504. * mii_status accordingly. The requested link state information
  505. * is also returned.
  506. */
  507. static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
  508. {
  509. u32 status = 0;
  510. switch (vptr->options.spd_dpx) {
  511. case SPD_DPX_AUTO:
  512. status = VELOCITY_AUTONEG_ENABLE;
  513. break;
  514. case SPD_DPX_100_FULL:
  515. status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
  516. break;
  517. case SPD_DPX_10_FULL:
  518. status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
  519. break;
  520. case SPD_DPX_100_HALF:
  521. status = VELOCITY_SPEED_100;
  522. break;
  523. case SPD_DPX_10_HALF:
  524. status = VELOCITY_SPEED_10;
  525. break;
  526. case SPD_DPX_1000_FULL:
  527. status = VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
  528. break;
  529. }
  530. vptr->mii_status = status;
  531. return status;
  532. }
  533. /**
  534. * safe_disable_mii_autopoll - autopoll off
  535. * @regs: velocity registers
  536. *
  537. * Turn off the autopoll and wait for it to disable on the chip
  538. */
  539. static void safe_disable_mii_autopoll(struct mac_regs __iomem *regs)
  540. {
  541. u16 ww;
  542. /* turn off MAUTO */
  543. writeb(0, &regs->MIICR);
  544. for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
  545. udelay(1);
  546. if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
  547. break;
  548. }
  549. }
  550. /**
  551. * enable_mii_autopoll - turn on autopolling
  552. * @regs: velocity registers
  553. *
  554. * Enable the MII link status autopoll feature on the Velocity
  555. * hardware. Wait for it to enable.
  556. */
  557. static void enable_mii_autopoll(struct mac_regs __iomem *regs)
  558. {
  559. int ii;
  560. writeb(0, &(regs->MIICR));
  561. writeb(MIIADR_SWMPL, &regs->MIIADR);
  562. for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
  563. udelay(1);
  564. if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
  565. break;
  566. }
  567. writeb(MIICR_MAUTO, &regs->MIICR);
  568. for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
  569. udelay(1);
  570. if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
  571. break;
  572. }
  573. }
  574. /**
  575. * velocity_mii_read - read MII data
  576. * @regs: velocity registers
  577. * @index: MII register index
  578. * @data: buffer for received data
  579. *
  580. * Perform a single read of an MII 16bit register. Returns zero
  581. * on success or -ETIMEDOUT if the PHY did not respond.
  582. */
  583. static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
  584. {
  585. u16 ww;
  586. /*
  587. * Disable MIICR_MAUTO, so that mii addr can be set normally
  588. */
  589. safe_disable_mii_autopoll(regs);
  590. writeb(index, &regs->MIIADR);
  591. BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
  592. for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
  593. if (!(readb(&regs->MIICR) & MIICR_RCMD))
  594. break;
  595. }
  596. *data = readw(&regs->MIIDATA);
  597. enable_mii_autopoll(regs);
  598. if (ww == W_MAX_TIMEOUT)
  599. return -ETIMEDOUT;
  600. return 0;
  601. }
  602. /**
  603. * mii_check_media_mode - check media state
  604. * @regs: velocity registers
  605. *
  606. * Check the current MII status and determine the link status
  607. * accordingly
  608. */
  609. static u32 mii_check_media_mode(struct mac_regs __iomem *regs)
  610. {
  611. u32 status = 0;
  612. u16 ANAR;
  613. if (!MII_REG_BITS_IS_ON(BMSR_LSTATUS, MII_BMSR, regs))
  614. status |= VELOCITY_LINK_FAIL;
  615. if (MII_REG_BITS_IS_ON(ADVERTISE_1000FULL, MII_CTRL1000, regs))
  616. status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
  617. else if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF, MII_CTRL1000, regs))
  618. status |= (VELOCITY_SPEED_1000);
  619. else {
  620. velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
  621. if (ANAR & ADVERTISE_100FULL)
  622. status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
  623. else if (ANAR & ADVERTISE_100HALF)
  624. status |= VELOCITY_SPEED_100;
  625. else if (ANAR & ADVERTISE_10FULL)
  626. status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
  627. else
  628. status |= (VELOCITY_SPEED_10);
  629. }
  630. if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, regs)) {
  631. velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
  632. if ((ANAR & (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF))
  633. == (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF)) {
  634. if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF | ADVERTISE_1000FULL, MII_CTRL1000, regs))
  635. status |= VELOCITY_AUTONEG_ENABLE;
  636. }
  637. }
  638. return status;
  639. }
  640. /**
  641. * velocity_mii_write - write MII data
  642. * @regs: velocity registers
  643. * @index: MII register index
  644. * @data: 16bit data for the MII register
  645. *
  646. * Perform a single write to an MII 16bit register. Returns zero
  647. * on success or -ETIMEDOUT if the PHY did not respond.
  648. */
  649. static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
  650. {
  651. u16 ww;
  652. /*
  653. * Disable MIICR_MAUTO, so that mii addr can be set normally
  654. */
  655. safe_disable_mii_autopoll(regs);
  656. /* MII reg offset */
  657. writeb(mii_addr, &regs->MIIADR);
  658. /* set MII data */
  659. writew(data, &regs->MIIDATA);
  660. /* turn on MIICR_WCMD */
  661. BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
  662. /* W_MAX_TIMEOUT is the timeout period */
  663. for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
  664. udelay(5);
  665. if (!(readb(&regs->MIICR) & MIICR_WCMD))
  666. break;
  667. }
  668. enable_mii_autopoll(regs);
  669. if (ww == W_MAX_TIMEOUT)
  670. return -ETIMEDOUT;
  671. return 0;
  672. }
  673. /**
  674. * set_mii_flow_control - flow control setup
  675. * @vptr: velocity interface
  676. *
  677. * Set up the flow control on this interface according to
  678. * the supplied user/eeprom options.
  679. */
  680. static void set_mii_flow_control(struct velocity_info *vptr)
  681. {
  682. /*Enable or Disable PAUSE in ANAR */
  683. switch (vptr->options.flow_cntl) {
  684. case FLOW_CNTL_TX:
  685. MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
  686. MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
  687. break;
  688. case FLOW_CNTL_RX:
  689. MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
  690. MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
  691. break;
  692. case FLOW_CNTL_TX_RX:
  693. MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
  694. MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
  695. break;
  696. case FLOW_CNTL_DISABLE:
  697. MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
  698. MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
  699. break;
  700. default:
  701. break;
  702. }
  703. }
  704. /**
  705. * mii_set_auto_on - autonegotiate on
  706. * @vptr: velocity
  707. *
  708. * Enable autonegotation on this interface
  709. */
  710. static void mii_set_auto_on(struct velocity_info *vptr)
  711. {
  712. if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs))
  713. MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs);
  714. else
  715. MII_REG_BITS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs);
  716. }
  717. static u32 check_connection_type(struct mac_regs __iomem *regs)
  718. {
  719. u32 status = 0;
  720. u8 PHYSR0;
  721. u16 ANAR;
  722. PHYSR0 = readb(&regs->PHYSR0);
  723. /*
  724. if (!(PHYSR0 & PHYSR0_LINKGD))
  725. status|=VELOCITY_LINK_FAIL;
  726. */
  727. if (PHYSR0 & PHYSR0_FDPX)
  728. status |= VELOCITY_DUPLEX_FULL;
  729. if (PHYSR0 & PHYSR0_SPDG)
  730. status |= VELOCITY_SPEED_1000;
  731. else if (PHYSR0 & PHYSR0_SPD10)
  732. status |= VELOCITY_SPEED_10;
  733. else
  734. status |= VELOCITY_SPEED_100;
  735. if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, regs)) {
  736. velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
  737. if ((ANAR & (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF))
  738. == (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF)) {
  739. if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF | ADVERTISE_1000FULL, MII_CTRL1000, regs))
  740. status |= VELOCITY_AUTONEG_ENABLE;
  741. }
  742. }
  743. return status;
  744. }
  745. /**
  746. * velocity_set_media_mode - set media mode
  747. * @mii_status: old MII link state
  748. *
  749. * Check the media link state and configure the flow control
  750. * PHY and also velocity hardware setup accordingly. In particular
  751. * we need to set up CD polling and frame bursting.
  752. */
  753. static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
  754. {
  755. u32 curr_status;
  756. struct mac_regs __iomem *regs = vptr->mac_regs;
  757. vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
  758. curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
  759. /* Set mii link status */
  760. set_mii_flow_control(vptr);
  761. /*
  762. Check if new status is consistent with current status
  763. if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE) ||
  764. (mii_status==curr_status)) {
  765. vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
  766. vptr->mii_status=check_connection_type(vptr->mac_regs);
  767. VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
  768. return 0;
  769. }
  770. */
  771. if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
  772. MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs);
  773. /*
  774. * If connection type is AUTO
  775. */
  776. if (mii_status & VELOCITY_AUTONEG_ENABLE) {
  777. VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
  778. /* clear force MAC mode bit */
  779. BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
  780. /* set duplex mode of MAC according to duplex mode of MII */
  781. MII_REG_BITS_ON(ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF, MII_ADVERTISE, vptr->mac_regs);
  782. MII_REG_BITS_ON(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs);
  783. MII_REG_BITS_ON(BMCR_SPEED1000, MII_BMCR, vptr->mac_regs);
  784. /* enable AUTO-NEGO mode */
  785. mii_set_auto_on(vptr);
  786. } else {
  787. u16 CTRL1000;
  788. u16 ANAR;
  789. u8 CHIPGCR;
  790. /*
  791. * 1. if it's 3119, disable frame bursting in halfduplex mode
  792. * and enable it in fullduplex mode
  793. * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
  794. * 3. only enable CD heart beat counter in 10HD mode
  795. */
  796. /* set force MAC mode bit */
  797. BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
  798. CHIPGCR = readb(&regs->CHIPGCR);
  799. if (mii_status & VELOCITY_SPEED_1000)
  800. CHIPGCR |= CHIPGCR_FCGMII;
  801. else
  802. CHIPGCR &= ~CHIPGCR_FCGMII;
  803. if (mii_status & VELOCITY_DUPLEX_FULL) {
  804. CHIPGCR |= CHIPGCR_FCFDX;
  805. writeb(CHIPGCR, &regs->CHIPGCR);
  806. VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
  807. if (vptr->rev_id < REV_ID_VT3216_A0)
  808. BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
  809. } else {
  810. CHIPGCR &= ~CHIPGCR_FCFDX;
  811. VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
  812. writeb(CHIPGCR, &regs->CHIPGCR);
  813. if (vptr->rev_id < REV_ID_VT3216_A0)
  814. BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
  815. }
  816. velocity_mii_read(vptr->mac_regs, MII_CTRL1000, &CTRL1000);
  817. CTRL1000 &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
  818. if ((mii_status & VELOCITY_SPEED_1000) &&
  819. (mii_status & VELOCITY_DUPLEX_FULL)) {
  820. CTRL1000 |= ADVERTISE_1000FULL;
  821. }
  822. velocity_mii_write(vptr->mac_regs, MII_CTRL1000, CTRL1000);
  823. if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10))
  824. BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
  825. else
  826. BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
  827. /* MII_REG_BITS_OFF(BMCR_SPEED1000, MII_BMCR, vptr->mac_regs); */
  828. velocity_mii_read(vptr->mac_regs, MII_ADVERTISE, &ANAR);
  829. ANAR &= (~(ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF));
  830. if (mii_status & VELOCITY_SPEED_100) {
  831. if (mii_status & VELOCITY_DUPLEX_FULL)
  832. ANAR |= ADVERTISE_100FULL;
  833. else
  834. ANAR |= ADVERTISE_100HALF;
  835. } else if (mii_status & VELOCITY_SPEED_10) {
  836. if (mii_status & VELOCITY_DUPLEX_FULL)
  837. ANAR |= ADVERTISE_10FULL;
  838. else
  839. ANAR |= ADVERTISE_10HALF;
  840. }
  841. velocity_mii_write(vptr->mac_regs, MII_ADVERTISE, ANAR);
  842. /* enable AUTO-NEGO mode */
  843. mii_set_auto_on(vptr);
  844. /* MII_REG_BITS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs); */
  845. }
  846. /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
  847. /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
  848. return VELOCITY_LINK_CHANGE;
  849. }
  850. /**
  851. * velocity_print_link_status - link status reporting
  852. * @vptr: velocity to report on
  853. *
  854. * Turn the link status of the velocity card into a kernel log
  855. * description of the new link state, detailing speed and duplex
  856. * status
  857. */
  858. static void velocity_print_link_status(struct velocity_info *vptr)
  859. {
  860. if (vptr->mii_status & VELOCITY_LINK_FAIL) {
  861. VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name);
  862. } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
  863. VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name);
  864. if (vptr->mii_status & VELOCITY_SPEED_1000)
  865. VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
  866. else if (vptr->mii_status & VELOCITY_SPEED_100)
  867. VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
  868. else
  869. VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
  870. if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
  871. VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
  872. else
  873. VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
  874. } else {
  875. VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name);
  876. switch (vptr->options.spd_dpx) {
  877. case SPD_DPX_1000_FULL:
  878. VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps full duplex\n");
  879. break;
  880. case SPD_DPX_100_HALF:
  881. VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
  882. break;
  883. case SPD_DPX_100_FULL:
  884. VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
  885. break;
  886. case SPD_DPX_10_HALF:
  887. VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
  888. break;
  889. case SPD_DPX_10_FULL:
  890. VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
  891. break;
  892. default:
  893. break;
  894. }
  895. }
  896. }
  897. /**
  898. * enable_flow_control_ability - flow control
  899. * @vptr: veloity to configure
  900. *
  901. * Set up flow control according to the flow control options
  902. * determined by the eeprom/configuration.
  903. */
  904. static void enable_flow_control_ability(struct velocity_info *vptr)
  905. {
  906. struct mac_regs __iomem *regs = vptr->mac_regs;
  907. switch (vptr->options.flow_cntl) {
  908. case FLOW_CNTL_DEFAULT:
  909. if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
  910. writel(CR0_FDXRFCEN, &regs->CR0Set);
  911. else
  912. writel(CR0_FDXRFCEN, &regs->CR0Clr);
  913. if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
  914. writel(CR0_FDXTFCEN, &regs->CR0Set);
  915. else
  916. writel(CR0_FDXTFCEN, &regs->CR0Clr);
  917. break;
  918. case FLOW_CNTL_TX:
  919. writel(CR0_FDXTFCEN, &regs->CR0Set);
  920. writel(CR0_FDXRFCEN, &regs->CR0Clr);
  921. break;
  922. case FLOW_CNTL_RX:
  923. writel(CR0_FDXRFCEN, &regs->CR0Set);
  924. writel(CR0_FDXTFCEN, &regs->CR0Clr);
  925. break;
  926. case FLOW_CNTL_TX_RX:
  927. writel(CR0_FDXTFCEN, &regs->CR0Set);
  928. writel(CR0_FDXRFCEN, &regs->CR0Set);
  929. break;
  930. case FLOW_CNTL_DISABLE:
  931. writel(CR0_FDXRFCEN, &regs->CR0Clr);
  932. writel(CR0_FDXTFCEN, &regs->CR0Clr);
  933. break;
  934. default:
  935. break;
  936. }
  937. }
  938. /**
  939. * velocity_soft_reset - soft reset
  940. * @vptr: velocity to reset
  941. *
  942. * Kick off a soft reset of the velocity adapter and then poll
  943. * until the reset sequence has completed before returning.
  944. */
  945. static int velocity_soft_reset(struct velocity_info *vptr)
  946. {
  947. struct mac_regs __iomem *regs = vptr->mac_regs;
  948. int i = 0;
  949. writel(CR0_SFRST, &regs->CR0Set);
  950. for (i = 0; i < W_MAX_TIMEOUT; i++) {
  951. udelay(5);
  952. if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
  953. break;
  954. }
  955. if (i == W_MAX_TIMEOUT) {
  956. writel(CR0_FORSRST, &regs->CR0Set);
  957. /* FIXME: PCI POSTING */
  958. /* delay 2ms */
  959. mdelay(2);
  960. }
  961. return 0;
  962. }
  963. /**
  964. * velocity_set_multi - filter list change callback
  965. * @dev: network device
  966. *
  967. * Called by the network layer when the filter lists need to change
  968. * for a velocity adapter. Reload the CAMs with the new address
  969. * filter ruleset.
  970. */
  971. static void velocity_set_multi(struct net_device *dev)
  972. {
  973. struct velocity_info *vptr = netdev_priv(dev);
  974. struct mac_regs __iomem *regs = vptr->mac_regs;
  975. u8 rx_mode;
  976. int i;
  977. struct netdev_hw_addr *ha;
  978. if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
  979. writel(0xffffffff, &regs->MARCAM[0]);
  980. writel(0xffffffff, &regs->MARCAM[4]);
  981. rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
  982. } else if ((netdev_mc_count(dev) > vptr->multicast_limit) ||
  983. (dev->flags & IFF_ALLMULTI)) {
  984. writel(0xffffffff, &regs->MARCAM[0]);
  985. writel(0xffffffff, &regs->MARCAM[4]);
  986. rx_mode = (RCR_AM | RCR_AB);
  987. } else {
  988. int offset = MCAM_SIZE - vptr->multicast_limit;
  989. mac_get_cam_mask(regs, vptr->mCAMmask);
  990. i = 0;
  991. netdev_for_each_mc_addr(ha, dev) {
  992. mac_set_cam(regs, i + offset, ha->addr);
  993. vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
  994. i++;
  995. }
  996. mac_set_cam_mask(regs, vptr->mCAMmask);
  997. rx_mode = RCR_AM | RCR_AB | RCR_AP;
  998. }
  999. if (dev->mtu > 1500)
  1000. rx_mode |= RCR_AL;
  1001. BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
  1002. }
  1003. /*
  1004. * MII access , media link mode setting functions
  1005. */
  1006. /**
  1007. * mii_init - set up MII
  1008. * @vptr: velocity adapter
  1009. * @mii_status: links tatus
  1010. *
  1011. * Set up the PHY for the current link state.
  1012. */
  1013. static void mii_init(struct velocity_info *vptr, u32 mii_status)
  1014. {
  1015. u16 BMCR;
  1016. switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
  1017. case PHYID_CICADA_CS8201:
  1018. /*
  1019. * Reset to hardware default
  1020. */
  1021. MII_REG_BITS_OFF((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
  1022. /*
  1023. * Turn on ECHODIS bit in NWay-forced full mode and turn it
  1024. * off it in NWay-forced half mode for NWay-forced v.s.
  1025. * legacy-forced issue.
  1026. */
  1027. if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
  1028. MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
  1029. else
  1030. MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
  1031. /*
  1032. * Turn on Link/Activity LED enable bit for CIS8201
  1033. */
  1034. MII_REG_BITS_ON(PLED_LALBE, MII_TPISTATUS, vptr->mac_regs);
  1035. break;
  1036. case PHYID_VT3216_32BIT:
  1037. case PHYID_VT3216_64BIT:
  1038. /*
  1039. * Reset to hardware default
  1040. */
  1041. MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
  1042. /*
  1043. * Turn on ECHODIS bit in NWay-forced full mode and turn it
  1044. * off it in NWay-forced half mode for NWay-forced v.s.
  1045. * legacy-forced issue
  1046. */
  1047. if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
  1048. MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
  1049. else
  1050. MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
  1051. break;
  1052. case PHYID_MARVELL_1000:
  1053. case PHYID_MARVELL_1000S:
  1054. /*
  1055. * Assert CRS on Transmit
  1056. */
  1057. MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
  1058. /*
  1059. * Reset to hardware default
  1060. */
  1061. MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
  1062. break;
  1063. default:
  1064. ;
  1065. }
  1066. velocity_mii_read(vptr->mac_regs, MII_BMCR, &BMCR);
  1067. if (BMCR & BMCR_ISOLATE) {
  1068. BMCR &= ~BMCR_ISOLATE;
  1069. velocity_mii_write(vptr->mac_regs, MII_BMCR, BMCR);
  1070. }
  1071. }
  1072. /**
  1073. * setup_queue_timers - Setup interrupt timers
  1074. *
  1075. * Setup interrupt frequency during suppression (timeout if the frame
  1076. * count isn't filled).
  1077. */
  1078. static void setup_queue_timers(struct velocity_info *vptr)
  1079. {
  1080. /* Only for newer revisions */
  1081. if (vptr->rev_id >= REV_ID_VT3216_A0) {
  1082. u8 txqueue_timer = 0;
  1083. u8 rxqueue_timer = 0;
  1084. if (vptr->mii_status & (VELOCITY_SPEED_1000 |
  1085. VELOCITY_SPEED_100)) {
  1086. txqueue_timer = vptr->options.txqueue_timer;
  1087. rxqueue_timer = vptr->options.rxqueue_timer;
  1088. }
  1089. writeb(txqueue_timer, &vptr->mac_regs->TQETMR);
  1090. writeb(rxqueue_timer, &vptr->mac_regs->RQETMR);
  1091. }
  1092. }
  1093. /**
  1094. * setup_adaptive_interrupts - Setup interrupt suppression
  1095. *
  1096. * @vptr velocity adapter
  1097. *
  1098. * The velocity is able to suppress interrupt during high interrupt load.
  1099. * This function turns on that feature.
  1100. */
  1101. static void setup_adaptive_interrupts(struct velocity_info *vptr)
  1102. {
  1103. struct mac_regs __iomem *regs = vptr->mac_regs;
  1104. u16 tx_intsup = vptr->options.tx_intsup;
  1105. u16 rx_intsup = vptr->options.rx_intsup;
  1106. /* Setup default interrupt mask (will be changed below) */
  1107. vptr->int_mask = INT_MASK_DEF;
  1108. /* Set Tx Interrupt Suppression Threshold */
  1109. writeb(CAMCR_PS0, &regs->CAMCR);
  1110. if (tx_intsup != 0) {
  1111. vptr->int_mask &= ~(ISR_PTXI | ISR_PTX0I | ISR_PTX1I |
  1112. ISR_PTX2I | ISR_PTX3I);
  1113. writew(tx_intsup, &regs->ISRCTL);
  1114. } else
  1115. writew(ISRCTL_TSUPDIS, &regs->ISRCTL);
  1116. /* Set Rx Interrupt Suppression Threshold */
  1117. writeb(CAMCR_PS1, &regs->CAMCR);
  1118. if (rx_intsup != 0) {
  1119. vptr->int_mask &= ~ISR_PRXI;
  1120. writew(rx_intsup, &regs->ISRCTL);
  1121. } else
  1122. writew(ISRCTL_RSUPDIS, &regs->ISRCTL);
  1123. /* Select page to interrupt hold timer */
  1124. writeb(0, &regs->CAMCR);
  1125. }
  1126. /**
  1127. * velocity_init_registers - initialise MAC registers
  1128. * @vptr: velocity to init
  1129. * @type: type of initialisation (hot or cold)
  1130. *
  1131. * Initialise the MAC on a reset or on first set up on the
  1132. * hardware.
  1133. */
  1134. static void velocity_init_registers(struct velocity_info *vptr,
  1135. enum velocity_init_type type)
  1136. {
  1137. struct mac_regs __iomem *regs = vptr->mac_regs;
  1138. int i, mii_status;
  1139. mac_wol_reset(regs);
  1140. switch (type) {
  1141. case VELOCITY_INIT_RESET:
  1142. case VELOCITY_INIT_WOL:
  1143. netif_stop_queue(vptr->dev);
  1144. /*
  1145. * Reset RX to prevent RX pointer not on the 4X location
  1146. */
  1147. velocity_rx_reset(vptr);
  1148. mac_rx_queue_run(regs);
  1149. mac_rx_queue_wake(regs);
  1150. mii_status = velocity_get_opt_media_mode(vptr);
  1151. if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
  1152. velocity_print_link_status(vptr);
  1153. if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
  1154. netif_wake_queue(vptr->dev);
  1155. }
  1156. enable_flow_control_ability(vptr);
  1157. mac_clear_isr(regs);
  1158. writel(CR0_STOP, &regs->CR0Clr);
  1159. writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
  1160. &regs->CR0Set);
  1161. break;
  1162. case VELOCITY_INIT_COLD:
  1163. default:
  1164. /*
  1165. * Do reset
  1166. */
  1167. velocity_soft_reset(vptr);
  1168. mdelay(5);
  1169. mac_eeprom_reload(regs);
  1170. for (i = 0; i < 6; i++)
  1171. writeb(vptr->dev->dev_addr[i], &(regs->PAR[i]));
  1172. /*
  1173. * clear Pre_ACPI bit.
  1174. */
  1175. BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
  1176. mac_set_rx_thresh(regs, vptr->options.rx_thresh);
  1177. mac_set_dma_length(regs, vptr->options.DMA_length);
  1178. writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
  1179. /*
  1180. * Back off algorithm use original IEEE standard
  1181. */
  1182. BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
  1183. /*
  1184. * Init CAM filter
  1185. */
  1186. velocity_init_cam_filter(vptr);
  1187. /*
  1188. * Set packet filter: Receive directed and broadcast address
  1189. */
  1190. velocity_set_multi(vptr->dev);
  1191. /*
  1192. * Enable MII auto-polling
  1193. */
  1194. enable_mii_autopoll(regs);
  1195. setup_adaptive_interrupts(vptr);
  1196. writel(vptr->rx.pool_dma, &regs->RDBaseLo);
  1197. writew(vptr->options.numrx - 1, &regs->RDCSize);
  1198. mac_rx_queue_run(regs);
  1199. mac_rx_queue_wake(regs);
  1200. writew(vptr->options.numtx - 1, &regs->TDCSize);
  1201. for (i = 0; i < vptr->tx.numq; i++) {
  1202. writel(vptr->tx.pool_dma[i], &regs->TDBaseLo[i]);
  1203. mac_tx_queue_run(regs, i);
  1204. }
  1205. init_flow_control_register(vptr);
  1206. writel(CR0_STOP, &regs->CR0Clr);
  1207. writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
  1208. mii_status = velocity_get_opt_media_mode(vptr);
  1209. netif_stop_queue(vptr->dev);
  1210. mii_init(vptr, mii_status);
  1211. if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
  1212. velocity_print_link_status(vptr);
  1213. if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
  1214. netif_wake_queue(vptr->dev);
  1215. }
  1216. enable_flow_control_ability(vptr);
  1217. mac_hw_mibs_init(regs);
  1218. mac_write_int_mask(vptr->int_mask, regs);
  1219. mac_clear_isr(regs);
  1220. }
  1221. }
  1222. static void velocity_give_many_rx_descs(struct velocity_info *vptr)
  1223. {
  1224. struct mac_regs __iomem *regs = vptr->mac_regs;
  1225. int avail, dirty, unusable;
  1226. /*
  1227. * RD number must be equal to 4X per hardware spec
  1228. * (programming guide rev 1.20, p.13)
  1229. */
  1230. if (vptr->rx.filled < 4)
  1231. return;
  1232. wmb();
  1233. unusable = vptr->rx.filled & 0x0003;
  1234. dirty = vptr->rx.dirty - unusable;
  1235. for (avail = vptr->rx.filled & 0xfffc; avail; avail--) {
  1236. dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
  1237. vptr->rx.ring[dirty].rdesc0.len |= OWNED_BY_NIC;
  1238. }
  1239. writew(vptr->rx.filled & 0xfffc, &regs->RBRDU);
  1240. vptr->rx.filled = unusable;
  1241. }
  1242. /**
  1243. * velocity_init_dma_rings - set up DMA rings
  1244. * @vptr: Velocity to set up
  1245. *
  1246. * Allocate PCI mapped DMA rings for the receive and transmit layer
  1247. * to use.
  1248. */
  1249. static int velocity_init_dma_rings(struct velocity_info *vptr)
  1250. {
  1251. struct velocity_opt *opt = &vptr->options;
  1252. const unsigned int rx_ring_size = opt->numrx * sizeof(struct rx_desc);
  1253. const unsigned int tx_ring_size = opt->numtx * sizeof(struct tx_desc);
  1254. struct pci_dev *pdev = vptr->pdev;
  1255. dma_addr_t pool_dma;
  1256. void *pool;
  1257. unsigned int i;
  1258. /*
  1259. * Allocate all RD/TD rings a single pool.
  1260. *
  1261. * pci_alloc_consistent() fulfills the requirement for 64 bytes
  1262. * alignment
  1263. */
  1264. pool = pci_alloc_consistent(pdev, tx_ring_size * vptr->tx.numq +
  1265. rx_ring_size, &pool_dma);
  1266. if (!pool) {
  1267. dev_err(&pdev->dev, "%s : DMA memory allocation failed.\n",
  1268. vptr->dev->name);
  1269. return -ENOMEM;
  1270. }
  1271. vptr->rx.ring = pool;
  1272. vptr->rx.pool_dma = pool_dma;
  1273. pool += rx_ring_size;
  1274. pool_dma += rx_ring_size;
  1275. for (i = 0; i < vptr->tx.numq; i++) {
  1276. vptr->tx.rings[i] = pool;
  1277. vptr->tx.pool_dma[i] = pool_dma;
  1278. pool += tx_ring_size;
  1279. pool_dma += tx_ring_size;
  1280. }
  1281. return 0;
  1282. }
  1283. static void velocity_set_rxbufsize(struct velocity_info *vptr, int mtu)
  1284. {
  1285. vptr->rx.buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
  1286. }
  1287. /**
  1288. * velocity_alloc_rx_buf - allocate aligned receive buffer
  1289. * @vptr: velocity
  1290. * @idx: ring index
  1291. *
  1292. * Allocate a new full sized buffer for the reception of a frame and
  1293. * map it into PCI space for the hardware to use. The hardware
  1294. * requires *64* byte alignment of the buffer which makes life
  1295. * less fun than would be ideal.
  1296. */
  1297. static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
  1298. {
  1299. struct rx_desc *rd = &(vptr->rx.ring[idx]);
  1300. struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
  1301. rd_info->skb = netdev_alloc_skb(vptr->dev, vptr->rx.buf_sz + 64);
  1302. if (rd_info->skb == NULL)
  1303. return -ENOMEM;
  1304. /*
  1305. * Do the gymnastics to get the buffer head for data at
  1306. * 64byte alignment.
  1307. */
  1308. skb_reserve(rd_info->skb,
  1309. 64 - ((unsigned long) rd_info->skb->data & 63));
  1310. rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data,
  1311. vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
  1312. /*
  1313. * Fill in the descriptor to match
  1314. */
  1315. *((u32 *) & (rd->rdesc0)) = 0;
  1316. rd->size = cpu_to_le16(vptr->rx.buf_sz) | RX_INTEN;
  1317. rd->pa_low = cpu_to_le32(rd_info->skb_dma);
  1318. rd->pa_high = 0;
  1319. return 0;
  1320. }
  1321. static int velocity_rx_refill(struct velocity_info *vptr)
  1322. {
  1323. int dirty = vptr->rx.dirty, done = 0;
  1324. do {
  1325. struct rx_desc *rd = vptr->rx.ring + dirty;
  1326. /* Fine for an all zero Rx desc at init time as well */
  1327. if (rd->rdesc0.len & OWNED_BY_NIC)
  1328. break;
  1329. if (!vptr->rx.info[dirty].skb) {
  1330. if (velocity_alloc_rx_buf(vptr, dirty) < 0)
  1331. break;
  1332. }
  1333. done++;
  1334. dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
  1335. } while (dirty != vptr->rx.curr);
  1336. if (done) {
  1337. vptr->rx.dirty = dirty;
  1338. vptr->rx.filled += done;
  1339. }
  1340. return done;
  1341. }
  1342. /**
  1343. * velocity_free_rd_ring - free receive ring
  1344. * @vptr: velocity to clean up
  1345. *
  1346. * Free the receive buffers for each ring slot and any
  1347. * attached socket buffers that need to go away.
  1348. */
  1349. static void velocity_free_rd_ring(struct velocity_info *vptr)
  1350. {
  1351. int i;
  1352. if (vptr->rx.info == NULL)
  1353. return;
  1354. for (i = 0; i < vptr->options.numrx; i++) {
  1355. struct velocity_rd_info *rd_info = &(vptr->rx.info[i]);
  1356. struct rx_desc *rd = vptr->rx.ring + i;
  1357. memset(rd, 0, sizeof(*rd));
  1358. if (!rd_info->skb)
  1359. continue;
  1360. pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
  1361. PCI_DMA_FROMDEVICE);
  1362. rd_info->skb_dma = 0;
  1363. dev_kfree_skb(rd_info->skb);
  1364. rd_info->skb = NULL;
  1365. }
  1366. kfree(vptr->rx.info);
  1367. vptr->rx.info = NULL;
  1368. }
  1369. /**
  1370. * velocity_init_rd_ring - set up receive ring
  1371. * @vptr: velocity to configure
  1372. *
  1373. * Allocate and set up the receive buffers for each ring slot and
  1374. * assign them to the network adapter.
  1375. */
  1376. static int velocity_init_rd_ring(struct velocity_info *vptr)
  1377. {
  1378. int ret = -ENOMEM;
  1379. vptr->rx.info = kcalloc(vptr->options.numrx,
  1380. sizeof(struct velocity_rd_info), GFP_KERNEL);
  1381. if (!vptr->rx.info)
  1382. goto out;
  1383. velocity_init_rx_ring_indexes(vptr);
  1384. if (velocity_rx_refill(vptr) != vptr->options.numrx) {
  1385. VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
  1386. "%s: failed to allocate RX buffer.\n", vptr->dev->name);
  1387. velocity_free_rd_ring(vptr);
  1388. goto out;
  1389. }
  1390. ret = 0;
  1391. out:
  1392. return ret;
  1393. }
  1394. /**
  1395. * velocity_init_td_ring - set up transmit ring
  1396. * @vptr: velocity
  1397. *
  1398. * Set up the transmit ring and chain the ring pointers together.
  1399. * Returns zero on success or a negative posix errno code for
  1400. * failure.
  1401. */
  1402. static int velocity_init_td_ring(struct velocity_info *vptr)
  1403. {
  1404. int j;
  1405. /* Init the TD ring entries */
  1406. for (j = 0; j < vptr->tx.numq; j++) {
  1407. vptr->tx.infos[j] = kcalloc(vptr->options.numtx,
  1408. sizeof(struct velocity_td_info),
  1409. GFP_KERNEL);
  1410. if (!vptr->tx.infos[j]) {
  1411. while (--j >= 0)
  1412. kfree(vptr->tx.infos[j]);
  1413. return -ENOMEM;
  1414. }
  1415. vptr->tx.tail[j] = vptr->tx.curr[j] = vptr->tx.used[j] = 0;
  1416. }
  1417. return 0;
  1418. }
  1419. /**
  1420. * velocity_free_dma_rings - free PCI ring pointers
  1421. * @vptr: Velocity to free from
  1422. *
  1423. * Clean up the PCI ring buffers allocated to this velocity.
  1424. */
  1425. static void velocity_free_dma_rings(struct velocity_info *vptr)
  1426. {
  1427. const int size = vptr->options.numrx * sizeof(struct rx_desc) +
  1428. vptr->options.numtx * sizeof(struct tx_desc) * vptr->tx.numq;
  1429. pci_free_consistent(vptr->pdev, size, vptr->rx.ring, vptr->rx.pool_dma);
  1430. }
  1431. static int velocity_init_rings(struct velocity_info *vptr, int mtu)
  1432. {
  1433. int ret;
  1434. velocity_set_rxbufsize(vptr, mtu);
  1435. ret = velocity_init_dma_rings(vptr);
  1436. if (ret < 0)
  1437. goto out;
  1438. ret = velocity_init_rd_ring(vptr);
  1439. if (ret < 0)
  1440. goto err_free_dma_rings_0;
  1441. ret = velocity_init_td_ring(vptr);
  1442. if (ret < 0)
  1443. goto err_free_rd_ring_1;
  1444. out:
  1445. return ret;
  1446. err_free_rd_ring_1:
  1447. velocity_free_rd_ring(vptr);
  1448. err_free_dma_rings_0:
  1449. velocity_free_dma_rings(vptr);
  1450. goto out;
  1451. }
  1452. /**
  1453. * velocity_free_tx_buf - free transmit buffer
  1454. * @vptr: velocity
  1455. * @tdinfo: buffer
  1456. *
  1457. * Release an transmit buffer. If the buffer was preallocated then
  1458. * recycle it, if not then unmap the buffer.
  1459. */
  1460. static void velocity_free_tx_buf(struct velocity_info *vptr,
  1461. struct velocity_td_info *tdinfo, struct tx_desc *td)
  1462. {
  1463. struct sk_buff *skb = tdinfo->skb;
  1464. /*
  1465. * Don't unmap the pre-allocated tx_bufs
  1466. */
  1467. if (tdinfo->skb_dma) {
  1468. int i;
  1469. for (i = 0; i < tdinfo->nskb_dma; i++) {
  1470. size_t pktlen = max_t(size_t, skb->len, ETH_ZLEN);
  1471. /* For scatter-gather */
  1472. if (skb_shinfo(skb)->nr_frags > 0)
  1473. pktlen = max_t(size_t, pktlen,
  1474. td->td_buf[i].size & ~TD_QUEUE);
  1475. pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i],
  1476. le16_to_cpu(pktlen), PCI_DMA_TODEVICE);
  1477. }
  1478. }
  1479. dev_kfree_skb_irq(skb);
  1480. tdinfo->skb = NULL;
  1481. }
  1482. /*
  1483. * FIXME: could we merge this with velocity_free_tx_buf ?
  1484. */
  1485. static void velocity_free_td_ring_entry(struct velocity_info *vptr,
  1486. int q, int n)
  1487. {
  1488. struct velocity_td_info *td_info = &(vptr->tx.infos[q][n]);
  1489. int i;
  1490. if (td_info == NULL)
  1491. return;
  1492. if (td_info->skb) {
  1493. for (i = 0; i < td_info->nskb_dma; i++) {
  1494. if (td_info->skb_dma[i]) {
  1495. pci_unmap_single(vptr->pdev, td_info->skb_dma[i],
  1496. td_info->skb->len, PCI_DMA_TODEVICE);
  1497. td_info->skb_dma[i] = 0;
  1498. }
  1499. }
  1500. dev_kfree_skb(td_info->skb);
  1501. td_info->skb = NULL;
  1502. }
  1503. }
  1504. /**
  1505. * velocity_free_td_ring - free td ring
  1506. * @vptr: velocity
  1507. *
  1508. * Free up the transmit ring for this particular velocity adapter.
  1509. * We free the ring contents but not the ring itself.
  1510. */
  1511. static void velocity_free_td_ring(struct velocity_info *vptr)
  1512. {
  1513. int i, j;
  1514. for (j = 0; j < vptr->tx.numq; j++) {
  1515. if (vptr->tx.infos[j] == NULL)
  1516. continue;
  1517. for (i = 0; i < vptr->options.numtx; i++)
  1518. velocity_free_td_ring_entry(vptr, j, i);
  1519. kfree(vptr->tx.infos[j]);
  1520. vptr->tx.infos[j] = NULL;
  1521. }
  1522. }
  1523. static void velocity_free_rings(struct velocity_info *vptr)
  1524. {
  1525. velocity_free_td_ring(vptr);
  1526. velocity_free_rd_ring(vptr);
  1527. velocity_free_dma_rings(vptr);
  1528. }
  1529. /**
  1530. * velocity_error - handle error from controller
  1531. * @vptr: velocity
  1532. * @status: card status
  1533. *
  1534. * Process an error report from the hardware and attempt to recover
  1535. * the card itself. At the moment we cannot recover from some
  1536. * theoretically impossible errors but this could be fixed using
  1537. * the pci_device_failed logic to bounce the hardware
  1538. *
  1539. */
  1540. static void velocity_error(struct velocity_info *vptr, int status)
  1541. {
  1542. if (status & ISR_TXSTLI) {
  1543. struct mac_regs __iomem *regs = vptr->mac_regs;
  1544. printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
  1545. BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
  1546. writew(TRDCSR_RUN, &regs->TDCSRClr);
  1547. netif_stop_queue(vptr->dev);
  1548. /* FIXME: port over the pci_device_failed code and use it
  1549. here */
  1550. }
  1551. if (status & ISR_SRCI) {
  1552. struct mac_regs __iomem *regs = vptr->mac_regs;
  1553. int linked;
  1554. if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
  1555. vptr->mii_status = check_connection_type(regs);
  1556. /*
  1557. * If it is a 3119, disable frame bursting in
  1558. * halfduplex mode and enable it in fullduplex
  1559. * mode
  1560. */
  1561. if (vptr->rev_id < REV_ID_VT3216_A0) {
  1562. if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
  1563. BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
  1564. else
  1565. BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
  1566. }
  1567. /*
  1568. * Only enable CD heart beat counter in 10HD mode
  1569. */
  1570. if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10))
  1571. BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
  1572. else
  1573. BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
  1574. setup_queue_timers(vptr);
  1575. }
  1576. /*
  1577. * Get link status from PHYSR0
  1578. */
  1579. linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
  1580. if (linked) {
  1581. vptr->mii_status &= ~VELOCITY_LINK_FAIL;
  1582. netif_carrier_on(vptr->dev);
  1583. } else {
  1584. vptr->mii_status |= VELOCITY_LINK_FAIL;
  1585. netif_carrier_off(vptr->dev);
  1586. }
  1587. velocity_print_link_status(vptr);
  1588. enable_flow_control_ability(vptr);
  1589. /*
  1590. * Re-enable auto-polling because SRCI will disable
  1591. * auto-polling
  1592. */
  1593. enable_mii_autopoll(regs);
  1594. if (vptr->mii_status & VELOCITY_LINK_FAIL)
  1595. netif_stop_queue(vptr->dev);
  1596. else
  1597. netif_wake_queue(vptr->dev);
  1598. }
  1599. if (status & ISR_MIBFI)
  1600. velocity_update_hw_mibs(vptr);
  1601. if (status & ISR_LSTEI)
  1602. mac_rx_queue_wake(vptr->mac_regs);
  1603. }
  1604. /**
  1605. * tx_srv - transmit interrupt service
  1606. * @vptr; Velocity
  1607. *
  1608. * Scan the queues looking for transmitted packets that
  1609. * we can complete and clean up. Update any statistics as
  1610. * necessary/
  1611. */
  1612. static int velocity_tx_srv(struct velocity_info *vptr)
  1613. {
  1614. struct tx_desc *td;
  1615. int qnum;
  1616. int full = 0;
  1617. int idx;
  1618. int works = 0;
  1619. struct velocity_td_info *tdinfo;
  1620. struct net_device_stats *stats = &vptr->dev->stats;
  1621. for (qnum = 0; qnum < vptr->tx.numq; qnum++) {
  1622. for (idx = vptr->tx.tail[qnum]; vptr->tx.used[qnum] > 0;
  1623. idx = (idx + 1) % vptr->options.numtx) {
  1624. /*
  1625. * Get Tx Descriptor
  1626. */
  1627. td = &(vptr->tx.rings[qnum][idx]);
  1628. tdinfo = &(vptr->tx.infos[qnum][idx]);
  1629. if (td->tdesc0.len & OWNED_BY_NIC)
  1630. break;
  1631. if ((works++ > 15))
  1632. break;
  1633. if (td->tdesc0.TSR & TSR0_TERR) {
  1634. stats->tx_errors++;
  1635. stats->tx_dropped++;
  1636. if (td->tdesc0.TSR & TSR0_CDH)
  1637. stats->tx_heartbeat_errors++;
  1638. if (td->tdesc0.TSR & TSR0_CRS)
  1639. stats->tx_carrier_errors++;
  1640. if (td->tdesc0.TSR & TSR0_ABT)
  1641. stats->tx_aborted_errors++;
  1642. if (td->tdesc0.TSR & TSR0_OWC)
  1643. stats->tx_window_errors++;
  1644. } else {
  1645. stats->tx_packets++;
  1646. stats->tx_bytes += tdinfo->skb->len;
  1647. }
  1648. velocity_free_tx_buf(vptr, tdinfo, td);
  1649. vptr->tx.used[qnum]--;
  1650. }
  1651. vptr->tx.tail[qnum] = idx;
  1652. if (AVAIL_TD(vptr, qnum) < 1)
  1653. full = 1;
  1654. }
  1655. /*
  1656. * Look to see if we should kick the transmit network
  1657. * layer for more work.
  1658. */
  1659. if (netif_queue_stopped(vptr->dev) && (full == 0) &&
  1660. (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
  1661. netif_wake_queue(vptr->dev);
  1662. }
  1663. return works;
  1664. }
  1665. /**
  1666. * velocity_rx_csum - checksum process
  1667. * @rd: receive packet descriptor
  1668. * @skb: network layer packet buffer
  1669. *
  1670. * Process the status bits for the received packet and determine
  1671. * if the checksum was computed and verified by the hardware
  1672. */
  1673. static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
  1674. {
  1675. skb_checksum_none_assert(skb);
  1676. if (rd->rdesc1.CSM & CSM_IPKT) {
  1677. if (rd->rdesc1.CSM & CSM_IPOK) {
  1678. if ((rd->rdesc1.CSM & CSM_TCPKT) ||
  1679. (rd->rdesc1.CSM & CSM_UDPKT)) {
  1680. if (!(rd->rdesc1.CSM & CSM_TUPOK))
  1681. return;
  1682. }
  1683. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1684. }
  1685. }
  1686. }
  1687. /**
  1688. * velocity_rx_copy - in place Rx copy for small packets
  1689. * @rx_skb: network layer packet buffer candidate
  1690. * @pkt_size: received data size
  1691. * @rd: receive packet descriptor
  1692. * @dev: network device
  1693. *
  1694. * Replace the current skb that is scheduled for Rx processing by a
  1695. * shorter, immediately allocated skb, if the received packet is small
  1696. * enough. This function returns a negative value if the received
  1697. * packet is too big or if memory is exhausted.
  1698. */
  1699. static int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
  1700. struct velocity_info *vptr)
  1701. {
  1702. int ret = -1;
  1703. if (pkt_size < rx_copybreak) {
  1704. struct sk_buff *new_skb;
  1705. new_skb = netdev_alloc_skb_ip_align(vptr->dev, pkt_size);
  1706. if (new_skb) {
  1707. new_skb->ip_summed = rx_skb[0]->ip_summed;
  1708. skb_copy_from_linear_data(*rx_skb, new_skb->data, pkt_size);
  1709. *rx_skb = new_skb;
  1710. ret = 0;
  1711. }
  1712. }
  1713. return ret;
  1714. }
  1715. /**
  1716. * velocity_iph_realign - IP header alignment
  1717. * @vptr: velocity we are handling
  1718. * @skb: network layer packet buffer
  1719. * @pkt_size: received data size
  1720. *
  1721. * Align IP header on a 2 bytes boundary. This behavior can be
  1722. * configured by the user.
  1723. */
  1724. static inline void velocity_iph_realign(struct velocity_info *vptr,
  1725. struct sk_buff *skb, int pkt_size)
  1726. {
  1727. if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
  1728. memmove(skb->data + 2, skb->data, pkt_size);
  1729. skb_reserve(skb, 2);
  1730. }
  1731. }
  1732. /**
  1733. * velocity_receive_frame - received packet processor
  1734. * @vptr: velocity we are handling
  1735. * @idx: ring index
  1736. *
  1737. * A packet has arrived. We process the packet and if appropriate
  1738. * pass the frame up the network stack
  1739. */
  1740. static int velocity_receive_frame(struct velocity_info *vptr, int idx)
  1741. {
  1742. void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
  1743. struct net_device_stats *stats = &vptr->dev->stats;
  1744. struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
  1745. struct rx_desc *rd = &(vptr->rx.ring[idx]);
  1746. int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
  1747. struct sk_buff *skb;
  1748. if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) {
  1749. VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name);
  1750. stats->rx_length_errors++;
  1751. return -EINVAL;
  1752. }
  1753. if (rd->rdesc0.RSR & RSR_MAR)
  1754. stats->multicast++;
  1755. skb = rd_info->skb;
  1756. pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
  1757. vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
  1758. /*
  1759. * Drop frame not meeting IEEE 802.3
  1760. */
  1761. if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) {
  1762. if (rd->rdesc0.RSR & RSR_RL) {
  1763. stats->rx_length_errors++;
  1764. return -EINVAL;
  1765. }
  1766. }
  1767. pci_action = pci_dma_sync_single_for_device;
  1768. velocity_rx_csum(rd, skb);
  1769. if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
  1770. velocity_iph_realign(vptr, skb, pkt_len);
  1771. pci_action = pci_unmap_single;
  1772. rd_info->skb = NULL;
  1773. }
  1774. pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
  1775. PCI_DMA_FROMDEVICE);
  1776. skb_put(skb, pkt_len - 4);
  1777. skb->protocol = eth_type_trans(skb, vptr->dev);
  1778. if (rd->rdesc0.RSR & RSR_DETAG) {
  1779. u16 vid = swab16(le16_to_cpu(rd->rdesc1.PQTAG));
  1780. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
  1781. }
  1782. netif_rx(skb);
  1783. stats->rx_bytes += pkt_len;
  1784. stats->rx_packets++;
  1785. return 0;
  1786. }
  1787. /**
  1788. * velocity_rx_srv - service RX interrupt
  1789. * @vptr: velocity
  1790. *
  1791. * Walk the receive ring of the velocity adapter and remove
  1792. * any received packets from the receive queue. Hand the ring
  1793. * slots back to the adapter for reuse.
  1794. */
  1795. static int velocity_rx_srv(struct velocity_info *vptr, int budget_left)
  1796. {
  1797. struct net_device_stats *stats = &vptr->dev->stats;
  1798. int rd_curr = vptr->rx.curr;
  1799. int works = 0;
  1800. while (works < budget_left) {
  1801. struct rx_desc *rd = vptr->rx.ring + rd_curr;
  1802. if (!vptr->rx.info[rd_curr].skb)
  1803. break;
  1804. if (rd->rdesc0.len & OWNED_BY_NIC)
  1805. break;
  1806. rmb();
  1807. /*
  1808. * Don't drop CE or RL error frame although RXOK is off
  1809. */
  1810. if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) {
  1811. if (velocity_receive_frame(vptr, rd_curr) < 0)
  1812. stats->rx_dropped++;
  1813. } else {
  1814. if (rd->rdesc0.RSR & RSR_CRC)
  1815. stats->rx_crc_errors++;
  1816. if (rd->rdesc0.RSR & RSR_FAE)
  1817. stats->rx_frame_errors++;
  1818. stats->rx_dropped++;
  1819. }
  1820. rd->size |= RX_INTEN;
  1821. rd_curr++;
  1822. if (rd_curr >= vptr->options.numrx)
  1823. rd_curr = 0;
  1824. works++;
  1825. }
  1826. vptr->rx.curr = rd_curr;
  1827. if ((works > 0) && (velocity_rx_refill(vptr) > 0))
  1828. velocity_give_many_rx_descs(vptr);
  1829. VAR_USED(stats);
  1830. return works;
  1831. }
  1832. static int velocity_poll(struct napi_struct *napi, int budget)
  1833. {
  1834. struct velocity_info *vptr = container_of(napi,
  1835. struct velocity_info, napi);
  1836. unsigned int rx_done;
  1837. unsigned long flags;
  1838. spin_lock_irqsave(&vptr->lock, flags);
  1839. /*
  1840. * Do rx and tx twice for performance (taken from the VIA
  1841. * out-of-tree driver).
  1842. */
  1843. rx_done = velocity_rx_srv(vptr, budget / 2);
  1844. velocity_tx_srv(vptr);
  1845. rx_done += velocity_rx_srv(vptr, budget - rx_done);
  1846. velocity_tx_srv(vptr);
  1847. /* If budget not fully consumed, exit the polling mode */
  1848. if (rx_done < budget) {
  1849. napi_complete(napi);
  1850. mac_enable_int(vptr->mac_regs);
  1851. }
  1852. spin_unlock_irqrestore(&vptr->lock, flags);
  1853. return rx_done;
  1854. }
  1855. /**
  1856. * velocity_intr - interrupt callback
  1857. * @irq: interrupt number
  1858. * @dev_instance: interrupting device
  1859. *
  1860. * Called whenever an interrupt is generated by the velocity
  1861. * adapter IRQ line. We may not be the source of the interrupt
  1862. * and need to identify initially if we are, and if not exit as
  1863. * efficiently as possible.
  1864. */
  1865. static irqreturn_t velocity_intr(int irq, void *dev_instance)
  1866. {
  1867. struct net_device *dev = dev_instance;
  1868. struct velocity_info *vptr = netdev_priv(dev);
  1869. u32 isr_status;
  1870. spin_lock(&vptr->lock);
  1871. isr_status = mac_read_isr(vptr->mac_regs);
  1872. /* Not us ? */
  1873. if (isr_status == 0) {
  1874. spin_unlock(&vptr->lock);
  1875. return IRQ_NONE;
  1876. }
  1877. /* Ack the interrupt */
  1878. mac_write_isr(vptr->mac_regs, isr_status);
  1879. if (likely(napi_schedule_prep(&vptr->napi))) {
  1880. mac_disable_int(vptr->mac_regs);
  1881. __napi_schedule(&vptr->napi);
  1882. }
  1883. if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
  1884. velocity_error(vptr, isr_status);
  1885. spin_unlock(&vptr->lock);
  1886. return IRQ_HANDLED;
  1887. }
  1888. /**
  1889. * velocity_open - interface activation callback
  1890. * @dev: network layer device to open
  1891. *
  1892. * Called when the network layer brings the interface up. Returns
  1893. * a negative posix error code on failure, or zero on success.
  1894. *
  1895. * All the ring allocation and set up is done on open for this
  1896. * adapter to minimise memory usage when inactive
  1897. */
  1898. static int velocity_open(struct net_device *dev)
  1899. {
  1900. struct velocity_info *vptr = netdev_priv(dev);
  1901. int ret;
  1902. ret = velocity_init_rings(vptr, dev->mtu);
  1903. if (ret < 0)
  1904. goto out;
  1905. /* Ensure chip is running */
  1906. pci_set_power_state(vptr->pdev, PCI_D0);
  1907. velocity_init_registers(vptr, VELOCITY_INIT_COLD);
  1908. ret = request_irq(vptr->pdev->irq, velocity_intr, IRQF_SHARED,
  1909. dev->name, dev);
  1910. if (ret < 0) {
  1911. /* Power down the chip */
  1912. pci_set_power_state(vptr->pdev, PCI_D3hot);
  1913. velocity_free_rings(vptr);
  1914. goto out;
  1915. }
  1916. velocity_give_many_rx_descs(vptr);
  1917. mac_enable_int(vptr->mac_regs);
  1918. netif_start_queue(dev);
  1919. napi_enable(&vptr->napi);
  1920. vptr->flags |= VELOCITY_FLAGS_OPENED;
  1921. out:
  1922. return ret;
  1923. }
  1924. /**
  1925. * velocity_shutdown - shut down the chip
  1926. * @vptr: velocity to deactivate
  1927. *
  1928. * Shuts down the internal operations of the velocity and
  1929. * disables interrupts, autopolling, transmit and receive
  1930. */
  1931. static void velocity_shutdown(struct velocity_info *vptr)
  1932. {
  1933. struct mac_regs __iomem *regs = vptr->mac_regs;
  1934. mac_disable_int(regs);
  1935. writel(CR0_STOP, &regs->CR0Set);
  1936. writew(0xFFFF, &regs->TDCSRClr);
  1937. writeb(0xFF, &regs->RDCSRClr);
  1938. safe_disable_mii_autopoll(regs);
  1939. mac_clear_isr(regs);
  1940. }
  1941. /**
  1942. * velocity_change_mtu - MTU change callback
  1943. * @dev: network device
  1944. * @new_mtu: desired MTU
  1945. *
  1946. * Handle requests from the networking layer for MTU change on
  1947. * this interface. It gets called on a change by the network layer.
  1948. * Return zero for success or negative posix error code.
  1949. */
  1950. static int velocity_change_mtu(struct net_device *dev, int new_mtu)
  1951. {
  1952. struct velocity_info *vptr = netdev_priv(dev);
  1953. int ret = 0;
  1954. if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
  1955. VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
  1956. vptr->dev->name);
  1957. ret = -EINVAL;
  1958. goto out_0;
  1959. }
  1960. if (!netif_running(dev)) {
  1961. dev->mtu = new_mtu;
  1962. goto out_0;
  1963. }
  1964. if (dev->mtu != new_mtu) {
  1965. struct velocity_info *tmp_vptr;
  1966. unsigned long flags;
  1967. struct rx_info rx;
  1968. struct tx_info tx;
  1969. tmp_vptr = kzalloc(sizeof(*tmp_vptr), GFP_KERNEL);
  1970. if (!tmp_vptr) {
  1971. ret = -ENOMEM;
  1972. goto out_0;
  1973. }
  1974. tmp_vptr->dev = dev;
  1975. tmp_vptr->pdev = vptr->pdev;
  1976. tmp_vptr->options = vptr->options;
  1977. tmp_vptr->tx.numq = vptr->tx.numq;
  1978. ret = velocity_init_rings(tmp_vptr, new_mtu);
  1979. if (ret < 0)
  1980. goto out_free_tmp_vptr_1;
  1981. spin_lock_irqsave(&vptr->lock, flags);
  1982. netif_stop_queue(dev);
  1983. velocity_shutdown(vptr);
  1984. rx = vptr->rx;
  1985. tx = vptr->tx;
  1986. vptr->rx = tmp_vptr->rx;
  1987. vptr->tx = tmp_vptr->tx;
  1988. tmp_vptr->rx = rx;
  1989. tmp_vptr->tx = tx;
  1990. dev->mtu = new_mtu;
  1991. velocity_init_registers(vptr, VELOCITY_INIT_COLD);
  1992. velocity_give_many_rx_descs(vptr);
  1993. mac_enable_int(vptr->mac_regs);
  1994. netif_start_queue(dev);
  1995. spin_unlock_irqrestore(&vptr->lock, flags);
  1996. velocity_free_rings(tmp_vptr);
  1997. out_free_tmp_vptr_1:
  1998. kfree(tmp_vptr);
  1999. }
  2000. out_0:
  2001. return ret;
  2002. }
  2003. /**
  2004. * velocity_mii_ioctl - MII ioctl handler
  2005. * @dev: network device
  2006. * @ifr: the ifreq block for the ioctl
  2007. * @cmd: the command
  2008. *
  2009. * Process MII requests made via ioctl from the network layer. These
  2010. * are used by tools like kudzu to interrogate the link state of the
  2011. * hardware
  2012. */
  2013. static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  2014. {
  2015. struct velocity_info *vptr = netdev_priv(dev);
  2016. struct mac_regs __iomem *regs = vptr->mac_regs;
  2017. unsigned long flags;
  2018. struct mii_ioctl_data *miidata = if_mii(ifr);
  2019. int err;
  2020. switch (cmd) {
  2021. case SIOCGMIIPHY:
  2022. miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
  2023. break;
  2024. case SIOCGMIIREG:
  2025. if (velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
  2026. return -ETIMEDOUT;
  2027. break;
  2028. case SIOCSMIIREG:
  2029. spin_lock_irqsave(&vptr->lock, flags);
  2030. err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
  2031. spin_unlock_irqrestore(&vptr->lock, flags);
  2032. check_connection_type(vptr->mac_regs);
  2033. if (err)
  2034. return err;
  2035. break;
  2036. default:
  2037. return -EOPNOTSUPP;
  2038. }
  2039. return 0;
  2040. }
  2041. /**
  2042. * velocity_ioctl - ioctl entry point
  2043. * @dev: network device
  2044. * @rq: interface request ioctl
  2045. * @cmd: command code
  2046. *
  2047. * Called when the user issues an ioctl request to the network
  2048. * device in question. The velocity interface supports MII.
  2049. */
  2050. static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  2051. {
  2052. struct velocity_info *vptr = netdev_priv(dev);
  2053. int ret;
  2054. /* If we are asked for information and the device is power
  2055. saving then we need to bring the device back up to talk to it */
  2056. if (!netif_running(dev))
  2057. pci_set_power_state(vptr->pdev, PCI_D0);
  2058. switch (cmd) {
  2059. case SIOCGMIIPHY: /* Get address of MII PHY in use. */
  2060. case SIOCGMIIREG: /* Read MII PHY register. */
  2061. case SIOCSMIIREG: /* Write to MII PHY register. */
  2062. ret = velocity_mii_ioctl(dev, rq, cmd);
  2063. break;
  2064. default:
  2065. ret = -EOPNOTSUPP;
  2066. }
  2067. if (!netif_running(dev))
  2068. pci_set_power_state(vptr->pdev, PCI_D3hot);
  2069. return ret;
  2070. }
  2071. /**
  2072. * velocity_get_status - statistics callback
  2073. * @dev: network device
  2074. *
  2075. * Callback from the network layer to allow driver statistics
  2076. * to be resynchronized with hardware collected state. In the
  2077. * case of the velocity we need to pull the MIB counters from
  2078. * the hardware into the counters before letting the network
  2079. * layer display them.
  2080. */
  2081. static struct net_device_stats *velocity_get_stats(struct net_device *dev)
  2082. {
  2083. struct velocity_info *vptr = netdev_priv(dev);
  2084. /* If the hardware is down, don't touch MII */
  2085. if (!netif_running(dev))
  2086. return &dev->stats;
  2087. spin_lock_irq(&vptr->lock);
  2088. velocity_update_hw_mibs(vptr);
  2089. spin_unlock_irq(&vptr->lock);
  2090. dev->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
  2091. dev->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
  2092. dev->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
  2093. // unsigned long rx_dropped; /* no space in linux buffers */
  2094. dev->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
  2095. /* detailed rx_errors: */
  2096. // unsigned long rx_length_errors;
  2097. // unsigned long rx_over_errors; /* receiver ring buff overflow */
  2098. dev->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
  2099. // unsigned long rx_frame_errors; /* recv'd frame alignment error */
  2100. // unsigned long rx_fifo_errors; /* recv'r fifo overrun */
  2101. // unsigned long rx_missed_errors; /* receiver missed packet */
  2102. /* detailed tx_errors */
  2103. // unsigned long tx_fifo_errors;
  2104. return &dev->stats;
  2105. }
  2106. /**
  2107. * velocity_close - close adapter callback
  2108. * @dev: network device
  2109. *
  2110. * Callback from the network layer when the velocity is being
  2111. * deactivated by the network layer
  2112. */
  2113. static int velocity_close(struct net_device *dev)
  2114. {
  2115. struct velocity_info *vptr = netdev_priv(dev);
  2116. napi_disable(&vptr->napi);
  2117. netif_stop_queue(dev);
  2118. velocity_shutdown(vptr);
  2119. if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
  2120. velocity_get_ip(vptr);
  2121. free_irq(vptr->pdev->irq, dev);
  2122. velocity_free_rings(vptr);
  2123. vptr->flags &= (~VELOCITY_FLAGS_OPENED);
  2124. return 0;
  2125. }
  2126. /**
  2127. * velocity_xmit - transmit packet callback
  2128. * @skb: buffer to transmit
  2129. * @dev: network device
  2130. *
  2131. * Called by the networ layer to request a packet is queued to
  2132. * the velocity. Returns zero on success.
  2133. */
  2134. static netdev_tx_t velocity_xmit(struct sk_buff *skb,
  2135. struct net_device *dev)
  2136. {
  2137. struct velocity_info *vptr = netdev_priv(dev);
  2138. int qnum = 0;
  2139. struct tx_desc *td_ptr;
  2140. struct velocity_td_info *tdinfo;
  2141. unsigned long flags;
  2142. int pktlen;
  2143. int index, prev;
  2144. int i = 0;
  2145. if (skb_padto(skb, ETH_ZLEN))
  2146. goto out;
  2147. /* The hardware can handle at most 7 memory segments, so merge
  2148. * the skb if there are more */
  2149. if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) {
  2150. kfree_skb(skb);
  2151. return NETDEV_TX_OK;
  2152. }
  2153. pktlen = skb_shinfo(skb)->nr_frags == 0 ?
  2154. max_t(unsigned int, skb->len, ETH_ZLEN) :
  2155. skb_headlen(skb);
  2156. spin_lock_irqsave(&vptr->lock, flags);
  2157. index = vptr->tx.curr[qnum];
  2158. td_ptr = &(vptr->tx.rings[qnum][index]);
  2159. tdinfo = &(vptr->tx.infos[qnum][index]);
  2160. td_ptr->tdesc1.TCR = TCR0_TIC;
  2161. td_ptr->td_buf[0].size &= ~TD_QUEUE;
  2162. /*
  2163. * Map the linear network buffer into PCI space and
  2164. * add it to the transmit ring.
  2165. */
  2166. tdinfo->skb = skb;
  2167. tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE);
  2168. td_ptr->tdesc0.len = cpu_to_le16(pktlen);
  2169. td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
  2170. td_ptr->td_buf[0].pa_high = 0;
  2171. td_ptr->td_buf[0].size = cpu_to_le16(pktlen);
  2172. /* Handle fragments */
  2173. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  2174. const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
  2175. tdinfo->skb_dma[i + 1] = skb_frag_dma_map(&vptr->pdev->dev,
  2176. frag, 0,
  2177. skb_frag_size(frag),
  2178. DMA_TO_DEVICE);
  2179. td_ptr->td_buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]);
  2180. td_ptr->td_buf[i + 1].pa_high = 0;
  2181. td_ptr->td_buf[i + 1].size = cpu_to_le16(skb_frag_size(frag));
  2182. }
  2183. tdinfo->nskb_dma = i + 1;
  2184. td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16;
  2185. if (vlan_tx_tag_present(skb)) {
  2186. td_ptr->tdesc1.vlan = cpu_to_le16(vlan_tx_tag_get(skb));
  2187. td_ptr->tdesc1.TCR |= TCR0_VETAG;
  2188. }
  2189. /*
  2190. * Handle hardware checksum
  2191. */
  2192. if (skb->ip_summed == CHECKSUM_PARTIAL) {
  2193. const struct iphdr *ip = ip_hdr(skb);
  2194. if (ip->protocol == IPPROTO_TCP)
  2195. td_ptr->tdesc1.TCR |= TCR0_TCPCK;
  2196. else if (ip->protocol == IPPROTO_UDP)
  2197. td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
  2198. td_ptr->tdesc1.TCR |= TCR0_IPCK;
  2199. }
  2200. prev = index - 1;
  2201. if (prev < 0)
  2202. prev = vptr->options.numtx - 1;
  2203. td_ptr->tdesc0.len |= OWNED_BY_NIC;
  2204. vptr->tx.used[qnum]++;
  2205. vptr->tx.curr[qnum] = (index + 1) % vptr->options.numtx;
  2206. if (AVAIL_TD(vptr, qnum) < 1)
  2207. netif_stop_queue(dev);
  2208. td_ptr = &(vptr->tx.rings[qnum][prev]);
  2209. td_ptr->td_buf[0].size |= TD_QUEUE;
  2210. mac_tx_queue_wake(vptr->mac_regs, qnum);
  2211. spin_unlock_irqrestore(&vptr->lock, flags);
  2212. out:
  2213. return NETDEV_TX_OK;
  2214. }
  2215. static const struct net_device_ops velocity_netdev_ops = {
  2216. .ndo_open = velocity_open,
  2217. .ndo_stop = velocity_close,
  2218. .ndo_start_xmit = velocity_xmit,
  2219. .ndo_get_stats = velocity_get_stats,
  2220. .ndo_validate_addr = eth_validate_addr,
  2221. .ndo_set_mac_address = eth_mac_addr,
  2222. .ndo_set_rx_mode = velocity_set_multi,
  2223. .ndo_change_mtu = velocity_change_mtu,
  2224. .ndo_do_ioctl = velocity_ioctl,
  2225. .ndo_vlan_rx_add_vid = velocity_vlan_rx_add_vid,
  2226. .ndo_vlan_rx_kill_vid = velocity_vlan_rx_kill_vid,
  2227. };
  2228. /**
  2229. * velocity_init_info - init private data
  2230. * @pdev: PCI device
  2231. * @vptr: Velocity info
  2232. * @info: Board type
  2233. *
  2234. * Set up the initial velocity_info struct for the device that has been
  2235. * discovered.
  2236. */
  2237. static void velocity_init_info(struct pci_dev *pdev, struct velocity_info *vptr,
  2238. const struct velocity_info_tbl *info)
  2239. {
  2240. memset(vptr, 0, sizeof(struct velocity_info));
  2241. vptr->pdev = pdev;
  2242. vptr->chip_id = info->chip_id;
  2243. vptr->tx.numq = info->txqueue;
  2244. vptr->multicast_limit = MCAM_SIZE;
  2245. spin_lock_init(&vptr->lock);
  2246. }
  2247. /**
  2248. * velocity_get_pci_info - retrieve PCI info for device
  2249. * @vptr: velocity device
  2250. * @pdev: PCI device it matches
  2251. *
  2252. * Retrieve the PCI configuration space data that interests us from
  2253. * the kernel PCI layer
  2254. */
  2255. static int velocity_get_pci_info(struct velocity_info *vptr,
  2256. struct pci_dev *pdev)
  2257. {
  2258. vptr->rev_id = pdev->revision;
  2259. pci_set_master(pdev);
  2260. vptr->ioaddr = pci_resource_start(pdev, 0);
  2261. vptr->memaddr = pci_resource_start(pdev, 1);
  2262. if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
  2263. dev_err(&pdev->dev,
  2264. "region #0 is not an I/O resource, aborting.\n");
  2265. return -EINVAL;
  2266. }
  2267. if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
  2268. dev_err(&pdev->dev,
  2269. "region #1 is an I/O resource, aborting.\n");
  2270. return -EINVAL;
  2271. }
  2272. if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
  2273. dev_err(&pdev->dev, "region #1 is too small.\n");
  2274. return -EINVAL;
  2275. }
  2276. vptr->pdev = pdev;
  2277. return 0;
  2278. }
  2279. /**
  2280. * velocity_print_info - per driver data
  2281. * @vptr: velocity
  2282. *
  2283. * Print per driver data as the kernel driver finds Velocity
  2284. * hardware
  2285. */
  2286. static void velocity_print_info(struct velocity_info *vptr)
  2287. {
  2288. struct net_device *dev = vptr->dev;
  2289. printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
  2290. printk(KERN_INFO "%s: Ethernet Address: %pM\n",
  2291. dev->name, dev->dev_addr);
  2292. }
  2293. static u32 velocity_get_link(struct net_device *dev)
  2294. {
  2295. struct velocity_info *vptr = netdev_priv(dev);
  2296. struct mac_regs __iomem *regs = vptr->mac_regs;
  2297. return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
  2298. }
  2299. /**
  2300. * velocity_found1 - set up discovered velocity card
  2301. * @pdev: PCI device
  2302. * @ent: PCI device table entry that matched
  2303. *
  2304. * Configure a discovered adapter from scratch. Return a negative
  2305. * errno error code on failure paths.
  2306. */
  2307. static int velocity_found1(struct pci_dev *pdev,
  2308. const struct pci_device_id *ent)
  2309. {
  2310. static int first = 1;
  2311. struct net_device *dev;
  2312. int i;
  2313. const char *drv_string;
  2314. const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data];
  2315. struct velocity_info *vptr;
  2316. struct mac_regs __iomem *regs;
  2317. int ret = -ENOMEM;
  2318. /* FIXME: this driver, like almost all other ethernet drivers,
  2319. * can support more than MAX_UNITS.
  2320. */
  2321. if (velocity_nics >= MAX_UNITS) {
  2322. dev_notice(&pdev->dev, "already found %d NICs.\n",
  2323. velocity_nics);
  2324. return -ENODEV;
  2325. }
  2326. dev = alloc_etherdev(sizeof(struct velocity_info));
  2327. if (!dev)
  2328. goto out;
  2329. /* Chain it all together */
  2330. SET_NETDEV_DEV(dev, &pdev->dev);
  2331. vptr = netdev_priv(dev);
  2332. if (first) {
  2333. printk(KERN_INFO "%s Ver. %s\n",
  2334. VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
  2335. printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
  2336. printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
  2337. first = 0;
  2338. }
  2339. velocity_init_info(pdev, vptr, info);
  2340. vptr->dev = dev;
  2341. ret = pci_enable_device(pdev);
  2342. if (ret < 0)
  2343. goto err_free_dev;
  2344. ret = velocity_get_pci_info(vptr, pdev);
  2345. if (ret < 0) {
  2346. /* error message already printed */
  2347. goto err_disable;
  2348. }
  2349. ret = pci_request_regions(pdev, VELOCITY_NAME);
  2350. if (ret < 0) {
  2351. dev_err(&pdev->dev, "No PCI resources.\n");
  2352. goto err_disable;
  2353. }
  2354. regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
  2355. if (regs == NULL) {
  2356. ret = -EIO;
  2357. goto err_release_res;
  2358. }
  2359. vptr->mac_regs = regs;
  2360. mac_wol_reset(regs);
  2361. for (i = 0; i < 6; i++)
  2362. dev->dev_addr[i] = readb(&regs->PAR[i]);
  2363. drv_string = dev_driver_string(&pdev->dev);
  2364. velocity_get_options(&vptr->options, velocity_nics, drv_string);
  2365. /*
  2366. * Mask out the options cannot be set to the chip
  2367. */
  2368. vptr->options.flags &= info->flags;
  2369. /*
  2370. * Enable the chip specified capbilities
  2371. */
  2372. vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
  2373. vptr->wol_opts = vptr->options.wol_opts;
  2374. vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
  2375. vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
  2376. dev->netdev_ops = &velocity_netdev_ops;
  2377. dev->ethtool_ops = &velocity_ethtool_ops;
  2378. netif_napi_add(dev, &vptr->napi, velocity_poll, VELOCITY_NAPI_WEIGHT);
  2379. dev->hw_features = NETIF_F_IP_CSUM | NETIF_F_SG |
  2380. NETIF_F_HW_VLAN_CTAG_TX;
  2381. dev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_FILTER |
  2382. NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_IP_CSUM;
  2383. ret = register_netdev(dev);
  2384. if (ret < 0)
  2385. goto err_iounmap;
  2386. if (!velocity_get_link(dev)) {
  2387. netif_carrier_off(dev);
  2388. vptr->mii_status |= VELOCITY_LINK_FAIL;
  2389. }
  2390. velocity_print_info(vptr);
  2391. pci_set_drvdata(pdev, dev);
  2392. /* and leave the chip powered down */
  2393. pci_set_power_state(pdev, PCI_D3hot);
  2394. velocity_nics++;
  2395. out:
  2396. return ret;
  2397. err_iounmap:
  2398. iounmap(regs);
  2399. err_release_res:
  2400. pci_release_regions(pdev);
  2401. err_disable:
  2402. pci_disable_device(pdev);
  2403. err_free_dev:
  2404. free_netdev(dev);
  2405. goto out;
  2406. }
  2407. #ifdef CONFIG_PM
  2408. /**
  2409. * wol_calc_crc - WOL CRC
  2410. * @pattern: data pattern
  2411. * @mask_pattern: mask
  2412. *
  2413. * Compute the wake on lan crc hashes for the packet header
  2414. * we are interested in.
  2415. */
  2416. static u16 wol_calc_crc(int size, u8 *pattern, u8 *mask_pattern)
  2417. {
  2418. u16 crc = 0xFFFF;
  2419. u8 mask;
  2420. int i, j;
  2421. for (i = 0; i < size; i++) {
  2422. mask = mask_pattern[i];
  2423. /* Skip this loop if the mask equals to zero */
  2424. if (mask == 0x00)
  2425. continue;
  2426. for (j = 0; j < 8; j++) {
  2427. if ((mask & 0x01) == 0) {
  2428. mask >>= 1;
  2429. continue;
  2430. }
  2431. mask >>= 1;
  2432. crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
  2433. }
  2434. }
  2435. /* Finally, invert the result once to get the correct data */
  2436. crc = ~crc;
  2437. return bitrev32(crc) >> 16;
  2438. }
  2439. /**
  2440. * velocity_set_wol - set up for wake on lan
  2441. * @vptr: velocity to set WOL status on
  2442. *
  2443. * Set a card up for wake on lan either by unicast or by
  2444. * ARP packet.
  2445. *
  2446. * FIXME: check static buffer is safe here
  2447. */
  2448. static int velocity_set_wol(struct velocity_info *vptr)
  2449. {
  2450. struct mac_regs __iomem *regs = vptr->mac_regs;
  2451. enum speed_opt spd_dpx = vptr->options.spd_dpx;
  2452. static u8 buf[256];
  2453. int i;
  2454. static u32 mask_pattern[2][4] = {
  2455. {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
  2456. {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
  2457. };
  2458. writew(0xFFFF, &regs->WOLCRClr);
  2459. writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
  2460. writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
  2461. /*
  2462. if (vptr->wol_opts & VELOCITY_WOL_PHY)
  2463. writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
  2464. */
  2465. if (vptr->wol_opts & VELOCITY_WOL_UCAST)
  2466. writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
  2467. if (vptr->wol_opts & VELOCITY_WOL_ARP) {
  2468. struct arp_packet *arp = (struct arp_packet *) buf;
  2469. u16 crc;
  2470. memset(buf, 0, sizeof(struct arp_packet) + 7);
  2471. for (i = 0; i < 4; i++)
  2472. writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
  2473. arp->type = htons(ETH_P_ARP);
  2474. arp->ar_op = htons(1);
  2475. memcpy(arp->ar_tip, vptr->ip_addr, 4);
  2476. crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
  2477. (u8 *) & mask_pattern[0][0]);
  2478. writew(crc, &regs->PatternCRC[0]);
  2479. writew(WOLCR_ARP_EN, &regs->WOLCRSet);
  2480. }
  2481. BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
  2482. BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
  2483. writew(0x0FFF, &regs->WOLSRClr);
  2484. if (spd_dpx == SPD_DPX_1000_FULL)
  2485. goto mac_done;
  2486. if (spd_dpx != SPD_DPX_AUTO)
  2487. goto advertise_done;
  2488. if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
  2489. if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
  2490. MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs);
  2491. MII_REG_BITS_OFF(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs);
  2492. }
  2493. if (vptr->mii_status & VELOCITY_SPEED_1000)
  2494. MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs);
  2495. advertise_done:
  2496. BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
  2497. {
  2498. u8 GCR;
  2499. GCR = readb(&regs->CHIPGCR);
  2500. GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
  2501. writeb(GCR, &regs->CHIPGCR);
  2502. }
  2503. mac_done:
  2504. BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
  2505. /* Turn on SWPTAG just before entering power mode */
  2506. BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
  2507. /* Go to bed ..... */
  2508. BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
  2509. return 0;
  2510. }
  2511. /**
  2512. * velocity_save_context - save registers
  2513. * @vptr: velocity
  2514. * @context: buffer for stored context
  2515. *
  2516. * Retrieve the current configuration from the velocity hardware
  2517. * and stash it in the context structure, for use by the context
  2518. * restore functions. This allows us to save things we need across
  2519. * power down states
  2520. */
  2521. static void velocity_save_context(struct velocity_info *vptr, struct velocity_context *context)
  2522. {
  2523. struct mac_regs __iomem *regs = vptr->mac_regs;
  2524. u16 i;
  2525. u8 __iomem *ptr = (u8 __iomem *)regs;
  2526. for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
  2527. *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
  2528. for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
  2529. *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
  2530. for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
  2531. *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
  2532. }
  2533. static int velocity_suspend(struct pci_dev *pdev, pm_message_t state)
  2534. {
  2535. struct net_device *dev = pci_get_drvdata(pdev);
  2536. struct velocity_info *vptr = netdev_priv(dev);
  2537. unsigned long flags;
  2538. if (!netif_running(vptr->dev))
  2539. return 0;
  2540. netif_device_detach(vptr->dev);
  2541. spin_lock_irqsave(&vptr->lock, flags);
  2542. pci_save_state(pdev);
  2543. if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
  2544. velocity_get_ip(vptr);
  2545. velocity_save_context(vptr, &vptr->context);
  2546. velocity_shutdown(vptr);
  2547. velocity_set_wol(vptr);
  2548. pci_enable_wake(pdev, PCI_D3hot, 1);
  2549. pci_set_power_state(pdev, PCI_D3hot);
  2550. } else {
  2551. velocity_save_context(vptr, &vptr->context);
  2552. velocity_shutdown(vptr);
  2553. pci_disable_device(pdev);
  2554. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2555. }
  2556. spin_unlock_irqrestore(&vptr->lock, flags);
  2557. return 0;
  2558. }
  2559. /**
  2560. * velocity_restore_context - restore registers
  2561. * @vptr: velocity
  2562. * @context: buffer for stored context
  2563. *
  2564. * Reload the register configuration from the velocity context
  2565. * created by velocity_save_context.
  2566. */
  2567. static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
  2568. {
  2569. struct mac_regs __iomem *regs = vptr->mac_regs;
  2570. int i;
  2571. u8 __iomem *ptr = (u8 __iomem *)regs;
  2572. for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4)
  2573. writel(*((u32 *) (context->mac_reg + i)), ptr + i);
  2574. /* Just skip cr0 */
  2575. for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
  2576. /* Clear */
  2577. writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
  2578. /* Set */
  2579. writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
  2580. }
  2581. for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4)
  2582. writel(*((u32 *) (context->mac_reg + i)), ptr + i);
  2583. for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
  2584. writel(*((u32 *) (context->mac_reg + i)), ptr + i);
  2585. for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++)
  2586. writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
  2587. }
  2588. static int velocity_resume(struct pci_dev *pdev)
  2589. {
  2590. struct net_device *dev = pci_get_drvdata(pdev);
  2591. struct velocity_info *vptr = netdev_priv(dev);
  2592. unsigned long flags;
  2593. int i;
  2594. if (!netif_running(vptr->dev))
  2595. return 0;
  2596. pci_set_power_state(pdev, PCI_D0);
  2597. pci_enable_wake(pdev, 0, 0);
  2598. pci_restore_state(pdev);
  2599. mac_wol_reset(vptr->mac_regs);
  2600. spin_lock_irqsave(&vptr->lock, flags);
  2601. velocity_restore_context(vptr, &vptr->context);
  2602. velocity_init_registers(vptr, VELOCITY_INIT_WOL);
  2603. mac_disable_int(vptr->mac_regs);
  2604. velocity_tx_srv(vptr);
  2605. for (i = 0; i < vptr->tx.numq; i++) {
  2606. if (vptr->tx.used[i])
  2607. mac_tx_queue_wake(vptr->mac_regs, i);
  2608. }
  2609. mac_enable_int(vptr->mac_regs);
  2610. spin_unlock_irqrestore(&vptr->lock, flags);
  2611. netif_device_attach(vptr->dev);
  2612. return 0;
  2613. }
  2614. #endif
  2615. /*
  2616. * Definition for our device driver. The PCI layer interface
  2617. * uses this to handle all our card discover and plugging
  2618. */
  2619. static struct pci_driver velocity_driver = {
  2620. .name = VELOCITY_NAME,
  2621. .id_table = velocity_id_table,
  2622. .probe = velocity_found1,
  2623. .remove = velocity_remove1,
  2624. #ifdef CONFIG_PM
  2625. .suspend = velocity_suspend,
  2626. .resume = velocity_resume,
  2627. #endif
  2628. };
  2629. /**
  2630. * velocity_ethtool_up - pre hook for ethtool
  2631. * @dev: network device
  2632. *
  2633. * Called before an ethtool operation. We need to make sure the
  2634. * chip is out of D3 state before we poke at it.
  2635. */
  2636. static int velocity_ethtool_up(struct net_device *dev)
  2637. {
  2638. struct velocity_info *vptr = netdev_priv(dev);
  2639. if (!netif_running(dev))
  2640. pci_set_power_state(vptr->pdev, PCI_D0);
  2641. return 0;
  2642. }
  2643. /**
  2644. * velocity_ethtool_down - post hook for ethtool
  2645. * @dev: network device
  2646. *
  2647. * Called after an ethtool operation. Restore the chip back to D3
  2648. * state if it isn't running.
  2649. */
  2650. static void velocity_ethtool_down(struct net_device *dev)
  2651. {
  2652. struct velocity_info *vptr = netdev_priv(dev);
  2653. if (!netif_running(dev))
  2654. pci_set_power_state(vptr->pdev, PCI_D3hot);
  2655. }
  2656. static int velocity_get_settings(struct net_device *dev,
  2657. struct ethtool_cmd *cmd)
  2658. {
  2659. struct velocity_info *vptr = netdev_priv(dev);
  2660. struct mac_regs __iomem *regs = vptr->mac_regs;
  2661. u32 status;
  2662. status = check_connection_type(vptr->mac_regs);
  2663. cmd->supported = SUPPORTED_TP |
  2664. SUPPORTED_Autoneg |
  2665. SUPPORTED_10baseT_Half |
  2666. SUPPORTED_10baseT_Full |
  2667. SUPPORTED_100baseT_Half |
  2668. SUPPORTED_100baseT_Full |
  2669. SUPPORTED_1000baseT_Half |
  2670. SUPPORTED_1000baseT_Full;
  2671. cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
  2672. if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
  2673. cmd->advertising |=
  2674. ADVERTISED_10baseT_Half |
  2675. ADVERTISED_10baseT_Full |
  2676. ADVERTISED_100baseT_Half |
  2677. ADVERTISED_100baseT_Full |
  2678. ADVERTISED_1000baseT_Half |
  2679. ADVERTISED_1000baseT_Full;
  2680. } else {
  2681. switch (vptr->options.spd_dpx) {
  2682. case SPD_DPX_1000_FULL:
  2683. cmd->advertising |= ADVERTISED_1000baseT_Full;
  2684. break;
  2685. case SPD_DPX_100_HALF:
  2686. cmd->advertising |= ADVERTISED_100baseT_Half;
  2687. break;
  2688. case SPD_DPX_100_FULL:
  2689. cmd->advertising |= ADVERTISED_100baseT_Full;
  2690. break;
  2691. case SPD_DPX_10_HALF:
  2692. cmd->advertising |= ADVERTISED_10baseT_Half;
  2693. break;
  2694. case SPD_DPX_10_FULL:
  2695. cmd->advertising |= ADVERTISED_10baseT_Full;
  2696. break;
  2697. default:
  2698. break;
  2699. }
  2700. }
  2701. if (status & VELOCITY_SPEED_1000)
  2702. ethtool_cmd_speed_set(cmd, SPEED_1000);
  2703. else if (status & VELOCITY_SPEED_100)
  2704. ethtool_cmd_speed_set(cmd, SPEED_100);
  2705. else
  2706. ethtool_cmd_speed_set(cmd, SPEED_10);
  2707. cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
  2708. cmd->port = PORT_TP;
  2709. cmd->transceiver = XCVR_INTERNAL;
  2710. cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
  2711. if (status & VELOCITY_DUPLEX_FULL)
  2712. cmd->duplex = DUPLEX_FULL;
  2713. else
  2714. cmd->duplex = DUPLEX_HALF;
  2715. return 0;
  2716. }
  2717. static int velocity_set_settings(struct net_device *dev,
  2718. struct ethtool_cmd *cmd)
  2719. {
  2720. struct velocity_info *vptr = netdev_priv(dev);
  2721. u32 speed = ethtool_cmd_speed(cmd);
  2722. u32 curr_status;
  2723. u32 new_status = 0;
  2724. int ret = 0;
  2725. curr_status = check_connection_type(vptr->mac_regs);
  2726. curr_status &= (~VELOCITY_LINK_FAIL);
  2727. new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
  2728. new_status |= ((speed == SPEED_1000) ? VELOCITY_SPEED_1000 : 0);
  2729. new_status |= ((speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
  2730. new_status |= ((speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
  2731. new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
  2732. if ((new_status & VELOCITY_AUTONEG_ENABLE) &&
  2733. (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE))) {
  2734. ret = -EINVAL;
  2735. } else {
  2736. enum speed_opt spd_dpx;
  2737. if (new_status & VELOCITY_AUTONEG_ENABLE)
  2738. spd_dpx = SPD_DPX_AUTO;
  2739. else if ((new_status & VELOCITY_SPEED_1000) &&
  2740. (new_status & VELOCITY_DUPLEX_FULL)) {
  2741. spd_dpx = SPD_DPX_1000_FULL;
  2742. } else if (new_status & VELOCITY_SPEED_100)
  2743. spd_dpx = (new_status & VELOCITY_DUPLEX_FULL) ?
  2744. SPD_DPX_100_FULL : SPD_DPX_100_HALF;
  2745. else if (new_status & VELOCITY_SPEED_10)
  2746. spd_dpx = (new_status & VELOCITY_DUPLEX_FULL) ?
  2747. SPD_DPX_10_FULL : SPD_DPX_10_HALF;
  2748. else
  2749. return -EOPNOTSUPP;
  2750. vptr->options.spd_dpx = spd_dpx;
  2751. velocity_set_media_mode(vptr, new_status);
  2752. }
  2753. return ret;
  2754. }
  2755. static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  2756. {
  2757. struct velocity_info *vptr = netdev_priv(dev);
  2758. strlcpy(info->driver, VELOCITY_NAME, sizeof(info->driver));
  2759. strlcpy(info->version, VELOCITY_VERSION, sizeof(info->version));
  2760. strlcpy(info->bus_info, pci_name(vptr->pdev), sizeof(info->bus_info));
  2761. }
  2762. static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  2763. {
  2764. struct velocity_info *vptr = netdev_priv(dev);
  2765. wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
  2766. wol->wolopts |= WAKE_MAGIC;
  2767. /*
  2768. if (vptr->wol_opts & VELOCITY_WOL_PHY)
  2769. wol.wolopts|=WAKE_PHY;
  2770. */
  2771. if (vptr->wol_opts & VELOCITY_WOL_UCAST)
  2772. wol->wolopts |= WAKE_UCAST;
  2773. if (vptr->wol_opts & VELOCITY_WOL_ARP)
  2774. wol->wolopts |= WAKE_ARP;
  2775. memcpy(&wol->sopass, vptr->wol_passwd, 6);
  2776. }
  2777. static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  2778. {
  2779. struct velocity_info *vptr = netdev_priv(dev);
  2780. if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
  2781. return -EFAULT;
  2782. vptr->wol_opts = VELOCITY_WOL_MAGIC;
  2783. /*
  2784. if (wol.wolopts & WAKE_PHY) {
  2785. vptr->wol_opts|=VELOCITY_WOL_PHY;
  2786. vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
  2787. }
  2788. */
  2789. if (wol->wolopts & WAKE_MAGIC) {
  2790. vptr->wol_opts |= VELOCITY_WOL_MAGIC;
  2791. vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
  2792. }
  2793. if (wol->wolopts & WAKE_UCAST) {
  2794. vptr->wol_opts |= VELOCITY_WOL_UCAST;
  2795. vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
  2796. }
  2797. if (wol->wolopts & WAKE_ARP) {
  2798. vptr->wol_opts |= VELOCITY_WOL_ARP;
  2799. vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
  2800. }
  2801. memcpy(vptr->wol_passwd, wol->sopass, 6);
  2802. return 0;
  2803. }
  2804. static u32 velocity_get_msglevel(struct net_device *dev)
  2805. {
  2806. return msglevel;
  2807. }
  2808. static void velocity_set_msglevel(struct net_device *dev, u32 value)
  2809. {
  2810. msglevel = value;
  2811. }
  2812. static int get_pending_timer_val(int val)
  2813. {
  2814. int mult_bits = val >> 6;
  2815. int mult = 1;
  2816. switch (mult_bits)
  2817. {
  2818. case 1:
  2819. mult = 4; break;
  2820. case 2:
  2821. mult = 16; break;
  2822. case 3:
  2823. mult = 64; break;
  2824. case 0:
  2825. default:
  2826. break;
  2827. }
  2828. return (val & 0x3f) * mult;
  2829. }
  2830. static void set_pending_timer_val(int *val, u32 us)
  2831. {
  2832. u8 mult = 0;
  2833. u8 shift = 0;
  2834. if (us >= 0x3f) {
  2835. mult = 1; /* mult with 4 */
  2836. shift = 2;
  2837. }
  2838. if (us >= 0x3f * 4) {
  2839. mult = 2; /* mult with 16 */
  2840. shift = 4;
  2841. }
  2842. if (us >= 0x3f * 16) {
  2843. mult = 3; /* mult with 64 */
  2844. shift = 6;
  2845. }
  2846. *val = (mult << 6) | ((us >> shift) & 0x3f);
  2847. }
  2848. static int velocity_get_coalesce(struct net_device *dev,
  2849. struct ethtool_coalesce *ecmd)
  2850. {
  2851. struct velocity_info *vptr = netdev_priv(dev);
  2852. ecmd->tx_max_coalesced_frames = vptr->options.tx_intsup;
  2853. ecmd->rx_max_coalesced_frames = vptr->options.rx_intsup;
  2854. ecmd->rx_coalesce_usecs = get_pending_timer_val(vptr->options.rxqueue_timer);
  2855. ecmd->tx_coalesce_usecs = get_pending_timer_val(vptr->options.txqueue_timer);
  2856. return 0;
  2857. }
  2858. static int velocity_set_coalesce(struct net_device *dev,
  2859. struct ethtool_coalesce *ecmd)
  2860. {
  2861. struct velocity_info *vptr = netdev_priv(dev);
  2862. int max_us = 0x3f * 64;
  2863. unsigned long flags;
  2864. /* 6 bits of */
  2865. if (ecmd->tx_coalesce_usecs > max_us)
  2866. return -EINVAL;
  2867. if (ecmd->rx_coalesce_usecs > max_us)
  2868. return -EINVAL;
  2869. if (ecmd->tx_max_coalesced_frames > 0xff)
  2870. return -EINVAL;
  2871. if (ecmd->rx_max_coalesced_frames > 0xff)
  2872. return -EINVAL;
  2873. vptr->options.rx_intsup = ecmd->rx_max_coalesced_frames;
  2874. vptr->options.tx_intsup = ecmd->tx_max_coalesced_frames;
  2875. set_pending_timer_val(&vptr->options.rxqueue_timer,
  2876. ecmd->rx_coalesce_usecs);
  2877. set_pending_timer_val(&vptr->options.txqueue_timer,
  2878. ecmd->tx_coalesce_usecs);
  2879. /* Setup the interrupt suppression and queue timers */
  2880. spin_lock_irqsave(&vptr->lock, flags);
  2881. mac_disable_int(vptr->mac_regs);
  2882. setup_adaptive_interrupts(vptr);
  2883. setup_queue_timers(vptr);
  2884. mac_write_int_mask(vptr->int_mask, vptr->mac_regs);
  2885. mac_clear_isr(vptr->mac_regs);
  2886. mac_enable_int(vptr->mac_regs);
  2887. spin_unlock_irqrestore(&vptr->lock, flags);
  2888. return 0;
  2889. }
  2890. static const char velocity_gstrings[][ETH_GSTRING_LEN] = {
  2891. "rx_all",
  2892. "rx_ok",
  2893. "tx_ok",
  2894. "rx_error",
  2895. "rx_runt_ok",
  2896. "rx_runt_err",
  2897. "rx_64",
  2898. "tx_64",
  2899. "rx_65_to_127",
  2900. "tx_65_to_127",
  2901. "rx_128_to_255",
  2902. "tx_128_to_255",
  2903. "rx_256_to_511",
  2904. "tx_256_to_511",
  2905. "rx_512_to_1023",
  2906. "tx_512_to_1023",
  2907. "rx_1024_to_1518",
  2908. "tx_1024_to_1518",
  2909. "tx_ether_collisions",
  2910. "rx_crc_errors",
  2911. "rx_jumbo",
  2912. "tx_jumbo",
  2913. "rx_mac_control_frames",
  2914. "tx_mac_control_frames",
  2915. "rx_frame_alignement_errors",
  2916. "rx_long_ok",
  2917. "rx_long_err",
  2918. "tx_sqe_errors",
  2919. "rx_no_buf",
  2920. "rx_symbol_errors",
  2921. "in_range_length_errors",
  2922. "late_collisions"
  2923. };
  2924. static void velocity_get_strings(struct net_device *dev, u32 sset, u8 *data)
  2925. {
  2926. switch (sset) {
  2927. case ETH_SS_STATS:
  2928. memcpy(data, *velocity_gstrings, sizeof(velocity_gstrings));
  2929. break;
  2930. }
  2931. }
  2932. static int velocity_get_sset_count(struct net_device *dev, int sset)
  2933. {
  2934. switch (sset) {
  2935. case ETH_SS_STATS:
  2936. return ARRAY_SIZE(velocity_gstrings);
  2937. default:
  2938. return -EOPNOTSUPP;
  2939. }
  2940. }
  2941. static void velocity_get_ethtool_stats(struct net_device *dev,
  2942. struct ethtool_stats *stats, u64 *data)
  2943. {
  2944. if (netif_running(dev)) {
  2945. struct velocity_info *vptr = netdev_priv(dev);
  2946. u32 *p = vptr->mib_counter;
  2947. int i;
  2948. spin_lock_irq(&vptr->lock);
  2949. velocity_update_hw_mibs(vptr);
  2950. spin_unlock_irq(&vptr->lock);
  2951. for (i = 0; i < ARRAY_SIZE(velocity_gstrings); i++)
  2952. *data++ = *p++;
  2953. }
  2954. }
  2955. static const struct ethtool_ops velocity_ethtool_ops = {
  2956. .get_settings = velocity_get_settings,
  2957. .set_settings = velocity_set_settings,
  2958. .get_drvinfo = velocity_get_drvinfo,
  2959. .get_wol = velocity_ethtool_get_wol,
  2960. .set_wol = velocity_ethtool_set_wol,
  2961. .get_msglevel = velocity_get_msglevel,
  2962. .set_msglevel = velocity_set_msglevel,
  2963. .get_link = velocity_get_link,
  2964. .get_strings = velocity_get_strings,
  2965. .get_sset_count = velocity_get_sset_count,
  2966. .get_ethtool_stats = velocity_get_ethtool_stats,
  2967. .get_coalesce = velocity_get_coalesce,
  2968. .set_coalesce = velocity_set_coalesce,
  2969. .begin = velocity_ethtool_up,
  2970. .complete = velocity_ethtool_down
  2971. };
  2972. #if defined(CONFIG_PM) && defined(CONFIG_INET)
  2973. static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
  2974. {
  2975. struct in_ifaddr *ifa = ptr;
  2976. struct net_device *dev = ifa->ifa_dev->dev;
  2977. if (dev_net(dev) == &init_net &&
  2978. dev->netdev_ops == &velocity_netdev_ops)
  2979. velocity_get_ip(netdev_priv(dev));
  2980. return NOTIFY_DONE;
  2981. }
  2982. static struct notifier_block velocity_inetaddr_notifier = {
  2983. .notifier_call = velocity_netdev_event,
  2984. };
  2985. static void velocity_register_notifier(void)
  2986. {
  2987. register_inetaddr_notifier(&velocity_inetaddr_notifier);
  2988. }
  2989. static void velocity_unregister_notifier(void)
  2990. {
  2991. unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
  2992. }
  2993. #else
  2994. #define velocity_register_notifier() do {} while (0)
  2995. #define velocity_unregister_notifier() do {} while (0)
  2996. #endif /* defined(CONFIG_PM) && defined(CONFIG_INET) */
  2997. /**
  2998. * velocity_init_module - load time function
  2999. *
  3000. * Called when the velocity module is loaded. The PCI driver
  3001. * is registered with the PCI layer, and in turn will call
  3002. * the probe functions for each velocity adapter installed
  3003. * in the system.
  3004. */
  3005. static int __init velocity_init_module(void)
  3006. {
  3007. int ret;
  3008. velocity_register_notifier();
  3009. ret = pci_register_driver(&velocity_driver);
  3010. if (ret < 0)
  3011. velocity_unregister_notifier();
  3012. return ret;
  3013. }
  3014. /**
  3015. * velocity_cleanup - module unload
  3016. *
  3017. * When the velocity hardware is unloaded this function is called.
  3018. * It will clean up the notifiers and the unregister the PCI
  3019. * driver interface for this hardware. This in turn cleans up
  3020. * all discovered interfaces before returning from the function
  3021. */
  3022. static void __exit velocity_cleanup_module(void)
  3023. {
  3024. velocity_unregister_notifier();
  3025. pci_unregister_driver(&velocity_driver);
  3026. }
  3027. module_init(velocity_init_module);
  3028. module_exit(velocity_cleanup_module);