en_netdev.c 60 KB

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  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/etherdevice.h>
  34. #include <linux/tcp.h>
  35. #include <linux/if_vlan.h>
  36. #include <linux/delay.h>
  37. #include <linux/slab.h>
  38. #include <linux/hash.h>
  39. #include <net/ip.h>
  40. #include <linux/mlx4/driver.h>
  41. #include <linux/mlx4/device.h>
  42. #include <linux/mlx4/cmd.h>
  43. #include <linux/mlx4/cq.h>
  44. #include "mlx4_en.h"
  45. #include "en_port.h"
  46. int mlx4_en_setup_tc(struct net_device *dev, u8 up)
  47. {
  48. struct mlx4_en_priv *priv = netdev_priv(dev);
  49. int i;
  50. unsigned int offset = 0;
  51. if (up && up != MLX4_EN_NUM_UP)
  52. return -EINVAL;
  53. netdev_set_num_tc(dev, up);
  54. /* Partition Tx queues evenly amongst UP's */
  55. for (i = 0; i < up; i++) {
  56. netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
  57. offset += priv->num_tx_rings_p_up;
  58. }
  59. return 0;
  60. }
  61. #ifdef CONFIG_RFS_ACCEL
  62. struct mlx4_en_filter {
  63. struct list_head next;
  64. struct work_struct work;
  65. __be32 src_ip;
  66. __be32 dst_ip;
  67. __be16 src_port;
  68. __be16 dst_port;
  69. int rxq_index;
  70. struct mlx4_en_priv *priv;
  71. u32 flow_id; /* RFS infrastructure id */
  72. int id; /* mlx4_en driver id */
  73. u64 reg_id; /* Flow steering API id */
  74. u8 activated; /* Used to prevent expiry before filter
  75. * is attached
  76. */
  77. struct hlist_node filter_chain;
  78. };
  79. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
  80. static void mlx4_en_filter_work(struct work_struct *work)
  81. {
  82. struct mlx4_en_filter *filter = container_of(work,
  83. struct mlx4_en_filter,
  84. work);
  85. struct mlx4_en_priv *priv = filter->priv;
  86. struct mlx4_spec_list spec_tcp = {
  87. .id = MLX4_NET_TRANS_RULE_ID_TCP,
  88. {
  89. .tcp_udp = {
  90. .dst_port = filter->dst_port,
  91. .dst_port_msk = (__force __be16)-1,
  92. .src_port = filter->src_port,
  93. .src_port_msk = (__force __be16)-1,
  94. },
  95. },
  96. };
  97. struct mlx4_spec_list spec_ip = {
  98. .id = MLX4_NET_TRANS_RULE_ID_IPV4,
  99. {
  100. .ipv4 = {
  101. .dst_ip = filter->dst_ip,
  102. .dst_ip_msk = (__force __be32)-1,
  103. .src_ip = filter->src_ip,
  104. .src_ip_msk = (__force __be32)-1,
  105. },
  106. },
  107. };
  108. struct mlx4_spec_list spec_eth = {
  109. .id = MLX4_NET_TRANS_RULE_ID_ETH,
  110. };
  111. struct mlx4_net_trans_rule rule = {
  112. .list = LIST_HEAD_INIT(rule.list),
  113. .queue_mode = MLX4_NET_TRANS_Q_LIFO,
  114. .exclusive = 1,
  115. .allow_loopback = 1,
  116. .promisc_mode = MLX4_FS_REGULAR,
  117. .port = priv->port,
  118. .priority = MLX4_DOMAIN_RFS,
  119. };
  120. int rc;
  121. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  122. list_add_tail(&spec_eth.list, &rule.list);
  123. list_add_tail(&spec_ip.list, &rule.list);
  124. list_add_tail(&spec_tcp.list, &rule.list);
  125. rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
  126. memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
  127. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  128. filter->activated = 0;
  129. if (filter->reg_id) {
  130. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  131. if (rc && rc != -ENOENT)
  132. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  133. }
  134. rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
  135. if (rc)
  136. en_err(priv, "Error attaching flow. err = %d\n", rc);
  137. mlx4_en_filter_rfs_expire(priv);
  138. filter->activated = 1;
  139. }
  140. static inline struct hlist_head *
  141. filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  142. __be16 src_port, __be16 dst_port)
  143. {
  144. unsigned long l;
  145. int bucket_idx;
  146. l = (__force unsigned long)src_port |
  147. ((__force unsigned long)dst_port << 2);
  148. l ^= (__force unsigned long)(src_ip ^ dst_ip);
  149. bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
  150. return &priv->filter_hash[bucket_idx];
  151. }
  152. static struct mlx4_en_filter *
  153. mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
  154. __be32 dst_ip, __be16 src_port, __be16 dst_port,
  155. u32 flow_id)
  156. {
  157. struct mlx4_en_filter *filter = NULL;
  158. filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
  159. if (!filter)
  160. return NULL;
  161. filter->priv = priv;
  162. filter->rxq_index = rxq_index;
  163. INIT_WORK(&filter->work, mlx4_en_filter_work);
  164. filter->src_ip = src_ip;
  165. filter->dst_ip = dst_ip;
  166. filter->src_port = src_port;
  167. filter->dst_port = dst_port;
  168. filter->flow_id = flow_id;
  169. filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
  170. list_add_tail(&filter->next, &priv->filters);
  171. hlist_add_head(&filter->filter_chain,
  172. filter_hash_bucket(priv, src_ip, dst_ip, src_port,
  173. dst_port));
  174. return filter;
  175. }
  176. static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
  177. {
  178. struct mlx4_en_priv *priv = filter->priv;
  179. int rc;
  180. list_del(&filter->next);
  181. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  182. if (rc && rc != -ENOENT)
  183. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  184. kfree(filter);
  185. }
  186. static inline struct mlx4_en_filter *
  187. mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  188. __be16 src_port, __be16 dst_port)
  189. {
  190. struct mlx4_en_filter *filter;
  191. struct mlx4_en_filter *ret = NULL;
  192. hlist_for_each_entry(filter,
  193. filter_hash_bucket(priv, src_ip, dst_ip,
  194. src_port, dst_port),
  195. filter_chain) {
  196. if (filter->src_ip == src_ip &&
  197. filter->dst_ip == dst_ip &&
  198. filter->src_port == src_port &&
  199. filter->dst_port == dst_port) {
  200. ret = filter;
  201. break;
  202. }
  203. }
  204. return ret;
  205. }
  206. static int
  207. mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  208. u16 rxq_index, u32 flow_id)
  209. {
  210. struct mlx4_en_priv *priv = netdev_priv(net_dev);
  211. struct mlx4_en_filter *filter;
  212. const struct iphdr *ip;
  213. const __be16 *ports;
  214. __be32 src_ip;
  215. __be32 dst_ip;
  216. __be16 src_port;
  217. __be16 dst_port;
  218. int nhoff = skb_network_offset(skb);
  219. int ret = 0;
  220. if (skb->protocol != htons(ETH_P_IP))
  221. return -EPROTONOSUPPORT;
  222. ip = (const struct iphdr *)(skb->data + nhoff);
  223. if (ip_is_fragment(ip))
  224. return -EPROTONOSUPPORT;
  225. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  226. src_ip = ip->saddr;
  227. dst_ip = ip->daddr;
  228. src_port = ports[0];
  229. dst_port = ports[1];
  230. if (ip->protocol != IPPROTO_TCP)
  231. return -EPROTONOSUPPORT;
  232. spin_lock_bh(&priv->filters_lock);
  233. filter = mlx4_en_filter_find(priv, src_ip, dst_ip, src_port, dst_port);
  234. if (filter) {
  235. if (filter->rxq_index == rxq_index)
  236. goto out;
  237. filter->rxq_index = rxq_index;
  238. } else {
  239. filter = mlx4_en_filter_alloc(priv, rxq_index,
  240. src_ip, dst_ip,
  241. src_port, dst_port, flow_id);
  242. if (!filter) {
  243. ret = -ENOMEM;
  244. goto err;
  245. }
  246. }
  247. queue_work(priv->mdev->workqueue, &filter->work);
  248. out:
  249. ret = filter->id;
  250. err:
  251. spin_unlock_bh(&priv->filters_lock);
  252. return ret;
  253. }
  254. void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv,
  255. struct mlx4_en_rx_ring *rx_ring)
  256. {
  257. struct mlx4_en_filter *filter, *tmp;
  258. LIST_HEAD(del_list);
  259. spin_lock_bh(&priv->filters_lock);
  260. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  261. list_move(&filter->next, &del_list);
  262. hlist_del(&filter->filter_chain);
  263. }
  264. spin_unlock_bh(&priv->filters_lock);
  265. list_for_each_entry_safe(filter, tmp, &del_list, next) {
  266. cancel_work_sync(&filter->work);
  267. mlx4_en_filter_free(filter);
  268. }
  269. }
  270. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
  271. {
  272. struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
  273. LIST_HEAD(del_list);
  274. int i = 0;
  275. spin_lock_bh(&priv->filters_lock);
  276. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  277. if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
  278. break;
  279. if (filter->activated &&
  280. !work_pending(&filter->work) &&
  281. rps_may_expire_flow(priv->dev,
  282. filter->rxq_index, filter->flow_id,
  283. filter->id)) {
  284. list_move(&filter->next, &del_list);
  285. hlist_del(&filter->filter_chain);
  286. } else
  287. last_filter = filter;
  288. i++;
  289. }
  290. if (last_filter && (&last_filter->next != priv->filters.next))
  291. list_move(&priv->filters, &last_filter->next);
  292. spin_unlock_bh(&priv->filters_lock);
  293. list_for_each_entry_safe(filter, tmp, &del_list, next)
  294. mlx4_en_filter_free(filter);
  295. }
  296. #endif
  297. static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
  298. __be16 proto, u16 vid)
  299. {
  300. struct mlx4_en_priv *priv = netdev_priv(dev);
  301. struct mlx4_en_dev *mdev = priv->mdev;
  302. int err;
  303. int idx;
  304. en_dbg(HW, priv, "adding VLAN:%d\n", vid);
  305. set_bit(vid, priv->active_vlans);
  306. /* Add VID to port VLAN filter */
  307. mutex_lock(&mdev->state_lock);
  308. if (mdev->device_up && priv->port_up) {
  309. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  310. if (err)
  311. en_err(priv, "Failed configuring VLAN filter\n");
  312. }
  313. if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
  314. en_err(priv, "failed adding vlan %d\n", vid);
  315. mutex_unlock(&mdev->state_lock);
  316. return 0;
  317. }
  318. static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
  319. __be16 proto, u16 vid)
  320. {
  321. struct mlx4_en_priv *priv = netdev_priv(dev);
  322. struct mlx4_en_dev *mdev = priv->mdev;
  323. int err;
  324. int idx;
  325. en_dbg(HW, priv, "Killing VID:%d\n", vid);
  326. clear_bit(vid, priv->active_vlans);
  327. /* Remove VID from port VLAN filter */
  328. mutex_lock(&mdev->state_lock);
  329. if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx))
  330. mlx4_unregister_vlan(mdev->dev, priv->port, idx);
  331. else
  332. en_err(priv, "could not find vid %d in cache\n", vid);
  333. if (mdev->device_up && priv->port_up) {
  334. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  335. if (err)
  336. en_err(priv, "Failed configuring VLAN filter\n");
  337. }
  338. mutex_unlock(&mdev->state_lock);
  339. return 0;
  340. }
  341. static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
  342. {
  343. int i;
  344. for (i = ETH_ALEN - 1; i >= 0; --i) {
  345. dst_mac[i] = src_mac & 0xff;
  346. src_mac >>= 8;
  347. }
  348. memset(&dst_mac[ETH_ALEN], 0, 2);
  349. }
  350. static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
  351. unsigned char *mac, int *qpn, u64 *reg_id)
  352. {
  353. struct mlx4_en_dev *mdev = priv->mdev;
  354. struct mlx4_dev *dev = mdev->dev;
  355. int err;
  356. switch (dev->caps.steering_mode) {
  357. case MLX4_STEERING_MODE_B0: {
  358. struct mlx4_qp qp;
  359. u8 gid[16] = {0};
  360. qp.qpn = *qpn;
  361. memcpy(&gid[10], mac, ETH_ALEN);
  362. gid[5] = priv->port;
  363. err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
  364. break;
  365. }
  366. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  367. struct mlx4_spec_list spec_eth = { {NULL} };
  368. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  369. struct mlx4_net_trans_rule rule = {
  370. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  371. .exclusive = 0,
  372. .allow_loopback = 1,
  373. .promisc_mode = MLX4_FS_REGULAR,
  374. .priority = MLX4_DOMAIN_NIC,
  375. };
  376. rule.port = priv->port;
  377. rule.qpn = *qpn;
  378. INIT_LIST_HEAD(&rule.list);
  379. spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
  380. memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
  381. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  382. list_add_tail(&spec_eth.list, &rule.list);
  383. err = mlx4_flow_attach(dev, &rule, reg_id);
  384. break;
  385. }
  386. default:
  387. return -EINVAL;
  388. }
  389. if (err)
  390. en_warn(priv, "Failed Attaching Unicast\n");
  391. return err;
  392. }
  393. static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
  394. unsigned char *mac, int qpn, u64 reg_id)
  395. {
  396. struct mlx4_en_dev *mdev = priv->mdev;
  397. struct mlx4_dev *dev = mdev->dev;
  398. switch (dev->caps.steering_mode) {
  399. case MLX4_STEERING_MODE_B0: {
  400. struct mlx4_qp qp;
  401. u8 gid[16] = {0};
  402. qp.qpn = qpn;
  403. memcpy(&gid[10], mac, ETH_ALEN);
  404. gid[5] = priv->port;
  405. mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
  406. break;
  407. }
  408. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  409. mlx4_flow_detach(dev, reg_id);
  410. break;
  411. }
  412. default:
  413. en_err(priv, "Invalid steering mode.\n");
  414. }
  415. }
  416. static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
  417. {
  418. struct mlx4_en_dev *mdev = priv->mdev;
  419. struct mlx4_dev *dev = mdev->dev;
  420. struct mlx4_mac_entry *entry;
  421. int index = 0;
  422. int err = 0;
  423. u64 reg_id;
  424. int *qpn = &priv->base_qpn;
  425. u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
  426. en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
  427. priv->dev->dev_addr);
  428. index = mlx4_register_mac(dev, priv->port, mac);
  429. if (index < 0) {
  430. err = index;
  431. en_err(priv, "Failed adding MAC: %pM\n",
  432. priv->dev->dev_addr);
  433. return err;
  434. }
  435. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  436. int base_qpn = mlx4_get_base_qpn(dev, priv->port);
  437. *qpn = base_qpn + index;
  438. return 0;
  439. }
  440. err = mlx4_qp_reserve_range(dev, 1, 1, qpn);
  441. en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
  442. if (err) {
  443. en_err(priv, "Failed to reserve qp for mac registration\n");
  444. goto qp_err;
  445. }
  446. err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
  447. if (err)
  448. goto steer_err;
  449. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  450. if (!entry) {
  451. err = -ENOMEM;
  452. goto alloc_err;
  453. }
  454. memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
  455. entry->reg_id = reg_id;
  456. hlist_add_head_rcu(&entry->hlist,
  457. &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
  458. return 0;
  459. alloc_err:
  460. mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
  461. steer_err:
  462. mlx4_qp_release_range(dev, *qpn, 1);
  463. qp_err:
  464. mlx4_unregister_mac(dev, priv->port, mac);
  465. return err;
  466. }
  467. static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
  468. {
  469. struct mlx4_en_dev *mdev = priv->mdev;
  470. struct mlx4_dev *dev = mdev->dev;
  471. int qpn = priv->base_qpn;
  472. u64 mac;
  473. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  474. mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
  475. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  476. priv->dev->dev_addr);
  477. mlx4_unregister_mac(dev, priv->port, mac);
  478. } else {
  479. struct mlx4_mac_entry *entry;
  480. struct hlist_node *tmp;
  481. struct hlist_head *bucket;
  482. unsigned int i;
  483. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  484. bucket = &priv->mac_hash[i];
  485. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  486. mac = mlx4_en_mac_to_u64(entry->mac);
  487. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  488. entry->mac);
  489. mlx4_en_uc_steer_release(priv, entry->mac,
  490. qpn, entry->reg_id);
  491. mlx4_unregister_mac(dev, priv->port, mac);
  492. hlist_del_rcu(&entry->hlist);
  493. kfree_rcu(entry, rcu);
  494. }
  495. }
  496. en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
  497. priv->port, qpn);
  498. mlx4_qp_release_range(dev, qpn, 1);
  499. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  500. }
  501. }
  502. static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
  503. unsigned char *new_mac, unsigned char *prev_mac)
  504. {
  505. struct mlx4_en_dev *mdev = priv->mdev;
  506. struct mlx4_dev *dev = mdev->dev;
  507. int err = 0;
  508. u64 new_mac_u64 = mlx4_en_mac_to_u64(new_mac);
  509. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  510. struct hlist_head *bucket;
  511. unsigned int mac_hash;
  512. struct mlx4_mac_entry *entry;
  513. struct hlist_node *tmp;
  514. u64 prev_mac_u64 = mlx4_en_mac_to_u64(prev_mac);
  515. bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
  516. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  517. if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
  518. mlx4_en_uc_steer_release(priv, entry->mac,
  519. qpn, entry->reg_id);
  520. mlx4_unregister_mac(dev, priv->port,
  521. prev_mac_u64);
  522. hlist_del_rcu(&entry->hlist);
  523. synchronize_rcu();
  524. memcpy(entry->mac, new_mac, ETH_ALEN);
  525. entry->reg_id = 0;
  526. mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
  527. hlist_add_head_rcu(&entry->hlist,
  528. &priv->mac_hash[mac_hash]);
  529. mlx4_register_mac(dev, priv->port, new_mac_u64);
  530. err = mlx4_en_uc_steer_add(priv, new_mac,
  531. &qpn,
  532. &entry->reg_id);
  533. return err;
  534. }
  535. }
  536. return -EINVAL;
  537. }
  538. return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
  539. }
  540. u64 mlx4_en_mac_to_u64(u8 *addr)
  541. {
  542. u64 mac = 0;
  543. int i;
  544. for (i = 0; i < ETH_ALEN; i++) {
  545. mac <<= 8;
  546. mac |= addr[i];
  547. }
  548. return mac;
  549. }
  550. static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv)
  551. {
  552. int err = 0;
  553. if (priv->port_up) {
  554. /* Remove old MAC and insert the new one */
  555. err = mlx4_en_replace_mac(priv, priv->base_qpn,
  556. priv->dev->dev_addr, priv->prev_mac);
  557. if (err)
  558. en_err(priv, "Failed changing HW MAC address\n");
  559. memcpy(priv->prev_mac, priv->dev->dev_addr,
  560. sizeof(priv->prev_mac));
  561. } else
  562. en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
  563. return err;
  564. }
  565. static int mlx4_en_set_mac(struct net_device *dev, void *addr)
  566. {
  567. struct mlx4_en_priv *priv = netdev_priv(dev);
  568. struct mlx4_en_dev *mdev = priv->mdev;
  569. struct sockaddr *saddr = addr;
  570. int err;
  571. if (!is_valid_ether_addr(saddr->sa_data))
  572. return -EADDRNOTAVAIL;
  573. memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
  574. mutex_lock(&mdev->state_lock);
  575. err = mlx4_en_do_set_mac(priv);
  576. mutex_unlock(&mdev->state_lock);
  577. return err;
  578. }
  579. static void mlx4_en_clear_list(struct net_device *dev)
  580. {
  581. struct mlx4_en_priv *priv = netdev_priv(dev);
  582. struct mlx4_en_mc_list *tmp, *mc_to_del;
  583. list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
  584. list_del(&mc_to_del->list);
  585. kfree(mc_to_del);
  586. }
  587. }
  588. static void mlx4_en_cache_mclist(struct net_device *dev)
  589. {
  590. struct mlx4_en_priv *priv = netdev_priv(dev);
  591. struct netdev_hw_addr *ha;
  592. struct mlx4_en_mc_list *tmp;
  593. mlx4_en_clear_list(dev);
  594. netdev_for_each_mc_addr(ha, dev) {
  595. tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
  596. if (!tmp) {
  597. mlx4_en_clear_list(dev);
  598. return;
  599. }
  600. memcpy(tmp->addr, ha->addr, ETH_ALEN);
  601. list_add_tail(&tmp->list, &priv->mc_list);
  602. }
  603. }
  604. static void update_mclist_flags(struct mlx4_en_priv *priv,
  605. struct list_head *dst,
  606. struct list_head *src)
  607. {
  608. struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
  609. bool found;
  610. /* Find all the entries that should be removed from dst,
  611. * These are the entries that are not found in src
  612. */
  613. list_for_each_entry(dst_tmp, dst, list) {
  614. found = false;
  615. list_for_each_entry(src_tmp, src, list) {
  616. if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
  617. found = true;
  618. break;
  619. }
  620. }
  621. if (!found)
  622. dst_tmp->action = MCLIST_REM;
  623. }
  624. /* Add entries that exist in src but not in dst
  625. * mark them as need to add
  626. */
  627. list_for_each_entry(src_tmp, src, list) {
  628. found = false;
  629. list_for_each_entry(dst_tmp, dst, list) {
  630. if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
  631. dst_tmp->action = MCLIST_NONE;
  632. found = true;
  633. break;
  634. }
  635. }
  636. if (!found) {
  637. new_mc = kmemdup(src_tmp,
  638. sizeof(struct mlx4_en_mc_list),
  639. GFP_KERNEL);
  640. if (!new_mc)
  641. return;
  642. new_mc->action = MCLIST_ADD;
  643. list_add_tail(&new_mc->list, dst);
  644. }
  645. }
  646. }
  647. static void mlx4_en_set_rx_mode(struct net_device *dev)
  648. {
  649. struct mlx4_en_priv *priv = netdev_priv(dev);
  650. if (!priv->port_up)
  651. return;
  652. queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
  653. }
  654. static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
  655. struct mlx4_en_dev *mdev)
  656. {
  657. int err = 0;
  658. if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
  659. if (netif_msg_rx_status(priv))
  660. en_warn(priv, "Entering promiscuous mode\n");
  661. priv->flags |= MLX4_EN_FLAG_PROMISC;
  662. /* Enable promiscouos mode */
  663. switch (mdev->dev->caps.steering_mode) {
  664. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  665. err = mlx4_flow_steer_promisc_add(mdev->dev,
  666. priv->port,
  667. priv->base_qpn,
  668. MLX4_FS_ALL_DEFAULT);
  669. if (err)
  670. en_err(priv, "Failed enabling promiscuous mode\n");
  671. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  672. break;
  673. case MLX4_STEERING_MODE_B0:
  674. err = mlx4_unicast_promisc_add(mdev->dev,
  675. priv->base_qpn,
  676. priv->port);
  677. if (err)
  678. en_err(priv, "Failed enabling unicast promiscuous mode\n");
  679. /* Add the default qp number as multicast
  680. * promisc
  681. */
  682. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  683. err = mlx4_multicast_promisc_add(mdev->dev,
  684. priv->base_qpn,
  685. priv->port);
  686. if (err)
  687. en_err(priv, "Failed enabling multicast promiscuous mode\n");
  688. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  689. }
  690. break;
  691. case MLX4_STEERING_MODE_A0:
  692. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  693. priv->port,
  694. priv->base_qpn,
  695. 1);
  696. if (err)
  697. en_err(priv, "Failed enabling promiscuous mode\n");
  698. break;
  699. }
  700. /* Disable port multicast filter (unconditionally) */
  701. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  702. 0, MLX4_MCAST_DISABLE);
  703. if (err)
  704. en_err(priv, "Failed disabling multicast filter\n");
  705. /* Disable port VLAN filter */
  706. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  707. if (err)
  708. en_err(priv, "Failed disabling VLAN filter\n");
  709. }
  710. }
  711. static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
  712. struct mlx4_en_dev *mdev)
  713. {
  714. int err = 0;
  715. if (netif_msg_rx_status(priv))
  716. en_warn(priv, "Leaving promiscuous mode\n");
  717. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  718. /* Disable promiscouos mode */
  719. switch (mdev->dev->caps.steering_mode) {
  720. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  721. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  722. priv->port,
  723. MLX4_FS_ALL_DEFAULT);
  724. if (err)
  725. en_err(priv, "Failed disabling promiscuous mode\n");
  726. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  727. break;
  728. case MLX4_STEERING_MODE_B0:
  729. err = mlx4_unicast_promisc_remove(mdev->dev,
  730. priv->base_qpn,
  731. priv->port);
  732. if (err)
  733. en_err(priv, "Failed disabling unicast promiscuous mode\n");
  734. /* Disable Multicast promisc */
  735. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  736. err = mlx4_multicast_promisc_remove(mdev->dev,
  737. priv->base_qpn,
  738. priv->port);
  739. if (err)
  740. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  741. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  742. }
  743. break;
  744. case MLX4_STEERING_MODE_A0:
  745. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  746. priv->port,
  747. priv->base_qpn, 0);
  748. if (err)
  749. en_err(priv, "Failed disabling promiscuous mode\n");
  750. break;
  751. }
  752. /* Enable port VLAN filter */
  753. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  754. if (err)
  755. en_err(priv, "Failed enabling VLAN filter\n");
  756. }
  757. static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
  758. struct net_device *dev,
  759. struct mlx4_en_dev *mdev)
  760. {
  761. struct mlx4_en_mc_list *mclist, *tmp;
  762. u64 mcast_addr = 0;
  763. u8 mc_list[16] = {0};
  764. int err = 0;
  765. /* Enable/disable the multicast filter according to IFF_ALLMULTI */
  766. if (dev->flags & IFF_ALLMULTI) {
  767. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  768. 0, MLX4_MCAST_DISABLE);
  769. if (err)
  770. en_err(priv, "Failed disabling multicast filter\n");
  771. /* Add the default qp number as multicast promisc */
  772. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  773. switch (mdev->dev->caps.steering_mode) {
  774. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  775. err = mlx4_flow_steer_promisc_add(mdev->dev,
  776. priv->port,
  777. priv->base_qpn,
  778. MLX4_FS_MC_DEFAULT);
  779. break;
  780. case MLX4_STEERING_MODE_B0:
  781. err = mlx4_multicast_promisc_add(mdev->dev,
  782. priv->base_qpn,
  783. priv->port);
  784. break;
  785. case MLX4_STEERING_MODE_A0:
  786. break;
  787. }
  788. if (err)
  789. en_err(priv, "Failed entering multicast promisc mode\n");
  790. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  791. }
  792. } else {
  793. /* Disable Multicast promisc */
  794. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  795. switch (mdev->dev->caps.steering_mode) {
  796. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  797. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  798. priv->port,
  799. MLX4_FS_MC_DEFAULT);
  800. break;
  801. case MLX4_STEERING_MODE_B0:
  802. err = mlx4_multicast_promisc_remove(mdev->dev,
  803. priv->base_qpn,
  804. priv->port);
  805. break;
  806. case MLX4_STEERING_MODE_A0:
  807. break;
  808. }
  809. if (err)
  810. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  811. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  812. }
  813. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  814. 0, MLX4_MCAST_DISABLE);
  815. if (err)
  816. en_err(priv, "Failed disabling multicast filter\n");
  817. /* Flush mcast filter and init it with broadcast address */
  818. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
  819. 1, MLX4_MCAST_CONFIG);
  820. /* Update multicast list - we cache all addresses so they won't
  821. * change while HW is updated holding the command semaphor */
  822. netif_addr_lock_bh(dev);
  823. mlx4_en_cache_mclist(dev);
  824. netif_addr_unlock_bh(dev);
  825. list_for_each_entry(mclist, &priv->mc_list, list) {
  826. mcast_addr = mlx4_en_mac_to_u64(mclist->addr);
  827. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
  828. mcast_addr, 0, MLX4_MCAST_CONFIG);
  829. }
  830. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  831. 0, MLX4_MCAST_ENABLE);
  832. if (err)
  833. en_err(priv, "Failed enabling multicast filter\n");
  834. update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
  835. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  836. if (mclist->action == MCLIST_REM) {
  837. /* detach this address and delete from list */
  838. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  839. mc_list[5] = priv->port;
  840. err = mlx4_multicast_detach(mdev->dev,
  841. &priv->rss_map.indir_qp,
  842. mc_list,
  843. MLX4_PROT_ETH,
  844. mclist->reg_id);
  845. if (err)
  846. en_err(priv, "Fail to detach multicast address\n");
  847. /* remove from list */
  848. list_del(&mclist->list);
  849. kfree(mclist);
  850. } else if (mclist->action == MCLIST_ADD) {
  851. /* attach the address */
  852. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  853. /* needed for B0 steering support */
  854. mc_list[5] = priv->port;
  855. err = mlx4_multicast_attach(mdev->dev,
  856. &priv->rss_map.indir_qp,
  857. mc_list,
  858. priv->port, 0,
  859. MLX4_PROT_ETH,
  860. &mclist->reg_id);
  861. if (err)
  862. en_err(priv, "Fail to attach multicast address\n");
  863. }
  864. }
  865. }
  866. }
  867. static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
  868. struct net_device *dev,
  869. struct mlx4_en_dev *mdev)
  870. {
  871. struct netdev_hw_addr *ha;
  872. struct mlx4_mac_entry *entry;
  873. struct hlist_node *tmp;
  874. bool found;
  875. u64 mac;
  876. int err = 0;
  877. struct hlist_head *bucket;
  878. unsigned int i;
  879. int removed = 0;
  880. u32 prev_flags;
  881. /* Note that we do not need to protect our mac_hash traversal with rcu,
  882. * since all modification code is protected by mdev->state_lock
  883. */
  884. /* find what to remove */
  885. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  886. bucket = &priv->mac_hash[i];
  887. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  888. found = false;
  889. netdev_for_each_uc_addr(ha, dev) {
  890. if (ether_addr_equal_64bits(entry->mac,
  891. ha->addr)) {
  892. found = true;
  893. break;
  894. }
  895. }
  896. /* MAC address of the port is not in uc list */
  897. if (ether_addr_equal_64bits(entry->mac, dev->dev_addr))
  898. found = true;
  899. if (!found) {
  900. mac = mlx4_en_mac_to_u64(entry->mac);
  901. mlx4_en_uc_steer_release(priv, entry->mac,
  902. priv->base_qpn,
  903. entry->reg_id);
  904. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  905. hlist_del_rcu(&entry->hlist);
  906. kfree_rcu(entry, rcu);
  907. en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
  908. entry->mac, priv->port);
  909. ++removed;
  910. }
  911. }
  912. }
  913. /* if we didn't remove anything, there is no use in trying to add
  914. * again once we are in a forced promisc mode state
  915. */
  916. if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
  917. return;
  918. prev_flags = priv->flags;
  919. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  920. /* find what to add */
  921. netdev_for_each_uc_addr(ha, dev) {
  922. found = false;
  923. bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
  924. hlist_for_each_entry(entry, bucket, hlist) {
  925. if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
  926. found = true;
  927. break;
  928. }
  929. }
  930. if (!found) {
  931. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  932. if (!entry) {
  933. en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
  934. ha->addr, priv->port);
  935. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  936. break;
  937. }
  938. mac = mlx4_en_mac_to_u64(ha->addr);
  939. memcpy(entry->mac, ha->addr, ETH_ALEN);
  940. err = mlx4_register_mac(mdev->dev, priv->port, mac);
  941. if (err < 0) {
  942. en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
  943. ha->addr, priv->port, err);
  944. kfree(entry);
  945. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  946. break;
  947. }
  948. err = mlx4_en_uc_steer_add(priv, ha->addr,
  949. &priv->base_qpn,
  950. &entry->reg_id);
  951. if (err) {
  952. en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
  953. ha->addr, priv->port, err);
  954. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  955. kfree(entry);
  956. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  957. break;
  958. } else {
  959. unsigned int mac_hash;
  960. en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
  961. ha->addr, priv->port);
  962. mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
  963. bucket = &priv->mac_hash[mac_hash];
  964. hlist_add_head_rcu(&entry->hlist, bucket);
  965. }
  966. }
  967. }
  968. if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  969. en_warn(priv, "Forcing promiscuous mode on port:%d\n",
  970. priv->port);
  971. } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  972. en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
  973. priv->port);
  974. }
  975. }
  976. static void mlx4_en_do_set_rx_mode(struct work_struct *work)
  977. {
  978. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  979. rx_mode_task);
  980. struct mlx4_en_dev *mdev = priv->mdev;
  981. struct net_device *dev = priv->dev;
  982. mutex_lock(&mdev->state_lock);
  983. if (!mdev->device_up) {
  984. en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
  985. goto out;
  986. }
  987. if (!priv->port_up) {
  988. en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
  989. goto out;
  990. }
  991. if (!netif_carrier_ok(dev)) {
  992. if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
  993. if (priv->port_state.link_state) {
  994. priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
  995. netif_carrier_on(dev);
  996. en_dbg(LINK, priv, "Link Up\n");
  997. }
  998. }
  999. }
  1000. if (dev->priv_flags & IFF_UNICAST_FLT)
  1001. mlx4_en_do_uc_filter(priv, dev, mdev);
  1002. /* Promsicuous mode: disable all filters */
  1003. if ((dev->flags & IFF_PROMISC) ||
  1004. (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
  1005. mlx4_en_set_promisc_mode(priv, mdev);
  1006. goto out;
  1007. }
  1008. /* Not in promiscuous mode */
  1009. if (priv->flags & MLX4_EN_FLAG_PROMISC)
  1010. mlx4_en_clear_promisc_mode(priv, mdev);
  1011. mlx4_en_do_multicast(priv, dev, mdev);
  1012. out:
  1013. mutex_unlock(&mdev->state_lock);
  1014. }
  1015. #ifdef CONFIG_NET_POLL_CONTROLLER
  1016. static void mlx4_en_netpoll(struct net_device *dev)
  1017. {
  1018. struct mlx4_en_priv *priv = netdev_priv(dev);
  1019. struct mlx4_en_cq *cq;
  1020. unsigned long flags;
  1021. int i;
  1022. for (i = 0; i < priv->rx_ring_num; i++) {
  1023. cq = &priv->rx_cq[i];
  1024. spin_lock_irqsave(&cq->lock, flags);
  1025. napi_synchronize(&cq->napi);
  1026. mlx4_en_process_rx_cq(dev, cq, 0);
  1027. spin_unlock_irqrestore(&cq->lock, flags);
  1028. }
  1029. }
  1030. #endif
  1031. static void mlx4_en_tx_timeout(struct net_device *dev)
  1032. {
  1033. struct mlx4_en_priv *priv = netdev_priv(dev);
  1034. struct mlx4_en_dev *mdev = priv->mdev;
  1035. if (netif_msg_timer(priv))
  1036. en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
  1037. priv->port_stats.tx_timeout++;
  1038. en_dbg(DRV, priv, "Scheduling watchdog\n");
  1039. queue_work(mdev->workqueue, &priv->watchdog_task);
  1040. }
  1041. static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
  1042. {
  1043. struct mlx4_en_priv *priv = netdev_priv(dev);
  1044. spin_lock_bh(&priv->stats_lock);
  1045. memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
  1046. spin_unlock_bh(&priv->stats_lock);
  1047. return &priv->ret_stats;
  1048. }
  1049. static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
  1050. {
  1051. struct mlx4_en_cq *cq;
  1052. int i;
  1053. /* If we haven't received a specific coalescing setting
  1054. * (module param), we set the moderation parameters as follows:
  1055. * - moder_cnt is set to the number of mtu sized packets to
  1056. * satisfy our coalescing target.
  1057. * - moder_time is set to a fixed value.
  1058. */
  1059. priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
  1060. priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
  1061. priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
  1062. priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
  1063. en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
  1064. priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
  1065. /* Setup cq moderation params */
  1066. for (i = 0; i < priv->rx_ring_num; i++) {
  1067. cq = &priv->rx_cq[i];
  1068. cq->moder_cnt = priv->rx_frames;
  1069. cq->moder_time = priv->rx_usecs;
  1070. priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  1071. priv->last_moder_packets[i] = 0;
  1072. priv->last_moder_bytes[i] = 0;
  1073. }
  1074. for (i = 0; i < priv->tx_ring_num; i++) {
  1075. cq = &priv->tx_cq[i];
  1076. cq->moder_cnt = priv->tx_frames;
  1077. cq->moder_time = priv->tx_usecs;
  1078. }
  1079. /* Reset auto-moderation params */
  1080. priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
  1081. priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
  1082. priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
  1083. priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
  1084. priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
  1085. priv->adaptive_rx_coal = 1;
  1086. priv->last_moder_jiffies = 0;
  1087. priv->last_moder_tx_packets = 0;
  1088. }
  1089. static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
  1090. {
  1091. unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
  1092. struct mlx4_en_cq *cq;
  1093. unsigned long packets;
  1094. unsigned long rate;
  1095. unsigned long avg_pkt_size;
  1096. unsigned long rx_packets;
  1097. unsigned long rx_bytes;
  1098. unsigned long rx_pkt_diff;
  1099. int moder_time;
  1100. int ring, err;
  1101. if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
  1102. return;
  1103. for (ring = 0; ring < priv->rx_ring_num; ring++) {
  1104. spin_lock_bh(&priv->stats_lock);
  1105. rx_packets = priv->rx_ring[ring].packets;
  1106. rx_bytes = priv->rx_ring[ring].bytes;
  1107. spin_unlock_bh(&priv->stats_lock);
  1108. rx_pkt_diff = ((unsigned long) (rx_packets -
  1109. priv->last_moder_packets[ring]));
  1110. packets = rx_pkt_diff;
  1111. rate = packets * HZ / period;
  1112. avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
  1113. priv->last_moder_bytes[ring])) / packets : 0;
  1114. /* Apply auto-moderation only when packet rate
  1115. * exceeds a rate that it matters */
  1116. if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
  1117. avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
  1118. if (rate < priv->pkt_rate_low)
  1119. moder_time = priv->rx_usecs_low;
  1120. else if (rate > priv->pkt_rate_high)
  1121. moder_time = priv->rx_usecs_high;
  1122. else
  1123. moder_time = (rate - priv->pkt_rate_low) *
  1124. (priv->rx_usecs_high - priv->rx_usecs_low) /
  1125. (priv->pkt_rate_high - priv->pkt_rate_low) +
  1126. priv->rx_usecs_low;
  1127. } else {
  1128. moder_time = priv->rx_usecs_low;
  1129. }
  1130. if (moder_time != priv->last_moder_time[ring]) {
  1131. priv->last_moder_time[ring] = moder_time;
  1132. cq = &priv->rx_cq[ring];
  1133. cq->moder_time = moder_time;
  1134. err = mlx4_en_set_cq_moder(priv, cq);
  1135. if (err)
  1136. en_err(priv, "Failed modifying moderation for cq:%d\n",
  1137. ring);
  1138. }
  1139. priv->last_moder_packets[ring] = rx_packets;
  1140. priv->last_moder_bytes[ring] = rx_bytes;
  1141. }
  1142. priv->last_moder_jiffies = jiffies;
  1143. }
  1144. static void mlx4_en_do_get_stats(struct work_struct *work)
  1145. {
  1146. struct delayed_work *delay = to_delayed_work(work);
  1147. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1148. stats_task);
  1149. struct mlx4_en_dev *mdev = priv->mdev;
  1150. int err;
  1151. mutex_lock(&mdev->state_lock);
  1152. if (mdev->device_up) {
  1153. err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
  1154. if (err)
  1155. en_dbg(HW, priv, "Could not update stats\n");
  1156. if (priv->port_up)
  1157. mlx4_en_auto_moderation(priv);
  1158. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1159. }
  1160. if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
  1161. mlx4_en_do_set_mac(priv);
  1162. mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
  1163. }
  1164. mutex_unlock(&mdev->state_lock);
  1165. }
  1166. /* mlx4_en_service_task - Run service task for tasks that needed to be done
  1167. * periodically
  1168. */
  1169. static void mlx4_en_service_task(struct work_struct *work)
  1170. {
  1171. struct delayed_work *delay = to_delayed_work(work);
  1172. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1173. service_task);
  1174. struct mlx4_en_dev *mdev = priv->mdev;
  1175. mutex_lock(&mdev->state_lock);
  1176. if (mdev->device_up) {
  1177. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1178. mlx4_en_ptp_overflow_check(mdev);
  1179. queue_delayed_work(mdev->workqueue, &priv->service_task,
  1180. SERVICE_TASK_DELAY);
  1181. }
  1182. mutex_unlock(&mdev->state_lock);
  1183. }
  1184. static void mlx4_en_linkstate(struct work_struct *work)
  1185. {
  1186. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1187. linkstate_task);
  1188. struct mlx4_en_dev *mdev = priv->mdev;
  1189. int linkstate = priv->link_state;
  1190. mutex_lock(&mdev->state_lock);
  1191. /* If observable port state changed set carrier state and
  1192. * report to system log */
  1193. if (priv->last_link_state != linkstate) {
  1194. if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
  1195. en_info(priv, "Link Down\n");
  1196. netif_carrier_off(priv->dev);
  1197. } else {
  1198. en_info(priv, "Link Up\n");
  1199. netif_carrier_on(priv->dev);
  1200. }
  1201. }
  1202. priv->last_link_state = linkstate;
  1203. mutex_unlock(&mdev->state_lock);
  1204. }
  1205. int mlx4_en_start_port(struct net_device *dev)
  1206. {
  1207. struct mlx4_en_priv *priv = netdev_priv(dev);
  1208. struct mlx4_en_dev *mdev = priv->mdev;
  1209. struct mlx4_en_cq *cq;
  1210. struct mlx4_en_tx_ring *tx_ring;
  1211. int rx_index = 0;
  1212. int tx_index = 0;
  1213. int err = 0;
  1214. int i;
  1215. int j;
  1216. u8 mc_list[16] = {0};
  1217. if (priv->port_up) {
  1218. en_dbg(DRV, priv, "start port called while port already up\n");
  1219. return 0;
  1220. }
  1221. INIT_LIST_HEAD(&priv->mc_list);
  1222. INIT_LIST_HEAD(&priv->curr_list);
  1223. INIT_LIST_HEAD(&priv->ethtool_list);
  1224. memset(&priv->ethtool_rules[0], 0,
  1225. sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
  1226. /* Calculate Rx buf size */
  1227. dev->mtu = min(dev->mtu, priv->max_mtu);
  1228. mlx4_en_calc_rx_buf(dev);
  1229. en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
  1230. /* Configure rx cq's and rings */
  1231. err = mlx4_en_activate_rx_rings(priv);
  1232. if (err) {
  1233. en_err(priv, "Failed to activate RX rings\n");
  1234. return err;
  1235. }
  1236. for (i = 0; i < priv->rx_ring_num; i++) {
  1237. cq = &priv->rx_cq[i];
  1238. err = mlx4_en_activate_cq(priv, cq, i);
  1239. if (err) {
  1240. en_err(priv, "Failed activating Rx CQ\n");
  1241. goto cq_err;
  1242. }
  1243. for (j = 0; j < cq->size; j++)
  1244. cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
  1245. err = mlx4_en_set_cq_moder(priv, cq);
  1246. if (err) {
  1247. en_err(priv, "Failed setting cq moderation parameters");
  1248. mlx4_en_deactivate_cq(priv, cq);
  1249. goto cq_err;
  1250. }
  1251. mlx4_en_arm_cq(priv, cq);
  1252. priv->rx_ring[i].cqn = cq->mcq.cqn;
  1253. ++rx_index;
  1254. }
  1255. /* Set qp number */
  1256. en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
  1257. err = mlx4_en_get_qp(priv);
  1258. if (err) {
  1259. en_err(priv, "Failed getting eth qp\n");
  1260. goto cq_err;
  1261. }
  1262. mdev->mac_removed[priv->port] = 0;
  1263. err = mlx4_en_config_rss_steer(priv);
  1264. if (err) {
  1265. en_err(priv, "Failed configuring rss steering\n");
  1266. goto mac_err;
  1267. }
  1268. err = mlx4_en_create_drop_qp(priv);
  1269. if (err)
  1270. goto rss_err;
  1271. /* Configure tx cq's and rings */
  1272. for (i = 0; i < priv->tx_ring_num; i++) {
  1273. /* Configure cq */
  1274. cq = &priv->tx_cq[i];
  1275. err = mlx4_en_activate_cq(priv, cq, i);
  1276. if (err) {
  1277. en_err(priv, "Failed allocating Tx CQ\n");
  1278. goto tx_err;
  1279. }
  1280. err = mlx4_en_set_cq_moder(priv, cq);
  1281. if (err) {
  1282. en_err(priv, "Failed setting cq moderation parameters");
  1283. mlx4_en_deactivate_cq(priv, cq);
  1284. goto tx_err;
  1285. }
  1286. en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
  1287. cq->buf->wqe_index = cpu_to_be16(0xffff);
  1288. /* Configure ring */
  1289. tx_ring = &priv->tx_ring[i];
  1290. err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
  1291. i / priv->num_tx_rings_p_up);
  1292. if (err) {
  1293. en_err(priv, "Failed allocating Tx ring\n");
  1294. mlx4_en_deactivate_cq(priv, cq);
  1295. goto tx_err;
  1296. }
  1297. tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
  1298. /* Arm CQ for TX completions */
  1299. mlx4_en_arm_cq(priv, cq);
  1300. /* Set initial ownership of all Tx TXBBs to SW (1) */
  1301. for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
  1302. *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
  1303. ++tx_index;
  1304. }
  1305. /* Configure port */
  1306. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1307. priv->rx_skb_size + ETH_FCS_LEN,
  1308. priv->prof->tx_pause,
  1309. priv->prof->tx_ppp,
  1310. priv->prof->rx_pause,
  1311. priv->prof->rx_ppp);
  1312. if (err) {
  1313. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  1314. priv->port, err);
  1315. goto tx_err;
  1316. }
  1317. /* Set default qp number */
  1318. err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
  1319. if (err) {
  1320. en_err(priv, "Failed setting default qp numbers\n");
  1321. goto tx_err;
  1322. }
  1323. /* Init port */
  1324. en_dbg(HW, priv, "Initializing port\n");
  1325. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1326. if (err) {
  1327. en_err(priv, "Failed Initializing port\n");
  1328. goto tx_err;
  1329. }
  1330. /* Attach rx QP to bradcast address */
  1331. memset(&mc_list[10], 0xff, ETH_ALEN);
  1332. mc_list[5] = priv->port; /* needed for B0 steering support */
  1333. if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1334. priv->port, 0, MLX4_PROT_ETH,
  1335. &priv->broadcast_id))
  1336. mlx4_warn(mdev, "Failed Attaching Broadcast\n");
  1337. /* Must redo promiscuous mode setup. */
  1338. priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
  1339. /* Schedule multicast task to populate multicast list */
  1340. queue_work(mdev->workqueue, &priv->rx_mode_task);
  1341. mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
  1342. priv->port_up = true;
  1343. netif_tx_start_all_queues(dev);
  1344. netif_device_attach(dev);
  1345. return 0;
  1346. tx_err:
  1347. while (tx_index--) {
  1348. mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]);
  1349. mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]);
  1350. }
  1351. mlx4_en_destroy_drop_qp(priv);
  1352. rss_err:
  1353. mlx4_en_release_rss_steer(priv);
  1354. mac_err:
  1355. mlx4_en_put_qp(priv);
  1356. cq_err:
  1357. while (rx_index--)
  1358. mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]);
  1359. for (i = 0; i < priv->rx_ring_num; i++)
  1360. mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
  1361. return err; /* need to close devices */
  1362. }
  1363. void mlx4_en_stop_port(struct net_device *dev, int detach)
  1364. {
  1365. struct mlx4_en_priv *priv = netdev_priv(dev);
  1366. struct mlx4_en_dev *mdev = priv->mdev;
  1367. struct mlx4_en_mc_list *mclist, *tmp;
  1368. struct ethtool_flow_id *flow, *tmp_flow;
  1369. int i;
  1370. u8 mc_list[16] = {0};
  1371. if (!priv->port_up) {
  1372. en_dbg(DRV, priv, "stop port called while port already down\n");
  1373. return;
  1374. }
  1375. /* Synchronize with tx routine */
  1376. netif_tx_lock_bh(dev);
  1377. if (detach)
  1378. netif_device_detach(dev);
  1379. netif_tx_stop_all_queues(dev);
  1380. netif_tx_unlock_bh(dev);
  1381. netif_tx_disable(dev);
  1382. /* Set port as not active */
  1383. priv->port_up = false;
  1384. /* Promsicuous mode */
  1385. if (mdev->dev->caps.steering_mode ==
  1386. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1387. priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
  1388. MLX4_EN_FLAG_MC_PROMISC);
  1389. mlx4_flow_steer_promisc_remove(mdev->dev,
  1390. priv->port,
  1391. MLX4_FS_ALL_DEFAULT);
  1392. mlx4_flow_steer_promisc_remove(mdev->dev,
  1393. priv->port,
  1394. MLX4_FS_MC_DEFAULT);
  1395. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  1396. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  1397. /* Disable promiscouos mode */
  1398. mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
  1399. priv->port);
  1400. /* Disable Multicast promisc */
  1401. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  1402. mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
  1403. priv->port);
  1404. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  1405. }
  1406. }
  1407. /* Detach All multicasts */
  1408. memset(&mc_list[10], 0xff, ETH_ALEN);
  1409. mc_list[5] = priv->port; /* needed for B0 steering support */
  1410. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1411. MLX4_PROT_ETH, priv->broadcast_id);
  1412. list_for_each_entry(mclist, &priv->curr_list, list) {
  1413. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  1414. mc_list[5] = priv->port;
  1415. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
  1416. mc_list, MLX4_PROT_ETH, mclist->reg_id);
  1417. }
  1418. mlx4_en_clear_list(dev);
  1419. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  1420. list_del(&mclist->list);
  1421. kfree(mclist);
  1422. }
  1423. /* Flush multicast filter */
  1424. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
  1425. /* Remove flow steering rules for the port*/
  1426. if (mdev->dev->caps.steering_mode ==
  1427. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1428. ASSERT_RTNL();
  1429. list_for_each_entry_safe(flow, tmp_flow,
  1430. &priv->ethtool_list, list) {
  1431. mlx4_flow_detach(mdev->dev, flow->id);
  1432. list_del(&flow->list);
  1433. }
  1434. }
  1435. mlx4_en_destroy_drop_qp(priv);
  1436. /* Free TX Rings */
  1437. for (i = 0; i < priv->tx_ring_num; i++) {
  1438. mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]);
  1439. mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]);
  1440. }
  1441. msleep(10);
  1442. for (i = 0; i < priv->tx_ring_num; i++)
  1443. mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]);
  1444. /* Free RSS qps */
  1445. mlx4_en_release_rss_steer(priv);
  1446. /* Unregister Mac address for the port */
  1447. mlx4_en_put_qp(priv);
  1448. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN))
  1449. mdev->mac_removed[priv->port] = 1;
  1450. /* Free RX Rings */
  1451. for (i = 0; i < priv->rx_ring_num; i++) {
  1452. mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
  1453. while (test_bit(NAPI_STATE_SCHED, &priv->rx_cq[i].napi.state))
  1454. msleep(1);
  1455. mlx4_en_deactivate_cq(priv, &priv->rx_cq[i]);
  1456. }
  1457. /* close port*/
  1458. mlx4_CLOSE_PORT(mdev->dev, priv->port);
  1459. }
  1460. static void mlx4_en_restart(struct work_struct *work)
  1461. {
  1462. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1463. watchdog_task);
  1464. struct mlx4_en_dev *mdev = priv->mdev;
  1465. struct net_device *dev = priv->dev;
  1466. en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
  1467. mutex_lock(&mdev->state_lock);
  1468. if (priv->port_up) {
  1469. mlx4_en_stop_port(dev, 1);
  1470. if (mlx4_en_start_port(dev))
  1471. en_err(priv, "Failed restarting port %d\n", priv->port);
  1472. }
  1473. mutex_unlock(&mdev->state_lock);
  1474. }
  1475. static void mlx4_en_clear_stats(struct net_device *dev)
  1476. {
  1477. struct mlx4_en_priv *priv = netdev_priv(dev);
  1478. struct mlx4_en_dev *mdev = priv->mdev;
  1479. int i;
  1480. if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
  1481. en_dbg(HW, priv, "Failed dumping statistics\n");
  1482. memset(&priv->stats, 0, sizeof(priv->stats));
  1483. memset(&priv->pstats, 0, sizeof(priv->pstats));
  1484. memset(&priv->pkstats, 0, sizeof(priv->pkstats));
  1485. memset(&priv->port_stats, 0, sizeof(priv->port_stats));
  1486. for (i = 0; i < priv->tx_ring_num; i++) {
  1487. priv->tx_ring[i].bytes = 0;
  1488. priv->tx_ring[i].packets = 0;
  1489. priv->tx_ring[i].tx_csum = 0;
  1490. }
  1491. for (i = 0; i < priv->rx_ring_num; i++) {
  1492. priv->rx_ring[i].bytes = 0;
  1493. priv->rx_ring[i].packets = 0;
  1494. priv->rx_ring[i].csum_ok = 0;
  1495. priv->rx_ring[i].csum_none = 0;
  1496. }
  1497. }
  1498. static int mlx4_en_open(struct net_device *dev)
  1499. {
  1500. struct mlx4_en_priv *priv = netdev_priv(dev);
  1501. struct mlx4_en_dev *mdev = priv->mdev;
  1502. int err = 0;
  1503. mutex_lock(&mdev->state_lock);
  1504. if (!mdev->device_up) {
  1505. en_err(priv, "Cannot open - device down/disabled\n");
  1506. err = -EBUSY;
  1507. goto out;
  1508. }
  1509. /* Reset HW statistics and SW counters */
  1510. mlx4_en_clear_stats(dev);
  1511. err = mlx4_en_start_port(dev);
  1512. if (err)
  1513. en_err(priv, "Failed starting port:%d\n", priv->port);
  1514. out:
  1515. mutex_unlock(&mdev->state_lock);
  1516. return err;
  1517. }
  1518. static int mlx4_en_close(struct net_device *dev)
  1519. {
  1520. struct mlx4_en_priv *priv = netdev_priv(dev);
  1521. struct mlx4_en_dev *mdev = priv->mdev;
  1522. en_dbg(IFDOWN, priv, "Close port called\n");
  1523. mutex_lock(&mdev->state_lock);
  1524. mlx4_en_stop_port(dev, 0);
  1525. netif_carrier_off(dev);
  1526. mutex_unlock(&mdev->state_lock);
  1527. return 0;
  1528. }
  1529. void mlx4_en_free_resources(struct mlx4_en_priv *priv)
  1530. {
  1531. int i;
  1532. #ifdef CONFIG_RFS_ACCEL
  1533. free_irq_cpu_rmap(priv->dev->rx_cpu_rmap);
  1534. priv->dev->rx_cpu_rmap = NULL;
  1535. #endif
  1536. for (i = 0; i < priv->tx_ring_num; i++) {
  1537. if (priv->tx_ring[i].tx_info)
  1538. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1539. if (priv->tx_cq[i].buf)
  1540. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1541. }
  1542. for (i = 0; i < priv->rx_ring_num; i++) {
  1543. if (priv->rx_ring[i].rx_info)
  1544. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1545. priv->prof->rx_ring_size, priv->stride);
  1546. if (priv->rx_cq[i].buf)
  1547. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1548. }
  1549. if (priv->base_tx_qpn) {
  1550. mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num);
  1551. priv->base_tx_qpn = 0;
  1552. }
  1553. }
  1554. int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
  1555. {
  1556. struct mlx4_en_port_profile *prof = priv->prof;
  1557. int i;
  1558. int err;
  1559. err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn);
  1560. if (err) {
  1561. en_err(priv, "failed reserving range for TX rings\n");
  1562. return err;
  1563. }
  1564. /* Create tx Rings */
  1565. for (i = 0; i < priv->tx_ring_num; i++) {
  1566. if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
  1567. prof->tx_ring_size, i, TX))
  1568. goto err;
  1569. if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], priv->base_tx_qpn + i,
  1570. prof->tx_ring_size, TXBB_SIZE))
  1571. goto err;
  1572. }
  1573. /* Create rx Rings */
  1574. for (i = 0; i < priv->rx_ring_num; i++) {
  1575. if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
  1576. prof->rx_ring_size, i, RX))
  1577. goto err;
  1578. if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
  1579. prof->rx_ring_size, priv->stride))
  1580. goto err;
  1581. }
  1582. #ifdef CONFIG_RFS_ACCEL
  1583. if (priv->mdev->dev->caps.comp_pool) {
  1584. priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->mdev->dev->caps.comp_pool);
  1585. if (!priv->dev->rx_cpu_rmap)
  1586. goto err;
  1587. }
  1588. #endif
  1589. return 0;
  1590. err:
  1591. en_err(priv, "Failed to allocate NIC resources\n");
  1592. return -ENOMEM;
  1593. }
  1594. void mlx4_en_destroy_netdev(struct net_device *dev)
  1595. {
  1596. struct mlx4_en_priv *priv = netdev_priv(dev);
  1597. struct mlx4_en_dev *mdev = priv->mdev;
  1598. en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
  1599. /* Unregister device - this will close the port if it was up */
  1600. if (priv->registered)
  1601. unregister_netdev(dev);
  1602. if (priv->allocated)
  1603. mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
  1604. cancel_delayed_work(&priv->stats_task);
  1605. cancel_delayed_work(&priv->service_task);
  1606. /* flush any pending task for this netdev */
  1607. flush_workqueue(mdev->workqueue);
  1608. /* Detach the netdev so tasks would not attempt to access it */
  1609. mutex_lock(&mdev->state_lock);
  1610. mdev->pndev[priv->port] = NULL;
  1611. mutex_unlock(&mdev->state_lock);
  1612. mlx4_en_free_resources(priv);
  1613. kfree(priv->tx_ring);
  1614. kfree(priv->tx_cq);
  1615. free_netdev(dev);
  1616. }
  1617. static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
  1618. {
  1619. struct mlx4_en_priv *priv = netdev_priv(dev);
  1620. struct mlx4_en_dev *mdev = priv->mdev;
  1621. int err = 0;
  1622. en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
  1623. dev->mtu, new_mtu);
  1624. if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
  1625. en_err(priv, "Bad MTU size:%d.\n", new_mtu);
  1626. return -EPERM;
  1627. }
  1628. dev->mtu = new_mtu;
  1629. if (netif_running(dev)) {
  1630. mutex_lock(&mdev->state_lock);
  1631. if (!mdev->device_up) {
  1632. /* NIC is probably restarting - let watchdog task reset
  1633. * the port */
  1634. en_dbg(DRV, priv, "Change MTU called with card down!?\n");
  1635. } else {
  1636. mlx4_en_stop_port(dev, 1);
  1637. err = mlx4_en_start_port(dev);
  1638. if (err) {
  1639. en_err(priv, "Failed restarting port:%d\n",
  1640. priv->port);
  1641. queue_work(mdev->workqueue, &priv->watchdog_task);
  1642. }
  1643. }
  1644. mutex_unlock(&mdev->state_lock);
  1645. }
  1646. return 0;
  1647. }
  1648. static int mlx4_en_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
  1649. {
  1650. struct mlx4_en_priv *priv = netdev_priv(dev);
  1651. struct mlx4_en_dev *mdev = priv->mdev;
  1652. struct hwtstamp_config config;
  1653. if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
  1654. return -EFAULT;
  1655. /* reserved for future extensions */
  1656. if (config.flags)
  1657. return -EINVAL;
  1658. /* device doesn't support time stamping */
  1659. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
  1660. return -EINVAL;
  1661. /* TX HW timestamp */
  1662. switch (config.tx_type) {
  1663. case HWTSTAMP_TX_OFF:
  1664. case HWTSTAMP_TX_ON:
  1665. break;
  1666. default:
  1667. return -ERANGE;
  1668. }
  1669. /* RX HW timestamp */
  1670. switch (config.rx_filter) {
  1671. case HWTSTAMP_FILTER_NONE:
  1672. break;
  1673. case HWTSTAMP_FILTER_ALL:
  1674. case HWTSTAMP_FILTER_SOME:
  1675. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  1676. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  1677. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  1678. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  1679. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  1680. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  1681. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  1682. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  1683. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  1684. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  1685. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  1686. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  1687. config.rx_filter = HWTSTAMP_FILTER_ALL;
  1688. break;
  1689. default:
  1690. return -ERANGE;
  1691. }
  1692. if (mlx4_en_timestamp_config(dev, config.tx_type, config.rx_filter)) {
  1693. config.tx_type = HWTSTAMP_TX_OFF;
  1694. config.rx_filter = HWTSTAMP_FILTER_NONE;
  1695. }
  1696. return copy_to_user(ifr->ifr_data, &config,
  1697. sizeof(config)) ? -EFAULT : 0;
  1698. }
  1699. static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  1700. {
  1701. switch (cmd) {
  1702. case SIOCSHWTSTAMP:
  1703. return mlx4_en_hwtstamp_ioctl(dev, ifr);
  1704. default:
  1705. return -EOPNOTSUPP;
  1706. }
  1707. }
  1708. static int mlx4_en_set_features(struct net_device *netdev,
  1709. netdev_features_t features)
  1710. {
  1711. struct mlx4_en_priv *priv = netdev_priv(netdev);
  1712. if (features & NETIF_F_LOOPBACK)
  1713. priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1714. else
  1715. priv->ctrl_flags &=
  1716. cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1717. mlx4_en_update_loopback_state(netdev, features);
  1718. return 0;
  1719. }
  1720. static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
  1721. {
  1722. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1723. struct mlx4_en_dev *mdev = en_priv->mdev;
  1724. u64 mac_u64 = mlx4_en_mac_to_u64(mac);
  1725. if (!is_valid_ether_addr(mac))
  1726. return -EINVAL;
  1727. return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac_u64);
  1728. }
  1729. static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos)
  1730. {
  1731. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1732. struct mlx4_en_dev *mdev = en_priv->mdev;
  1733. return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos);
  1734. }
  1735. static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
  1736. {
  1737. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1738. struct mlx4_en_dev *mdev = en_priv->mdev;
  1739. return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
  1740. }
  1741. static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
  1742. {
  1743. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1744. struct mlx4_en_dev *mdev = en_priv->mdev;
  1745. return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
  1746. }
  1747. static const struct net_device_ops mlx4_netdev_ops = {
  1748. .ndo_open = mlx4_en_open,
  1749. .ndo_stop = mlx4_en_close,
  1750. .ndo_start_xmit = mlx4_en_xmit,
  1751. .ndo_select_queue = mlx4_en_select_queue,
  1752. .ndo_get_stats = mlx4_en_get_stats,
  1753. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  1754. .ndo_set_mac_address = mlx4_en_set_mac,
  1755. .ndo_validate_addr = eth_validate_addr,
  1756. .ndo_change_mtu = mlx4_en_change_mtu,
  1757. .ndo_do_ioctl = mlx4_en_ioctl,
  1758. .ndo_tx_timeout = mlx4_en_tx_timeout,
  1759. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  1760. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  1761. #ifdef CONFIG_NET_POLL_CONTROLLER
  1762. .ndo_poll_controller = mlx4_en_netpoll,
  1763. #endif
  1764. .ndo_set_features = mlx4_en_set_features,
  1765. .ndo_setup_tc = mlx4_en_setup_tc,
  1766. #ifdef CONFIG_RFS_ACCEL
  1767. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  1768. #endif
  1769. };
  1770. static const struct net_device_ops mlx4_netdev_ops_master = {
  1771. .ndo_open = mlx4_en_open,
  1772. .ndo_stop = mlx4_en_close,
  1773. .ndo_start_xmit = mlx4_en_xmit,
  1774. .ndo_select_queue = mlx4_en_select_queue,
  1775. .ndo_get_stats = mlx4_en_get_stats,
  1776. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  1777. .ndo_set_mac_address = mlx4_en_set_mac,
  1778. .ndo_validate_addr = eth_validate_addr,
  1779. .ndo_change_mtu = mlx4_en_change_mtu,
  1780. .ndo_tx_timeout = mlx4_en_tx_timeout,
  1781. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  1782. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  1783. .ndo_set_vf_mac = mlx4_en_set_vf_mac,
  1784. .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
  1785. .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
  1786. .ndo_get_vf_config = mlx4_en_get_vf_config,
  1787. #ifdef CONFIG_NET_POLL_CONTROLLER
  1788. .ndo_poll_controller = mlx4_en_netpoll,
  1789. #endif
  1790. .ndo_set_features = mlx4_en_set_features,
  1791. .ndo_setup_tc = mlx4_en_setup_tc,
  1792. #ifdef CONFIG_RFS_ACCEL
  1793. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  1794. #endif
  1795. };
  1796. int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
  1797. struct mlx4_en_port_profile *prof)
  1798. {
  1799. struct net_device *dev;
  1800. struct mlx4_en_priv *priv;
  1801. int i;
  1802. int err;
  1803. dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
  1804. MAX_TX_RINGS, MAX_RX_RINGS);
  1805. if (dev == NULL)
  1806. return -ENOMEM;
  1807. netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
  1808. netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
  1809. SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev);
  1810. dev->dev_id = port - 1;
  1811. /*
  1812. * Initialize driver private data
  1813. */
  1814. priv = netdev_priv(dev);
  1815. memset(priv, 0, sizeof(struct mlx4_en_priv));
  1816. priv->dev = dev;
  1817. priv->mdev = mdev;
  1818. priv->ddev = &mdev->pdev->dev;
  1819. priv->prof = prof;
  1820. priv->port = port;
  1821. priv->port_up = false;
  1822. priv->flags = prof->flags;
  1823. priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
  1824. MLX4_WQE_CTRL_SOLICITED);
  1825. priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
  1826. priv->tx_ring_num = prof->tx_ring_num;
  1827. priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) * MAX_TX_RINGS,
  1828. GFP_KERNEL);
  1829. if (!priv->tx_ring) {
  1830. err = -ENOMEM;
  1831. goto out;
  1832. }
  1833. priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * MAX_TX_RINGS,
  1834. GFP_KERNEL);
  1835. if (!priv->tx_cq) {
  1836. err = -ENOMEM;
  1837. goto out;
  1838. }
  1839. priv->rx_ring_num = prof->rx_ring_num;
  1840. priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
  1841. priv->mac_index = -1;
  1842. priv->msg_enable = MLX4_EN_MSG_LEVEL;
  1843. spin_lock_init(&priv->stats_lock);
  1844. INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
  1845. INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
  1846. INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
  1847. INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
  1848. INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
  1849. #ifdef CONFIG_MLX4_EN_DCB
  1850. if (!mlx4_is_slave(priv->mdev->dev)) {
  1851. if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) {
  1852. dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
  1853. } else {
  1854. en_info(priv, "enabling only PFC DCB ops\n");
  1855. dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
  1856. }
  1857. }
  1858. #endif
  1859. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
  1860. INIT_HLIST_HEAD(&priv->mac_hash[i]);
  1861. /* Query for default mac and max mtu */
  1862. priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
  1863. /* Set default MAC */
  1864. dev->addr_len = ETH_ALEN;
  1865. mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
  1866. if (!is_valid_ether_addr(dev->dev_addr)) {
  1867. en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
  1868. priv->port, dev->dev_addr);
  1869. err = -EINVAL;
  1870. goto out;
  1871. }
  1872. memcpy(priv->prev_mac, dev->dev_addr, sizeof(priv->prev_mac));
  1873. priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  1874. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  1875. err = mlx4_en_alloc_resources(priv);
  1876. if (err)
  1877. goto out;
  1878. #ifdef CONFIG_RFS_ACCEL
  1879. INIT_LIST_HEAD(&priv->filters);
  1880. spin_lock_init(&priv->filters_lock);
  1881. #endif
  1882. /* Initialize time stamping config */
  1883. priv->hwtstamp_config.flags = 0;
  1884. priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
  1885. priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
  1886. /* Allocate page for receive rings */
  1887. err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
  1888. MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
  1889. if (err) {
  1890. en_err(priv, "Failed to allocate page for rx qps\n");
  1891. goto out;
  1892. }
  1893. priv->allocated = 1;
  1894. /*
  1895. * Initialize netdev entry points
  1896. */
  1897. if (mlx4_is_master(priv->mdev->dev))
  1898. dev->netdev_ops = &mlx4_netdev_ops_master;
  1899. else
  1900. dev->netdev_ops = &mlx4_netdev_ops;
  1901. dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
  1902. netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
  1903. netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
  1904. SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops);
  1905. /*
  1906. * Set driver features
  1907. */
  1908. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
  1909. if (mdev->LSO_support)
  1910. dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
  1911. dev->vlan_features = dev->hw_features;
  1912. dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
  1913. dev->features = dev->hw_features | NETIF_F_HIGHDMA |
  1914. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
  1915. NETIF_F_HW_VLAN_CTAG_FILTER;
  1916. dev->hw_features |= NETIF_F_LOOPBACK;
  1917. if (mdev->dev->caps.steering_mode ==
  1918. MLX4_STEERING_MODE_DEVICE_MANAGED)
  1919. dev->hw_features |= NETIF_F_NTUPLE;
  1920. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  1921. dev->priv_flags |= IFF_UNICAST_FLT;
  1922. mdev->pndev[port] = dev;
  1923. netif_carrier_off(dev);
  1924. err = register_netdev(dev);
  1925. if (err) {
  1926. en_err(priv, "Netdev registration failed for port %d\n", port);
  1927. goto out;
  1928. }
  1929. priv->registered = 1;
  1930. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
  1931. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  1932. mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
  1933. /* Configure port */
  1934. mlx4_en_calc_rx_buf(dev);
  1935. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1936. priv->rx_skb_size + ETH_FCS_LEN,
  1937. prof->tx_pause, prof->tx_ppp,
  1938. prof->rx_pause, prof->rx_ppp);
  1939. if (err) {
  1940. en_err(priv, "Failed setting port general configurations "
  1941. "for port %d, with error %d\n", priv->port, err);
  1942. goto out;
  1943. }
  1944. /* Init port */
  1945. en_warn(priv, "Initializing port\n");
  1946. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1947. if (err) {
  1948. en_err(priv, "Failed Initializing port\n");
  1949. goto out;
  1950. }
  1951. mlx4_en_set_default_moderation(priv);
  1952. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1953. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1954. queue_delayed_work(mdev->workqueue, &priv->service_task,
  1955. SERVICE_TASK_DELAY);
  1956. return 0;
  1957. out:
  1958. mlx4_en_destroy_netdev(dev);
  1959. return err;
  1960. }