nouveau_ttm.c 11 KB

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  1. /*
  2. * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA,
  3. * All Rights Reserved.
  4. * Copyright (c) 2009 VMware, Inc., Palo Alto, CA., USA,
  5. * All Rights Reserved.
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a
  8. * copy of this software and associated documentation files (the "Software"),
  9. * to deal in the Software without restriction, including without limitation
  10. * the rights to use, copy, modify, merge, publish, distribute, sub license,
  11. * and/or sell copies of the Software, and to permit persons to whom the
  12. * Software is furnished to do so, subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. */
  26. #include <subdev/fb.h>
  27. #include <subdev/vm.h>
  28. #include <subdev/instmem.h>
  29. #include "nouveau_drm.h"
  30. #include "nouveau_ttm.h"
  31. #include "nouveau_gem.h"
  32. static int
  33. nouveau_vram_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
  34. {
  35. struct nouveau_drm *drm = nouveau_bdev(man->bdev);
  36. struct nouveau_fb *pfb = nouveau_fb(drm->device);
  37. man->priv = pfb;
  38. return 0;
  39. }
  40. static int
  41. nouveau_vram_manager_fini(struct ttm_mem_type_manager *man)
  42. {
  43. man->priv = NULL;
  44. return 0;
  45. }
  46. static inline void
  47. nouveau_mem_node_cleanup(struct nouveau_mem *node)
  48. {
  49. if (node->vma[0].node) {
  50. nouveau_vm_unmap(&node->vma[0]);
  51. nouveau_vm_put(&node->vma[0]);
  52. }
  53. if (node->vma[1].node) {
  54. nouveau_vm_unmap(&node->vma[1]);
  55. nouveau_vm_put(&node->vma[1]);
  56. }
  57. }
  58. static void
  59. nouveau_vram_manager_del(struct ttm_mem_type_manager *man,
  60. struct ttm_mem_reg *mem)
  61. {
  62. struct nouveau_drm *drm = nouveau_bdev(man->bdev);
  63. struct nouveau_fb *pfb = nouveau_fb(drm->device);
  64. nouveau_mem_node_cleanup(mem->mm_node);
  65. pfb->ram.put(pfb, (struct nouveau_mem **)&mem->mm_node);
  66. }
  67. static int
  68. nouveau_vram_manager_new(struct ttm_mem_type_manager *man,
  69. struct ttm_buffer_object *bo,
  70. struct ttm_placement *placement,
  71. struct ttm_mem_reg *mem)
  72. {
  73. struct nouveau_drm *drm = nouveau_bdev(man->bdev);
  74. struct nouveau_fb *pfb = nouveau_fb(drm->device);
  75. struct nouveau_bo *nvbo = nouveau_bo(bo);
  76. struct nouveau_mem *node;
  77. u32 size_nc = 0;
  78. int ret;
  79. if (nvbo->tile_flags & NOUVEAU_GEM_TILE_NONCONTIG)
  80. size_nc = 1 << nvbo->page_shift;
  81. ret = pfb->ram.get(pfb, mem->num_pages << PAGE_SHIFT,
  82. mem->page_alignment << PAGE_SHIFT, size_nc,
  83. (nvbo->tile_flags >> 8) & 0x3ff, &node);
  84. if (ret) {
  85. mem->mm_node = NULL;
  86. return (ret == -ENOSPC) ? 0 : ret;
  87. }
  88. node->page_shift = nvbo->page_shift;
  89. mem->mm_node = node;
  90. mem->start = node->offset >> PAGE_SHIFT;
  91. return 0;
  92. }
  93. static void
  94. nouveau_vram_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
  95. {
  96. struct nouveau_fb *pfb = man->priv;
  97. struct nouveau_mm *mm = &pfb->vram;
  98. struct nouveau_mm_node *r;
  99. u32 total = 0, free = 0;
  100. mutex_lock(&mm->mutex);
  101. list_for_each_entry(r, &mm->nodes, nl_entry) {
  102. printk(KERN_DEBUG "%s %d: 0x%010llx 0x%010llx\n",
  103. prefix, r->type, ((u64)r->offset << 12),
  104. (((u64)r->offset + r->length) << 12));
  105. total += r->length;
  106. if (!r->type)
  107. free += r->length;
  108. }
  109. mutex_unlock(&mm->mutex);
  110. printk(KERN_DEBUG "%s total: 0x%010llx free: 0x%010llx\n",
  111. prefix, (u64)total << 12, (u64)free << 12);
  112. printk(KERN_DEBUG "%s block: 0x%08x\n",
  113. prefix, mm->block_size << 12);
  114. }
  115. const struct ttm_mem_type_manager_func nouveau_vram_manager = {
  116. nouveau_vram_manager_init,
  117. nouveau_vram_manager_fini,
  118. nouveau_vram_manager_new,
  119. nouveau_vram_manager_del,
  120. nouveau_vram_manager_debug
  121. };
  122. static int
  123. nouveau_gart_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
  124. {
  125. return 0;
  126. }
  127. static int
  128. nouveau_gart_manager_fini(struct ttm_mem_type_manager *man)
  129. {
  130. return 0;
  131. }
  132. static void
  133. nouveau_gart_manager_del(struct ttm_mem_type_manager *man,
  134. struct ttm_mem_reg *mem)
  135. {
  136. nouveau_mem_node_cleanup(mem->mm_node);
  137. kfree(mem->mm_node);
  138. mem->mm_node = NULL;
  139. }
  140. static int
  141. nouveau_gart_manager_new(struct ttm_mem_type_manager *man,
  142. struct ttm_buffer_object *bo,
  143. struct ttm_placement *placement,
  144. struct ttm_mem_reg *mem)
  145. {
  146. struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
  147. struct nouveau_bo *nvbo = nouveau_bo(bo);
  148. struct nouveau_mem *node;
  149. if (unlikely((mem->num_pages << PAGE_SHIFT) >= 512 * 1024 * 1024))
  150. return -ENOMEM;
  151. node = kzalloc(sizeof(*node), GFP_KERNEL);
  152. if (!node)
  153. return -ENOMEM;
  154. node->page_shift = 12;
  155. switch (nv_device(drm->device)->card_type) {
  156. case NV_50:
  157. if (nv_device(drm->device)->chipset != 0x50)
  158. node->memtype = (nvbo->tile_flags & 0x7f00) >> 8;
  159. break;
  160. case NV_C0:
  161. case NV_D0:
  162. case NV_E0:
  163. node->memtype = (nvbo->tile_flags & 0xff00) >> 8;
  164. break;
  165. default:
  166. break;
  167. }
  168. mem->mm_node = node;
  169. mem->start = 0;
  170. return 0;
  171. }
  172. static void
  173. nouveau_gart_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
  174. {
  175. }
  176. const struct ttm_mem_type_manager_func nouveau_gart_manager = {
  177. nouveau_gart_manager_init,
  178. nouveau_gart_manager_fini,
  179. nouveau_gart_manager_new,
  180. nouveau_gart_manager_del,
  181. nouveau_gart_manager_debug
  182. };
  183. #include <core/subdev/vm/nv04.h>
  184. static int
  185. nv04_gart_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
  186. {
  187. struct nouveau_drm *drm = nouveau_bdev(man->bdev);
  188. struct nouveau_vmmgr *vmm = nouveau_vmmgr(drm->device);
  189. struct nv04_vmmgr_priv *priv = (void *)vmm;
  190. struct nouveau_vm *vm = NULL;
  191. nouveau_vm_ref(priv->vm, &vm, NULL);
  192. man->priv = vm;
  193. return 0;
  194. }
  195. static int
  196. nv04_gart_manager_fini(struct ttm_mem_type_manager *man)
  197. {
  198. struct nouveau_vm *vm = man->priv;
  199. nouveau_vm_ref(NULL, &vm, NULL);
  200. man->priv = NULL;
  201. return 0;
  202. }
  203. static void
  204. nv04_gart_manager_del(struct ttm_mem_type_manager *man, struct ttm_mem_reg *mem)
  205. {
  206. struct nouveau_mem *node = mem->mm_node;
  207. if (node->vma[0].node)
  208. nouveau_vm_put(&node->vma[0]);
  209. kfree(mem->mm_node);
  210. mem->mm_node = NULL;
  211. }
  212. static int
  213. nv04_gart_manager_new(struct ttm_mem_type_manager *man,
  214. struct ttm_buffer_object *bo,
  215. struct ttm_placement *placement,
  216. struct ttm_mem_reg *mem)
  217. {
  218. struct nouveau_mem *node;
  219. int ret;
  220. node = kzalloc(sizeof(*node), GFP_KERNEL);
  221. if (!node)
  222. return -ENOMEM;
  223. node->page_shift = 12;
  224. ret = nouveau_vm_get(man->priv, mem->num_pages << 12, node->page_shift,
  225. NV_MEM_ACCESS_RW, &node->vma[0]);
  226. if (ret) {
  227. kfree(node);
  228. return ret;
  229. }
  230. mem->mm_node = node;
  231. mem->start = node->vma[0].offset >> PAGE_SHIFT;
  232. return 0;
  233. }
  234. static void
  235. nv04_gart_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
  236. {
  237. }
  238. const struct ttm_mem_type_manager_func nv04_gart_manager = {
  239. nv04_gart_manager_init,
  240. nv04_gart_manager_fini,
  241. nv04_gart_manager_new,
  242. nv04_gart_manager_del,
  243. nv04_gart_manager_debug
  244. };
  245. int
  246. nouveau_ttm_mmap(struct file *filp, struct vm_area_struct *vma)
  247. {
  248. struct drm_file *file_priv = filp->private_data;
  249. struct nouveau_drm *drm = nouveau_drm(file_priv->minor->dev);
  250. if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET))
  251. return drm_mmap(filp, vma);
  252. return ttm_bo_mmap(filp, vma, &drm->ttm.bdev);
  253. }
  254. static int
  255. nouveau_ttm_mem_global_init(struct drm_global_reference *ref)
  256. {
  257. return ttm_mem_global_init(ref->object);
  258. }
  259. static void
  260. nouveau_ttm_mem_global_release(struct drm_global_reference *ref)
  261. {
  262. ttm_mem_global_release(ref->object);
  263. }
  264. int
  265. nouveau_ttm_global_init(struct nouveau_drm *drm)
  266. {
  267. struct drm_global_reference *global_ref;
  268. int ret;
  269. global_ref = &drm->ttm.mem_global_ref;
  270. global_ref->global_type = DRM_GLOBAL_TTM_MEM;
  271. global_ref->size = sizeof(struct ttm_mem_global);
  272. global_ref->init = &nouveau_ttm_mem_global_init;
  273. global_ref->release = &nouveau_ttm_mem_global_release;
  274. ret = drm_global_item_ref(global_ref);
  275. if (unlikely(ret != 0)) {
  276. DRM_ERROR("Failed setting up TTM memory accounting\n");
  277. drm->ttm.mem_global_ref.release = NULL;
  278. return ret;
  279. }
  280. drm->ttm.bo_global_ref.mem_glob = global_ref->object;
  281. global_ref = &drm->ttm.bo_global_ref.ref;
  282. global_ref->global_type = DRM_GLOBAL_TTM_BO;
  283. global_ref->size = sizeof(struct ttm_bo_global);
  284. global_ref->init = &ttm_bo_global_init;
  285. global_ref->release = &ttm_bo_global_release;
  286. ret = drm_global_item_ref(global_ref);
  287. if (unlikely(ret != 0)) {
  288. DRM_ERROR("Failed setting up TTM BO subsystem\n");
  289. drm_global_item_unref(&drm->ttm.mem_global_ref);
  290. drm->ttm.mem_global_ref.release = NULL;
  291. return ret;
  292. }
  293. return 0;
  294. }
  295. void
  296. nouveau_ttm_global_release(struct nouveau_drm *drm)
  297. {
  298. if (drm->ttm.mem_global_ref.release == NULL)
  299. return;
  300. drm_global_item_unref(&drm->ttm.bo_global_ref.ref);
  301. drm_global_item_unref(&drm->ttm.mem_global_ref);
  302. drm->ttm.mem_global_ref.release = NULL;
  303. }
  304. int
  305. nouveau_ttm_init(struct nouveau_drm *drm)
  306. {
  307. struct drm_device *dev = drm->dev;
  308. u32 bits;
  309. int ret;
  310. bits = nouveau_vmmgr(drm->device)->dma_bits;
  311. if ( drm->agp.stat == ENABLED ||
  312. !pci_dma_supported(dev->pdev, DMA_BIT_MASK(bits)))
  313. bits = 32;
  314. ret = pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(bits));
  315. if (ret)
  316. return ret;
  317. ret = pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(bits));
  318. if (ret)
  319. pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(32));
  320. ret = nouveau_ttm_global_init(drm);
  321. if (ret)
  322. return ret;
  323. ret = ttm_bo_device_init(&drm->ttm.bdev,
  324. drm->ttm.bo_global_ref.ref.object,
  325. &nouveau_bo_driver, DRM_FILE_PAGE_OFFSET,
  326. bits <= 32 ? true : false);
  327. if (ret) {
  328. NV_ERROR(drm, "error initialising bo driver, %d\n", ret);
  329. return ret;
  330. }
  331. /* VRAM init */
  332. drm->gem.vram_available = nouveau_fb(drm->device)->ram.size;
  333. drm->gem.vram_available -= nouveau_instmem(drm->device)->reserved;
  334. ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_VRAM,
  335. drm->gem.vram_available >> PAGE_SHIFT);
  336. if (ret) {
  337. NV_ERROR(drm, "VRAM mm init failed, %d\n", ret);
  338. return ret;
  339. }
  340. drm->ttm.mtrr = drm_mtrr_add(pci_resource_start(dev->pdev, 1),
  341. pci_resource_len(dev->pdev, 1),
  342. DRM_MTRR_WC);
  343. /* GART init */
  344. if (drm->agp.stat != ENABLED) {
  345. drm->gem.gart_available = nouveau_vmmgr(drm->device)->limit;
  346. if (drm->gem.gart_available > 512 * 1024 * 1024)
  347. drm->gem.gart_available = 512 * 1024 * 1024;
  348. } else {
  349. drm->gem.gart_available = drm->agp.size;
  350. }
  351. ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_TT,
  352. drm->gem.gart_available >> PAGE_SHIFT);
  353. if (ret) {
  354. NV_ERROR(drm, "GART mm init failed, %d\n", ret);
  355. return ret;
  356. }
  357. NV_INFO(drm, "VRAM: %d MiB\n", (u32)(drm->gem.vram_available >> 20));
  358. NV_INFO(drm, "GART: %d MiB\n", (u32)(drm->gem.gart_available >> 20));
  359. return 0;
  360. }
  361. void
  362. nouveau_ttm_fini(struct nouveau_drm *drm)
  363. {
  364. mutex_lock(&drm->dev->struct_mutex);
  365. ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  366. ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_TT);
  367. mutex_unlock(&drm->dev->struct_mutex);
  368. ttm_bo_device_release(&drm->ttm.bdev);
  369. nouveau_ttm_global_release(drm);
  370. if (drm->ttm.mtrr >= 0) {
  371. drm_mtrr_del(drm->ttm.mtrr,
  372. pci_resource_start(drm->dev->pdev, 1),
  373. pci_resource_len(drm->dev->pdev, 1), DRM_MTRR_WC);
  374. drm->ttm.mtrr = -1;
  375. }
  376. }