Kconfig 9.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361
  1. #
  2. # DMA engine configuration
  3. #
  4. menuconfig DMADEVICES
  5. bool "DMA Engine support"
  6. depends on HAS_DMA
  7. help
  8. DMA engines can do asynchronous data transfers without
  9. involving the host CPU. Currently, this framework can be
  10. used to offload memory copies in the network stack and
  11. RAID operations in the MD driver. This menu only presents
  12. DMA Device drivers supported by the configured arch, it may
  13. be empty in some cases.
  14. config DMADEVICES_DEBUG
  15. bool "DMA Engine debugging"
  16. depends on DMADEVICES != n
  17. help
  18. This is an option for use by developers; most people should
  19. say N here. This enables DMA engine core and driver debugging.
  20. config DMADEVICES_VDEBUG
  21. bool "DMA Engine verbose debugging"
  22. depends on DMADEVICES_DEBUG != n
  23. help
  24. This is an option for use by developers; most people should
  25. say N here. This enables deeper (more verbose) debugging of
  26. the DMA engine core and drivers.
  27. if DMADEVICES
  28. comment "DMA Devices"
  29. config INTEL_MID_DMAC
  30. tristate "Intel MID DMA support for Peripheral DMA controllers"
  31. depends on PCI && X86
  32. select DMA_ENGINE
  33. default n
  34. help
  35. Enable support for the Intel(R) MID DMA engine present
  36. in Intel MID chipsets.
  37. Say Y here if you have such a chipset.
  38. If unsure, say N.
  39. config ASYNC_TX_ENABLE_CHANNEL_SWITCH
  40. bool
  41. config AMBA_PL08X
  42. bool "ARM PrimeCell PL080 or PL081 support"
  43. depends on ARM_AMBA
  44. select DMA_ENGINE
  45. select DMA_VIRTUAL_CHANNELS
  46. help
  47. Platform has a PL08x DMAC device
  48. which can provide DMA engine support
  49. config INTEL_IOATDMA
  50. tristate "Intel I/OAT DMA support"
  51. depends on PCI && X86
  52. select DMA_ENGINE
  53. select DCA
  54. help
  55. Enable support for the Intel(R) I/OAT DMA engine present
  56. in recent Intel Xeon chipsets.
  57. Say Y here if you have such a chipset.
  58. If unsure, say N.
  59. config INTEL_IOP_ADMA
  60. tristate "Intel IOP ADMA support"
  61. depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
  62. select DMA_ENGINE
  63. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  64. help
  65. Enable support for the Intel(R) IOP Series RAID engines.
  66. config DW_DMAC
  67. tristate "Synopsys DesignWare AHB DMA support"
  68. depends on GENERIC_HARDIRQS
  69. select DMA_ENGINE
  70. default y if CPU_AT32AP7000
  71. help
  72. Support the Synopsys DesignWare AHB DMA controller. This
  73. can be integrated in chips such as the Atmel AT32ap7000.
  74. config DW_DMAC_BIG_ENDIAN_IO
  75. bool "Use big endian I/O register access"
  76. default y if AVR32
  77. depends on DW_DMAC
  78. help
  79. Say yes here to use big endian I/O access when reading and writing
  80. to the DMA controller registers. This is needed on some platforms,
  81. like the Atmel AVR32 architecture.
  82. If unsure, use the default setting.
  83. config AT_HDMAC
  84. tristate "Atmel AHB DMA support"
  85. depends on ARCH_AT91
  86. select DMA_ENGINE
  87. help
  88. Support the Atmel AHB DMA controller.
  89. config FSL_DMA
  90. tristate "Freescale Elo and Elo Plus DMA support"
  91. depends on FSL_SOC
  92. select DMA_ENGINE
  93. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  94. ---help---
  95. Enable support for the Freescale Elo and Elo Plus DMA controllers.
  96. The Elo is the DMA controller on some 82xx and 83xx parts, and the
  97. Elo Plus is the DMA controller on 85xx and 86xx parts.
  98. config MPC512X_DMA
  99. tristate "Freescale MPC512x built-in DMA engine support"
  100. depends on PPC_MPC512x || PPC_MPC831x
  101. select DMA_ENGINE
  102. ---help---
  103. Enable support for the Freescale MPC512x built-in DMA engine.
  104. source "drivers/dma/bestcomm/Kconfig"
  105. config MV_XOR
  106. bool "Marvell XOR engine support"
  107. depends on PLAT_ORION
  108. select DMA_ENGINE
  109. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  110. ---help---
  111. Enable support for the Marvell XOR engine.
  112. config MX3_IPU
  113. bool "MX3x Image Processing Unit support"
  114. depends on ARCH_MXC
  115. select DMA_ENGINE
  116. default y
  117. help
  118. If you plan to use the Image Processing unit in the i.MX3x, say
  119. Y here. If unsure, select Y.
  120. config MX3_IPU_IRQS
  121. int "Number of dynamically mapped interrupts for IPU"
  122. depends on MX3_IPU
  123. range 2 137
  124. default 4
  125. help
  126. Out of 137 interrupt sources on i.MX31 IPU only very few are used.
  127. To avoid bloating the irq_desc[] array we allocate a sufficient
  128. number of IRQ slots and map them dynamically to specific sources.
  129. config TXX9_DMAC
  130. tristate "Toshiba TXx9 SoC DMA support"
  131. depends on MACH_TX49XX || MACH_TX39XX
  132. select DMA_ENGINE
  133. help
  134. Support the TXx9 SoC internal DMA controller. This can be
  135. integrated in chips such as the Toshiba TX4927/38/39.
  136. config TEGRA20_APB_DMA
  137. bool "NVIDIA Tegra20 APB DMA support"
  138. depends on ARCH_TEGRA
  139. select DMA_ENGINE
  140. help
  141. Support for the NVIDIA Tegra20 APB DMA controller driver. The
  142. DMA controller is having multiple DMA channel which can be
  143. configured for different peripherals like audio, UART, SPI,
  144. I2C etc which is in APB bus.
  145. This DMA controller transfers data from memory to peripheral fifo
  146. or vice versa. It does not support memory to memory data transfer.
  147. source "drivers/dma/sh/Kconfig"
  148. config COH901318
  149. bool "ST-Ericsson COH901318 DMA support"
  150. select DMA_ENGINE
  151. depends on ARCH_U300
  152. help
  153. Enable support for ST-Ericsson COH 901 318 DMA.
  154. config STE_DMA40
  155. bool "ST-Ericsson DMA40 support"
  156. depends on ARCH_U8500
  157. select DMA_ENGINE
  158. help
  159. Support for ST-Ericsson DMA40 controller
  160. config AMCC_PPC440SPE_ADMA
  161. tristate "AMCC PPC440SPe ADMA support"
  162. depends on 440SPe || 440SP
  163. select DMA_ENGINE
  164. select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  165. select ASYNC_TX_ENABLE_CHANNEL_SWITCH
  166. help
  167. Enable support for the AMCC PPC440SPe RAID engines.
  168. config TIMB_DMA
  169. tristate "Timberdale FPGA DMA support"
  170. depends on MFD_TIMBERDALE || HAS_IOMEM
  171. select DMA_ENGINE
  172. help
  173. Enable support for the Timberdale FPGA DMA engine.
  174. config SIRF_DMA
  175. tristate "CSR SiRFprimaII/SiRFmarco DMA support"
  176. depends on ARCH_SIRF
  177. select DMA_ENGINE
  178. help
  179. Enable support for the CSR SiRFprimaII DMA engine.
  180. config TI_EDMA
  181. tristate "TI EDMA support"
  182. depends on ARCH_DAVINCI
  183. select DMA_ENGINE
  184. select DMA_VIRTUAL_CHANNELS
  185. default n
  186. help
  187. Enable support for the TI EDMA controller. This DMA
  188. engine is found on TI DaVinci and AM33xx parts.
  189. config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
  190. bool
  191. config PL330_DMA
  192. tristate "DMA API Driver for PL330"
  193. select DMA_ENGINE
  194. depends on ARM_AMBA
  195. help
  196. Select if your platform has one or more PL330 DMACs.
  197. You need to provide platform specific settings via
  198. platform_data for a dma-pl330 device.
  199. config PCH_DMA
  200. tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
  201. depends on PCI && X86
  202. select DMA_ENGINE
  203. help
  204. Enable support for Intel EG20T PCH DMA engine.
  205. This driver also can be used for LAPIS Semiconductor IOH(Input/
  206. Output Hub), ML7213, ML7223 and ML7831.
  207. ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
  208. for MP(Media Phone) use and ML7831 IOH is for general purpose use.
  209. ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
  210. ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
  211. config IMX_SDMA
  212. tristate "i.MX SDMA support"
  213. depends on ARCH_MXC
  214. select DMA_ENGINE
  215. help
  216. Support the i.MX SDMA engine. This engine is integrated into
  217. Freescale i.MX25/31/35/51/53 chips.
  218. config IMX_DMA
  219. tristate "i.MX DMA support"
  220. depends on ARCH_MXC
  221. select DMA_ENGINE
  222. help
  223. Support the i.MX DMA engine. This engine is integrated into
  224. Freescale i.MX1/21/27 chips.
  225. config MXS_DMA
  226. bool "MXS DMA support"
  227. depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
  228. select STMP_DEVICE
  229. select DMA_ENGINE
  230. help
  231. Support the MXS DMA engine. This engine including APBH-DMA
  232. and APBX-DMA is integrated into Freescale i.MX23/28 chips.
  233. config EP93XX_DMA
  234. bool "Cirrus Logic EP93xx DMA support"
  235. depends on ARCH_EP93XX
  236. select DMA_ENGINE
  237. help
  238. Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
  239. config DMA_SA11X0
  240. tristate "SA-11x0 DMA support"
  241. depends on ARCH_SA1100
  242. select DMA_ENGINE
  243. select DMA_VIRTUAL_CHANNELS
  244. help
  245. Support the DMA engine found on Intel StrongARM SA-1100 and
  246. SA-1110 SoCs. This DMA engine can only be used with on-chip
  247. devices.
  248. config MMP_TDMA
  249. bool "MMP Two-Channel DMA support"
  250. depends on ARCH_MMP
  251. select DMA_ENGINE
  252. help
  253. Support the MMP Two-Channel DMA engine.
  254. This engine used for MMP Audio DMA and pxa910 SQU.
  255. Say Y here if you enabled MMP ADMA, otherwise say N.
  256. config DMA_OMAP
  257. tristate "OMAP DMA support"
  258. depends on ARCH_OMAP
  259. select DMA_ENGINE
  260. select DMA_VIRTUAL_CHANNELS
  261. config MMP_PDMA
  262. bool "MMP PDMA support"
  263. depends on (ARCH_MMP || ARCH_PXA)
  264. select DMA_ENGINE
  265. help
  266. Support the MMP PDMA engine for PXA and MMP platfrom.
  267. config DMA_ENGINE
  268. bool
  269. config DMA_VIRTUAL_CHANNELS
  270. tristate
  271. config DMA_ACPI
  272. def_bool y
  273. depends on ACPI
  274. config DMA_OF
  275. def_bool y
  276. depends on OF
  277. comment "DMA Clients"
  278. depends on DMA_ENGINE
  279. config NET_DMA
  280. bool "Network: TCP receive copy offload"
  281. depends on DMA_ENGINE && NET
  282. default (INTEL_IOATDMA || FSL_DMA)
  283. help
  284. This enables the use of DMA engines in the network stack to
  285. offload receive copy-to-user operations, freeing CPU cycles.
  286. Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
  287. say N.
  288. config ASYNC_TX_DMA
  289. bool "Async_tx: Offload support for the async_tx api"
  290. depends on DMA_ENGINE
  291. help
  292. This allows the async_tx api to take advantage of offload engines for
  293. memcpy, memset, xor, and raid6 p+q operations. If your platform has
  294. a dma engine that can perform raid operations and you have enabled
  295. MD_RAID456 say Y.
  296. If unsure, say N.
  297. config DMATEST
  298. tristate "DMA Test client"
  299. depends on DMA_ENGINE
  300. help
  301. Simple DMA test client. Say N unless you're debugging a
  302. DMA Device driver.
  303. endif