exynos-cpufreq.c 8.0 KB

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  1. /*
  2. * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  3. * http://www.samsung.com
  4. *
  5. * EXYNOS - CPU frequency scaling support for EXYNOS series
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/err.h>
  13. #include <linux/clk.h>
  14. #include <linux/io.h>
  15. #include <linux/slab.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/cpufreq.h>
  18. #include <linux/suspend.h>
  19. #include <plat/cpu.h>
  20. #include "exynos-cpufreq.h"
  21. static struct exynos_dvfs_info *exynos_info;
  22. static struct regulator *arm_regulator;
  23. static struct cpufreq_freqs freqs;
  24. static unsigned int locking_frequency;
  25. static bool frequency_locked;
  26. static DEFINE_MUTEX(cpufreq_lock);
  27. static int exynos_verify_speed(struct cpufreq_policy *policy)
  28. {
  29. return cpufreq_frequency_table_verify(policy,
  30. exynos_info->freq_table);
  31. }
  32. static unsigned int exynos_getspeed(unsigned int cpu)
  33. {
  34. return clk_get_rate(exynos_info->cpu_clk) / 1000;
  35. }
  36. static int exynos_cpufreq_get_index(unsigned int freq)
  37. {
  38. struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
  39. int index;
  40. for (index = 0;
  41. freq_table[index].frequency != CPUFREQ_TABLE_END; index++)
  42. if (freq_table[index].frequency == freq)
  43. break;
  44. if (freq_table[index].frequency == CPUFREQ_TABLE_END)
  45. return -EINVAL;
  46. return index;
  47. }
  48. static int exynos_cpufreq_scale(unsigned int target_freq)
  49. {
  50. struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
  51. unsigned int *volt_table = exynos_info->volt_table;
  52. struct cpufreq_policy *policy = cpufreq_cpu_get(0);
  53. unsigned int arm_volt, safe_arm_volt = 0;
  54. unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
  55. int index, old_index;
  56. int ret = 0;
  57. freqs.old = policy->cur;
  58. freqs.new = target_freq;
  59. if (freqs.new == freqs.old)
  60. goto out;
  61. /*
  62. * The policy max have been changed so that we cannot get proper
  63. * old_index with cpufreq_frequency_table_target(). Thus, ignore
  64. * policy and get the index from the raw freqeuncy table.
  65. */
  66. old_index = exynos_cpufreq_get_index(freqs.old);
  67. if (old_index < 0) {
  68. ret = old_index;
  69. goto out;
  70. }
  71. index = exynos_cpufreq_get_index(target_freq);
  72. if (index < 0) {
  73. ret = index;
  74. goto out;
  75. }
  76. /*
  77. * ARM clock source will be changed APLL to MPLL temporary
  78. * To support this level, need to control regulator for
  79. * required voltage level
  80. */
  81. if (exynos_info->need_apll_change != NULL) {
  82. if (exynos_info->need_apll_change(old_index, index) &&
  83. (freq_table[index].frequency < mpll_freq_khz) &&
  84. (freq_table[old_index].frequency < mpll_freq_khz))
  85. safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
  86. }
  87. arm_volt = volt_table[index];
  88. cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
  89. /* When the new frequency is higher than current frequency */
  90. if ((freqs.new > freqs.old) && !safe_arm_volt) {
  91. /* Firstly, voltage up to increase frequency */
  92. ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
  93. if (ret) {
  94. pr_err("%s: failed to set cpu voltage to %d\n",
  95. __func__, arm_volt);
  96. goto out;
  97. }
  98. }
  99. if (safe_arm_volt) {
  100. ret = regulator_set_voltage(arm_regulator, safe_arm_volt,
  101. safe_arm_volt);
  102. if (ret) {
  103. pr_err("%s: failed to set cpu voltage to %d\n",
  104. __func__, safe_arm_volt);
  105. goto out;
  106. }
  107. }
  108. exynos_info->set_freq(old_index, index);
  109. cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
  110. /* When the new frequency is lower than current frequency */
  111. if ((freqs.new < freqs.old) ||
  112. ((freqs.new > freqs.old) && safe_arm_volt)) {
  113. /* down the voltage after frequency change */
  114. regulator_set_voltage(arm_regulator, arm_volt,
  115. arm_volt);
  116. if (ret) {
  117. pr_err("%s: failed to set cpu voltage to %d\n",
  118. __func__, arm_volt);
  119. goto out;
  120. }
  121. }
  122. out:
  123. cpufreq_cpu_put(policy);
  124. return ret;
  125. }
  126. static int exynos_target(struct cpufreq_policy *policy,
  127. unsigned int target_freq,
  128. unsigned int relation)
  129. {
  130. struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
  131. unsigned int index;
  132. unsigned int new_freq;
  133. int ret = 0;
  134. mutex_lock(&cpufreq_lock);
  135. if (frequency_locked)
  136. goto out;
  137. if (cpufreq_frequency_table_target(policy, freq_table,
  138. target_freq, relation, &index)) {
  139. ret = -EINVAL;
  140. goto out;
  141. }
  142. new_freq = freq_table[index].frequency;
  143. ret = exynos_cpufreq_scale(new_freq);
  144. out:
  145. mutex_unlock(&cpufreq_lock);
  146. return ret;
  147. }
  148. #ifdef CONFIG_PM
  149. static int exynos_cpufreq_suspend(struct cpufreq_policy *policy)
  150. {
  151. return 0;
  152. }
  153. static int exynos_cpufreq_resume(struct cpufreq_policy *policy)
  154. {
  155. return 0;
  156. }
  157. #endif
  158. /**
  159. * exynos_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume
  160. * context
  161. * @notifier
  162. * @pm_event
  163. * @v
  164. *
  165. * While frequency_locked == true, target() ignores every frequency but
  166. * locking_frequency. The locking_frequency value is the initial frequency,
  167. * which is set by the bootloader. In order to eliminate possible
  168. * inconsistency in clock values, we save and restore frequencies during
  169. * suspend and resume and block CPUFREQ activities. Note that the standard
  170. * suspend/resume cannot be used as they are too deep (syscore_ops) for
  171. * regulator actions.
  172. */
  173. static int exynos_cpufreq_pm_notifier(struct notifier_block *notifier,
  174. unsigned long pm_event, void *v)
  175. {
  176. int ret;
  177. switch (pm_event) {
  178. case PM_SUSPEND_PREPARE:
  179. mutex_lock(&cpufreq_lock);
  180. frequency_locked = true;
  181. mutex_unlock(&cpufreq_lock);
  182. ret = exynos_cpufreq_scale(locking_frequency);
  183. if (ret < 0)
  184. return NOTIFY_BAD;
  185. break;
  186. case PM_POST_SUSPEND:
  187. mutex_lock(&cpufreq_lock);
  188. frequency_locked = false;
  189. mutex_unlock(&cpufreq_lock);
  190. break;
  191. }
  192. return NOTIFY_OK;
  193. }
  194. static struct notifier_block exynos_cpufreq_nb = {
  195. .notifier_call = exynos_cpufreq_pm_notifier,
  196. };
  197. static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
  198. {
  199. policy->cur = policy->min = policy->max = exynos_getspeed(policy->cpu);
  200. cpufreq_frequency_table_get_attr(exynos_info->freq_table, policy->cpu);
  201. /* set the transition latency value */
  202. policy->cpuinfo.transition_latency = 100000;
  203. cpumask_setall(policy->cpus);
  204. return cpufreq_frequency_table_cpuinfo(policy, exynos_info->freq_table);
  205. }
  206. static int exynos_cpufreq_cpu_exit(struct cpufreq_policy *policy)
  207. {
  208. cpufreq_frequency_table_put_attr(policy->cpu);
  209. return 0;
  210. }
  211. static struct freq_attr *exynos_cpufreq_attr[] = {
  212. &cpufreq_freq_attr_scaling_available_freqs,
  213. NULL,
  214. };
  215. static struct cpufreq_driver exynos_driver = {
  216. .flags = CPUFREQ_STICKY,
  217. .verify = exynos_verify_speed,
  218. .target = exynos_target,
  219. .get = exynos_getspeed,
  220. .init = exynos_cpufreq_cpu_init,
  221. .exit = exynos_cpufreq_cpu_exit,
  222. .name = "exynos_cpufreq",
  223. .attr = exynos_cpufreq_attr,
  224. #ifdef CONFIG_PM
  225. .suspend = exynos_cpufreq_suspend,
  226. .resume = exynos_cpufreq_resume,
  227. #endif
  228. };
  229. static int __init exynos_cpufreq_init(void)
  230. {
  231. int ret = -EINVAL;
  232. exynos_info = kzalloc(sizeof(struct exynos_dvfs_info), GFP_KERNEL);
  233. if (!exynos_info)
  234. return -ENOMEM;
  235. if (soc_is_exynos4210())
  236. ret = exynos4210_cpufreq_init(exynos_info);
  237. else if (soc_is_exynos4212() || soc_is_exynos4412())
  238. ret = exynos4x12_cpufreq_init(exynos_info);
  239. else if (soc_is_exynos5250())
  240. ret = exynos5250_cpufreq_init(exynos_info);
  241. else
  242. return 0;
  243. if (ret)
  244. goto err_vdd_arm;
  245. if (exynos_info->set_freq == NULL) {
  246. pr_err("%s: No set_freq function (ERR)\n", __func__);
  247. goto err_vdd_arm;
  248. }
  249. arm_regulator = regulator_get(NULL, "vdd_arm");
  250. if (IS_ERR(arm_regulator)) {
  251. pr_err("%s: failed to get resource vdd_arm\n", __func__);
  252. goto err_vdd_arm;
  253. }
  254. locking_frequency = exynos_getspeed(0);
  255. register_pm_notifier(&exynos_cpufreq_nb);
  256. if (cpufreq_register_driver(&exynos_driver)) {
  257. pr_err("%s: failed to register cpufreq driver\n", __func__);
  258. goto err_cpufreq;
  259. }
  260. return 0;
  261. err_cpufreq:
  262. unregister_pm_notifier(&exynos_cpufreq_nb);
  263. regulator_put(arm_regulator);
  264. err_vdd_arm:
  265. kfree(exynos_info);
  266. pr_debug("%s: failed initialization\n", __func__);
  267. return -EINVAL;
  268. }
  269. late_initcall(exynos_cpufreq_init);