Kconfig 9.7 KB

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  1. menu "Platform support"
  2. source "arch/powerpc/platforms/powernv/Kconfig"
  3. source "arch/powerpc/platforms/pseries/Kconfig"
  4. source "arch/powerpc/platforms/chrp/Kconfig"
  5. source "arch/powerpc/platforms/512x/Kconfig"
  6. source "arch/powerpc/platforms/52xx/Kconfig"
  7. source "arch/powerpc/platforms/powermac/Kconfig"
  8. source "arch/powerpc/platforms/maple/Kconfig"
  9. source "arch/powerpc/platforms/pasemi/Kconfig"
  10. source "arch/powerpc/platforms/ps3/Kconfig"
  11. source "arch/powerpc/platforms/cell/Kconfig"
  12. source "arch/powerpc/platforms/8xx/Kconfig"
  13. source "arch/powerpc/platforms/82xx/Kconfig"
  14. source "arch/powerpc/platforms/83xx/Kconfig"
  15. source "arch/powerpc/platforms/85xx/Kconfig"
  16. source "arch/powerpc/platforms/86xx/Kconfig"
  17. source "arch/powerpc/platforms/embedded6xx/Kconfig"
  18. source "arch/powerpc/platforms/44x/Kconfig"
  19. source "arch/powerpc/platforms/40x/Kconfig"
  20. source "arch/powerpc/platforms/amigaone/Kconfig"
  21. source "arch/powerpc/platforms/wsp/Kconfig"
  22. config KVM_GUEST
  23. bool "KVM Guest support"
  24. default n
  25. select EPAPR_PARAVIRT
  26. ---help---
  27. This option enables various optimizations for running under the KVM
  28. hypervisor. Overhead for the kernel when not running inside KVM should
  29. be minimal.
  30. In case of doubt, say Y
  31. config EPAPR_PARAVIRT
  32. bool "ePAPR para-virtualization support"
  33. default n
  34. help
  35. Enables ePAPR para-virtualization support for guests.
  36. In case of doubt, say Y
  37. config PPC_NATIVE
  38. bool
  39. depends on 6xx || PPC64
  40. help
  41. Support for running natively on the hardware, i.e. without
  42. a hypervisor. This option is not user-selectable but should
  43. be selected by all platforms that need it.
  44. config PPC_OF_BOOT_TRAMPOLINE
  45. bool "Support booting from Open Firmware or yaboot"
  46. depends on 6xx || PPC64
  47. default y
  48. help
  49. Support from booting from Open Firmware or yaboot using an
  50. Open Firmware client interface. This enables the kernel to
  51. communicate with open firmware to retrieve system information
  52. such as the device tree.
  53. In case of doubt, say Y
  54. config UDBG_RTAS_CONSOLE
  55. bool "RTAS based debug console"
  56. depends on PPC_RTAS
  57. default n
  58. config PPC_SMP_MUXED_IPI
  59. bool
  60. help
  61. Select this opton if your platform supports SMP and your
  62. interrupt controller provides less than 4 interrupts to each
  63. cpu. This will enable the generic code to multiplex the 4
  64. messages on to one ipi.
  65. config PPC_UDBG_BEAT
  66. bool "BEAT based debug console"
  67. depends on PPC_CELLEB
  68. default n
  69. config IPIC
  70. bool
  71. default n
  72. config MPIC
  73. bool
  74. default n
  75. config PPC_EPAPR_HV_PIC
  76. bool
  77. default n
  78. select EPAPR_PARAVIRT
  79. config MPIC_WEIRD
  80. bool
  81. default n
  82. config MPIC_MSGR
  83. bool "MPIC message register support"
  84. depends on MPIC
  85. default n
  86. help
  87. Enables support for the MPIC message registers. These
  88. registers are used for inter-processor communication.
  89. config PPC_I8259
  90. bool
  91. default n
  92. config U3_DART
  93. bool
  94. depends on PPC64
  95. default n
  96. config PPC_RTAS
  97. bool
  98. default n
  99. config RTAS_ERROR_LOGGING
  100. bool
  101. depends on PPC_RTAS
  102. default n
  103. config PPC_RTAS_DAEMON
  104. bool
  105. depends on PPC_RTAS
  106. default n
  107. config RTAS_PROC
  108. bool "Proc interface to RTAS"
  109. depends on PPC_RTAS
  110. default y
  111. config RTAS_FLASH
  112. tristate "Firmware flash interface"
  113. depends on PPC64 && RTAS_PROC
  114. config MMIO_NVRAM
  115. bool
  116. default n
  117. config MPIC_U3_HT_IRQS
  118. bool
  119. default n
  120. config MPIC_BROKEN_REGREAD
  121. bool
  122. depends on MPIC
  123. help
  124. This option enables a MPIC driver workaround for some chips
  125. that have a bug that causes some interrupt source information
  126. to not read back properly. It is safe to use on other chips as
  127. well, but enabling it uses about 8KB of memory to keep copies
  128. of the register contents in software.
  129. config IBMVIO
  130. depends on PPC_PSERIES
  131. bool
  132. default y
  133. config IBMEBUS
  134. depends on PPC_PSERIES
  135. bool "Support for GX bus based adapters"
  136. help
  137. Bus device driver for GX bus based adapters.
  138. config PPC_MPC106
  139. bool
  140. default n
  141. config PPC_970_NAP
  142. bool
  143. default n
  144. config PPC_P7_NAP
  145. bool
  146. default n
  147. config PPC_INDIRECT_IO
  148. bool
  149. select GENERIC_IOMAP
  150. config PPC_INDIRECT_PIO
  151. bool
  152. select PPC_INDIRECT_IO
  153. config PPC_INDIRECT_MMIO
  154. bool
  155. select PPC_INDIRECT_IO
  156. config PPC_IO_WORKAROUNDS
  157. bool
  158. source "drivers/cpufreq/Kconfig"
  159. menu "CPU Frequency drivers"
  160. depends on CPU_FREQ
  161. config CPU_FREQ_PMAC
  162. bool "Support for Apple PowerBooks"
  163. depends on ADB_PMU && PPC32
  164. select CPU_FREQ_TABLE
  165. help
  166. This adds support for frequency switching on Apple PowerBooks,
  167. this currently includes some models of iBook & Titanium
  168. PowerBook.
  169. config CPU_FREQ_PMAC64
  170. bool "Support for some Apple G5s"
  171. depends on PPC_PMAC && PPC64
  172. select CPU_FREQ_TABLE
  173. help
  174. This adds support for frequency switching on Apple iMac G5,
  175. and some of the more recent desktop G5 machines as well.
  176. config PPC_PASEMI_CPUFREQ
  177. bool "Support for PA Semi PWRficient"
  178. depends on PPC_PASEMI
  179. default y
  180. select CPU_FREQ_TABLE
  181. help
  182. This adds the support for frequency switching on PA Semi
  183. PWRficient processors.
  184. endmenu
  185. menu "CPUIdle driver"
  186. source "drivers/cpuidle/Kconfig"
  187. endmenu
  188. config PPC601_SYNC_FIX
  189. bool "Workarounds for PPC601 bugs"
  190. depends on 6xx && PPC_PMAC
  191. help
  192. Some versions of the PPC601 (the first PowerPC chip) have bugs which
  193. mean that extra synchronization instructions are required near
  194. certain instructions, typically those that make major changes to the
  195. CPU state. These extra instructions reduce performance slightly.
  196. If you say N here, these extra instructions will not be included,
  197. resulting in a kernel which will run faster but may not run at all
  198. on some systems with the PPC601 chip.
  199. If in doubt, say Y here.
  200. config TAU
  201. bool "On-chip CPU temperature sensor support"
  202. depends on 6xx
  203. help
  204. G3 and G4 processors have an on-chip temperature sensor called the
  205. 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
  206. temperature within 2-4 degrees Celsius. This option shows the current
  207. on-die temperature in /proc/cpuinfo if the cpu supports it.
  208. Unfortunately, on some chip revisions, this sensor is very inaccurate
  209. and in many cases, does not work at all, so don't assume the cpu
  210. temp is actually what /proc/cpuinfo says it is.
  211. config TAU_INT
  212. bool "Interrupt driven TAU driver (DANGEROUS)"
  213. depends on TAU
  214. ---help---
  215. The TAU supports an interrupt driven mode which causes an interrupt
  216. whenever the temperature goes out of range. This is the fastest way
  217. to get notified the temp has exceeded a range. With this option off,
  218. a timer is used to re-check the temperature periodically.
  219. However, on some cpus it appears that the TAU interrupt hardware
  220. is buggy and can cause a situation which would lead unexplained hard
  221. lockups.
  222. Unless you are extending the TAU driver, or enjoy kernel/hardware
  223. debugging, leave this option off.
  224. config TAU_AVERAGE
  225. bool "Average high and low temp"
  226. depends on TAU
  227. ---help---
  228. The TAU hardware can compare the temperature to an upper and lower
  229. bound. The default behavior is to show both the upper and lower
  230. bound in /proc/cpuinfo. If the range is large, the temperature is
  231. either changing a lot, or the TAU hardware is broken (likely on some
  232. G4's). If the range is small (around 4 degrees), the temperature is
  233. relatively stable. If you say Y here, a single temperature value,
  234. halfway between the upper and lower bounds, will be reported in
  235. /proc/cpuinfo.
  236. If in doubt, say N here.
  237. config QUICC_ENGINE
  238. bool "Freescale QUICC Engine (QE) Support"
  239. depends on FSL_SOC && PPC32
  240. select PPC_LIB_RHEAP
  241. select CRC32
  242. help
  243. The QUICC Engine (QE) is a new generation of communications
  244. coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
  245. Selecting this option means that you wish to build a kernel
  246. for a machine with a QE coprocessor.
  247. config QE_GPIO
  248. bool "QE GPIO support"
  249. depends on QUICC_ENGINE
  250. select ARCH_REQUIRE_GPIOLIB
  251. help
  252. Say Y here if you're going to use hardware that connects to the
  253. QE GPIOs.
  254. config CPM2
  255. bool "Enable support for the CPM2 (Communications Processor Module)"
  256. depends on (FSL_SOC_BOOKE && PPC32) || 8260
  257. select CPM
  258. select PPC_LIB_RHEAP
  259. select PPC_PCI_CHOICE
  260. select ARCH_REQUIRE_GPIOLIB
  261. help
  262. The CPM2 (Communications Processor Module) is a coprocessor on
  263. embedded CPUs made by Freescale. Selecting this option means that
  264. you wish to build a kernel for a machine with a CPM2 coprocessor
  265. on it (826x, 827x, 8560).
  266. config AXON_RAM
  267. tristate "Axon DDR2 memory device driver"
  268. depends on PPC_IBM_CELL_BLADE && BLOCK
  269. default m
  270. help
  271. It registers one block device per Axon's DDR2 memory bank found
  272. on a system. Block devices are called axonram?, their major and
  273. minor numbers are available in /proc/devices, /proc/partitions or
  274. in /sys/block/axonram?/dev.
  275. config FSL_ULI1575
  276. bool
  277. default n
  278. select GENERIC_ISA_DMA
  279. help
  280. Supports for the ULI1575 PCIe south bridge that exists on some
  281. Freescale reference boards. The boards all use the ULI in pretty
  282. much the same way.
  283. config CPM
  284. bool
  285. config OF_RTC
  286. bool
  287. help
  288. Uses information from the OF or flattened device tree to instantiate
  289. platform devices for direct mapped RTC chips like the DS1742 or DS1743.
  290. config SIMPLE_GPIO
  291. bool "Support for simple, memory-mapped GPIO controllers"
  292. depends on PPC
  293. select ARCH_REQUIRE_GPIOLIB
  294. help
  295. Say Y here to support simple, memory-mapped GPIO controllers.
  296. These are usually BCSRs used to control board's switches, LEDs,
  297. chip-selects, Ethernet/USB PHY's power and various other small
  298. on-board peripherals.
  299. config MCU_MPC8349EMITX
  300. bool "MPC8349E-mITX MCU driver"
  301. depends on I2C=y && PPC_83xx
  302. select ARCH_REQUIRE_GPIOLIB
  303. help
  304. Say Y here to enable soft power-off functionality on the Freescale
  305. boards with the MPC8349E-mITX-compatible MCU chips. This driver will
  306. also register MCU GPIOs with the generic GPIO API, so you'll able
  307. to use MCU pins as GPIOs.
  308. config XILINX_PCI
  309. bool "Xilinx PCI host bridge support"
  310. depends on PCI && XILINX_VIRTEX
  311. endmenu