booke.c 44 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726
  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License, version 2, as
  4. * published by the Free Software Foundation.
  5. *
  6. * This program is distributed in the hope that it will be useful,
  7. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  9. * GNU General Public License for more details.
  10. *
  11. * You should have received a copy of the GNU General Public License
  12. * along with this program; if not, write to the Free Software
  13. * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  14. *
  15. * Copyright IBM Corp. 2007
  16. * Copyright 2010-2011 Freescale Semiconductor, Inc.
  17. *
  18. * Authors: Hollis Blanchard <hollisb@us.ibm.com>
  19. * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
  20. * Scott Wood <scottwood@freescale.com>
  21. * Varun Sethi <varun.sethi@freescale.com>
  22. */
  23. #include <linux/errno.h>
  24. #include <linux/err.h>
  25. #include <linux/kvm_host.h>
  26. #include <linux/gfp.h>
  27. #include <linux/module.h>
  28. #include <linux/vmalloc.h>
  29. #include <linux/fs.h>
  30. #include <asm/cputable.h>
  31. #include <asm/uaccess.h>
  32. #include <asm/kvm_ppc.h>
  33. #include <asm/cacheflush.h>
  34. #include <asm/dbell.h>
  35. #include <asm/hw_irq.h>
  36. #include <asm/irq.h>
  37. #include <asm/time.h>
  38. #include "timing.h"
  39. #include "booke.h"
  40. #include "trace.h"
  41. unsigned long kvmppc_booke_handlers;
  42. #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  43. #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  44. struct kvm_stats_debugfs_item debugfs_entries[] = {
  45. { "mmio", VCPU_STAT(mmio_exits) },
  46. { "dcr", VCPU_STAT(dcr_exits) },
  47. { "sig", VCPU_STAT(signal_exits) },
  48. { "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
  49. { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
  50. { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
  51. { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
  52. { "sysc", VCPU_STAT(syscall_exits) },
  53. { "isi", VCPU_STAT(isi_exits) },
  54. { "dsi", VCPU_STAT(dsi_exits) },
  55. { "inst_emu", VCPU_STAT(emulated_inst_exits) },
  56. { "dec", VCPU_STAT(dec_exits) },
  57. { "ext_intr", VCPU_STAT(ext_intr_exits) },
  58. { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  59. { "doorbell", VCPU_STAT(dbell_exits) },
  60. { "guest doorbell", VCPU_STAT(gdbell_exits) },
  61. { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
  62. { NULL }
  63. };
  64. /* TODO: use vcpu_printf() */
  65. void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
  66. {
  67. int i;
  68. printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
  69. printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
  70. printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
  71. vcpu->arch.shared->srr1);
  72. printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
  73. for (i = 0; i < 32; i += 4) {
  74. printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
  75. kvmppc_get_gpr(vcpu, i),
  76. kvmppc_get_gpr(vcpu, i+1),
  77. kvmppc_get_gpr(vcpu, i+2),
  78. kvmppc_get_gpr(vcpu, i+3));
  79. }
  80. }
  81. #ifdef CONFIG_SPE
  82. void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
  83. {
  84. preempt_disable();
  85. enable_kernel_spe();
  86. kvmppc_save_guest_spe(vcpu);
  87. vcpu->arch.shadow_msr &= ~MSR_SPE;
  88. preempt_enable();
  89. }
  90. static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
  91. {
  92. preempt_disable();
  93. enable_kernel_spe();
  94. kvmppc_load_guest_spe(vcpu);
  95. vcpu->arch.shadow_msr |= MSR_SPE;
  96. preempt_enable();
  97. }
  98. static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
  99. {
  100. if (vcpu->arch.shared->msr & MSR_SPE) {
  101. if (!(vcpu->arch.shadow_msr & MSR_SPE))
  102. kvmppc_vcpu_enable_spe(vcpu);
  103. } else if (vcpu->arch.shadow_msr & MSR_SPE) {
  104. kvmppc_vcpu_disable_spe(vcpu);
  105. }
  106. }
  107. #else
  108. static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
  109. {
  110. }
  111. #endif
  112. static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
  113. {
  114. #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV)
  115. /* We always treat the FP bit as enabled from the host
  116. perspective, so only need to adjust the shadow MSR */
  117. vcpu->arch.shadow_msr &= ~MSR_FP;
  118. vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
  119. #endif
  120. }
  121. /*
  122. * Helper function for "full" MSR writes. No need to call this if only
  123. * EE/CE/ME/DE/RI are changing.
  124. */
  125. void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
  126. {
  127. u32 old_msr = vcpu->arch.shared->msr;
  128. #ifdef CONFIG_KVM_BOOKE_HV
  129. new_msr |= MSR_GS;
  130. #endif
  131. vcpu->arch.shared->msr = new_msr;
  132. kvmppc_mmu_msr_notify(vcpu, old_msr);
  133. kvmppc_vcpu_sync_spe(vcpu);
  134. kvmppc_vcpu_sync_fpu(vcpu);
  135. }
  136. static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
  137. unsigned int priority)
  138. {
  139. trace_kvm_booke_queue_irqprio(vcpu, priority);
  140. set_bit(priority, &vcpu->arch.pending_exceptions);
  141. }
  142. static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
  143. ulong dear_flags, ulong esr_flags)
  144. {
  145. vcpu->arch.queued_dear = dear_flags;
  146. vcpu->arch.queued_esr = esr_flags;
  147. kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
  148. }
  149. static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
  150. ulong dear_flags, ulong esr_flags)
  151. {
  152. vcpu->arch.queued_dear = dear_flags;
  153. vcpu->arch.queued_esr = esr_flags;
  154. kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
  155. }
  156. static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
  157. ulong esr_flags)
  158. {
  159. vcpu->arch.queued_esr = esr_flags;
  160. kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
  161. }
  162. static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags,
  163. ulong esr_flags)
  164. {
  165. vcpu->arch.queued_dear = dear_flags;
  166. vcpu->arch.queued_esr = esr_flags;
  167. kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT);
  168. }
  169. void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
  170. {
  171. vcpu->arch.queued_esr = esr_flags;
  172. kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
  173. }
  174. void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
  175. {
  176. kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
  177. }
  178. int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
  179. {
  180. return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
  181. }
  182. void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
  183. {
  184. clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
  185. }
  186. void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
  187. struct kvm_interrupt *irq)
  188. {
  189. unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
  190. if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
  191. prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
  192. kvmppc_booke_queue_irqprio(vcpu, prio);
  193. }
  194. void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
  195. {
  196. clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
  197. clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
  198. }
  199. static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu)
  200. {
  201. kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG);
  202. }
  203. static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
  204. {
  205. clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
  206. }
  207. static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
  208. {
  209. #ifdef CONFIG_KVM_BOOKE_HV
  210. mtspr(SPRN_GSRR0, srr0);
  211. mtspr(SPRN_GSRR1, srr1);
  212. #else
  213. vcpu->arch.shared->srr0 = srr0;
  214. vcpu->arch.shared->srr1 = srr1;
  215. #endif
  216. }
  217. static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
  218. {
  219. vcpu->arch.csrr0 = srr0;
  220. vcpu->arch.csrr1 = srr1;
  221. }
  222. static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
  223. {
  224. if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
  225. vcpu->arch.dsrr0 = srr0;
  226. vcpu->arch.dsrr1 = srr1;
  227. } else {
  228. set_guest_csrr(vcpu, srr0, srr1);
  229. }
  230. }
  231. static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
  232. {
  233. vcpu->arch.mcsrr0 = srr0;
  234. vcpu->arch.mcsrr1 = srr1;
  235. }
  236. static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)
  237. {
  238. #ifdef CONFIG_KVM_BOOKE_HV
  239. return mfspr(SPRN_GDEAR);
  240. #else
  241. return vcpu->arch.shared->dar;
  242. #endif
  243. }
  244. static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)
  245. {
  246. #ifdef CONFIG_KVM_BOOKE_HV
  247. mtspr(SPRN_GDEAR, dear);
  248. #else
  249. vcpu->arch.shared->dar = dear;
  250. #endif
  251. }
  252. static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)
  253. {
  254. #ifdef CONFIG_KVM_BOOKE_HV
  255. return mfspr(SPRN_GESR);
  256. #else
  257. return vcpu->arch.shared->esr;
  258. #endif
  259. }
  260. static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)
  261. {
  262. #ifdef CONFIG_KVM_BOOKE_HV
  263. mtspr(SPRN_GESR, esr);
  264. #else
  265. vcpu->arch.shared->esr = esr;
  266. #endif
  267. }
  268. static unsigned long get_guest_epr(struct kvm_vcpu *vcpu)
  269. {
  270. #ifdef CONFIG_KVM_BOOKE_HV
  271. return mfspr(SPRN_GEPR);
  272. #else
  273. return vcpu->arch.epr;
  274. #endif
  275. }
  276. /* Deliver the interrupt of the corresponding priority, if possible. */
  277. static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
  278. unsigned int priority)
  279. {
  280. int allowed = 0;
  281. ulong msr_mask = 0;
  282. bool update_esr = false, update_dear = false, update_epr = false;
  283. ulong crit_raw = vcpu->arch.shared->critical;
  284. ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
  285. bool crit;
  286. bool keep_irq = false;
  287. enum int_class int_class;
  288. ulong new_msr = vcpu->arch.shared->msr;
  289. /* Truncate crit indicators in 32 bit mode */
  290. if (!(vcpu->arch.shared->msr & MSR_SF)) {
  291. crit_raw &= 0xffffffff;
  292. crit_r1 &= 0xffffffff;
  293. }
  294. /* Critical section when crit == r1 */
  295. crit = (crit_raw == crit_r1);
  296. /* ... and we're in supervisor mode */
  297. crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
  298. if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
  299. priority = BOOKE_IRQPRIO_EXTERNAL;
  300. keep_irq = true;
  301. }
  302. if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags)
  303. update_epr = true;
  304. switch (priority) {
  305. case BOOKE_IRQPRIO_DTLB_MISS:
  306. case BOOKE_IRQPRIO_DATA_STORAGE:
  307. case BOOKE_IRQPRIO_ALIGNMENT:
  308. update_dear = true;
  309. /* fall through */
  310. case BOOKE_IRQPRIO_INST_STORAGE:
  311. case BOOKE_IRQPRIO_PROGRAM:
  312. update_esr = true;
  313. /* fall through */
  314. case BOOKE_IRQPRIO_ITLB_MISS:
  315. case BOOKE_IRQPRIO_SYSCALL:
  316. case BOOKE_IRQPRIO_FP_UNAVAIL:
  317. case BOOKE_IRQPRIO_SPE_UNAVAIL:
  318. case BOOKE_IRQPRIO_SPE_FP_DATA:
  319. case BOOKE_IRQPRIO_SPE_FP_ROUND:
  320. case BOOKE_IRQPRIO_AP_UNAVAIL:
  321. allowed = 1;
  322. msr_mask = MSR_CE | MSR_ME | MSR_DE;
  323. int_class = INT_CLASS_NONCRIT;
  324. break;
  325. case BOOKE_IRQPRIO_WATCHDOG:
  326. case BOOKE_IRQPRIO_CRITICAL:
  327. case BOOKE_IRQPRIO_DBELL_CRIT:
  328. allowed = vcpu->arch.shared->msr & MSR_CE;
  329. allowed = allowed && !crit;
  330. msr_mask = MSR_ME;
  331. int_class = INT_CLASS_CRIT;
  332. break;
  333. case BOOKE_IRQPRIO_MACHINE_CHECK:
  334. allowed = vcpu->arch.shared->msr & MSR_ME;
  335. allowed = allowed && !crit;
  336. int_class = INT_CLASS_MC;
  337. break;
  338. case BOOKE_IRQPRIO_DECREMENTER:
  339. case BOOKE_IRQPRIO_FIT:
  340. keep_irq = true;
  341. /* fall through */
  342. case BOOKE_IRQPRIO_EXTERNAL:
  343. case BOOKE_IRQPRIO_DBELL:
  344. allowed = vcpu->arch.shared->msr & MSR_EE;
  345. allowed = allowed && !crit;
  346. msr_mask = MSR_CE | MSR_ME | MSR_DE;
  347. int_class = INT_CLASS_NONCRIT;
  348. break;
  349. case BOOKE_IRQPRIO_DEBUG:
  350. allowed = vcpu->arch.shared->msr & MSR_DE;
  351. allowed = allowed && !crit;
  352. msr_mask = MSR_ME;
  353. int_class = INT_CLASS_CRIT;
  354. break;
  355. }
  356. if (allowed) {
  357. switch (int_class) {
  358. case INT_CLASS_NONCRIT:
  359. set_guest_srr(vcpu, vcpu->arch.pc,
  360. vcpu->arch.shared->msr);
  361. break;
  362. case INT_CLASS_CRIT:
  363. set_guest_csrr(vcpu, vcpu->arch.pc,
  364. vcpu->arch.shared->msr);
  365. break;
  366. case INT_CLASS_DBG:
  367. set_guest_dsrr(vcpu, vcpu->arch.pc,
  368. vcpu->arch.shared->msr);
  369. break;
  370. case INT_CLASS_MC:
  371. set_guest_mcsrr(vcpu, vcpu->arch.pc,
  372. vcpu->arch.shared->msr);
  373. break;
  374. }
  375. vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
  376. if (update_esr == true)
  377. set_guest_esr(vcpu, vcpu->arch.queued_esr);
  378. if (update_dear == true)
  379. set_guest_dear(vcpu, vcpu->arch.queued_dear);
  380. if (update_epr == true) {
  381. if (vcpu->arch.epr_flags & KVMPPC_EPR_USER)
  382. kvm_make_request(KVM_REQ_EPR_EXIT, vcpu);
  383. else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) {
  384. BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC);
  385. kvmppc_mpic_set_epr(vcpu);
  386. }
  387. }
  388. new_msr &= msr_mask;
  389. #if defined(CONFIG_64BIT)
  390. if (vcpu->arch.epcr & SPRN_EPCR_ICM)
  391. new_msr |= MSR_CM;
  392. #endif
  393. kvmppc_set_msr(vcpu, new_msr);
  394. if (!keep_irq)
  395. clear_bit(priority, &vcpu->arch.pending_exceptions);
  396. }
  397. #ifdef CONFIG_KVM_BOOKE_HV
  398. /*
  399. * If an interrupt is pending but masked, raise a guest doorbell
  400. * so that we are notified when the guest enables the relevant
  401. * MSR bit.
  402. */
  403. if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
  404. kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
  405. if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
  406. kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
  407. if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
  408. kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
  409. #endif
  410. return allowed;
  411. }
  412. /*
  413. * Return the number of jiffies until the next timeout. If the timeout is
  414. * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA
  415. * because the larger value can break the timer APIs.
  416. */
  417. static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)
  418. {
  419. u64 tb, wdt_tb, wdt_ticks = 0;
  420. u64 nr_jiffies = 0;
  421. u32 period = TCR_GET_WP(vcpu->arch.tcr);
  422. wdt_tb = 1ULL << (63 - period);
  423. tb = get_tb();
  424. /*
  425. * The watchdog timeout will hapeen when TB bit corresponding
  426. * to watchdog will toggle from 0 to 1.
  427. */
  428. if (tb & wdt_tb)
  429. wdt_ticks = wdt_tb;
  430. wdt_ticks += wdt_tb - (tb & (wdt_tb - 1));
  431. /* Convert timebase ticks to jiffies */
  432. nr_jiffies = wdt_ticks;
  433. if (do_div(nr_jiffies, tb_ticks_per_jiffy))
  434. nr_jiffies++;
  435. return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);
  436. }
  437. static void arm_next_watchdog(struct kvm_vcpu *vcpu)
  438. {
  439. unsigned long nr_jiffies;
  440. unsigned long flags;
  441. /*
  442. * If TSR_ENW and TSR_WIS are not set then no need to exit to
  443. * userspace, so clear the KVM_REQ_WATCHDOG request.
  444. */
  445. if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
  446. clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests);
  447. spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
  448. nr_jiffies = watchdog_next_timeout(vcpu);
  449. /*
  450. * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA
  451. * then do not run the watchdog timer as this can break timer APIs.
  452. */
  453. if (nr_jiffies < NEXT_TIMER_MAX_DELTA)
  454. mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
  455. else
  456. del_timer(&vcpu->arch.wdt_timer);
  457. spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
  458. }
  459. void kvmppc_watchdog_func(unsigned long data)
  460. {
  461. struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
  462. u32 tsr, new_tsr;
  463. int final;
  464. do {
  465. new_tsr = tsr = vcpu->arch.tsr;
  466. final = 0;
  467. /* Time out event */
  468. if (tsr & TSR_ENW) {
  469. if (tsr & TSR_WIS)
  470. final = 1;
  471. else
  472. new_tsr = tsr | TSR_WIS;
  473. } else {
  474. new_tsr = tsr | TSR_ENW;
  475. }
  476. } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
  477. if (new_tsr & TSR_WIS) {
  478. smp_wmb();
  479. kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
  480. kvm_vcpu_kick(vcpu);
  481. }
  482. /*
  483. * If this is final watchdog expiry and some action is required
  484. * then exit to userspace.
  485. */
  486. if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
  487. vcpu->arch.watchdog_enabled) {
  488. smp_wmb();
  489. kvm_make_request(KVM_REQ_WATCHDOG, vcpu);
  490. kvm_vcpu_kick(vcpu);
  491. }
  492. /*
  493. * Stop running the watchdog timer after final expiration to
  494. * prevent the host from being flooded with timers if the
  495. * guest sets a short period.
  496. * Timers will resume when TSR/TCR is updated next time.
  497. */
  498. if (!final)
  499. arm_next_watchdog(vcpu);
  500. }
  501. static void update_timer_ints(struct kvm_vcpu *vcpu)
  502. {
  503. if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
  504. kvmppc_core_queue_dec(vcpu);
  505. else
  506. kvmppc_core_dequeue_dec(vcpu);
  507. if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
  508. kvmppc_core_queue_watchdog(vcpu);
  509. else
  510. kvmppc_core_dequeue_watchdog(vcpu);
  511. }
  512. static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
  513. {
  514. unsigned long *pending = &vcpu->arch.pending_exceptions;
  515. unsigned int priority;
  516. priority = __ffs(*pending);
  517. while (priority < BOOKE_IRQPRIO_MAX) {
  518. if (kvmppc_booke_irqprio_deliver(vcpu, priority))
  519. break;
  520. priority = find_next_bit(pending,
  521. BITS_PER_BYTE * sizeof(*pending),
  522. priority + 1);
  523. }
  524. /* Tell the guest about our interrupt status */
  525. vcpu->arch.shared->int_pending = !!*pending;
  526. }
  527. /* Check pending exceptions and deliver one, if possible. */
  528. int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
  529. {
  530. int r = 0;
  531. WARN_ON_ONCE(!irqs_disabled());
  532. kvmppc_core_check_exceptions(vcpu);
  533. if (vcpu->requests) {
  534. /* Exception delivery raised request; start over */
  535. return 1;
  536. }
  537. if (vcpu->arch.shared->msr & MSR_WE) {
  538. local_irq_enable();
  539. kvm_vcpu_block(vcpu);
  540. clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
  541. local_irq_disable();
  542. kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
  543. r = 1;
  544. };
  545. return r;
  546. }
  547. int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
  548. {
  549. int r = 1; /* Indicate we want to get back into the guest */
  550. if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
  551. update_timer_ints(vcpu);
  552. #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
  553. if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
  554. kvmppc_core_flush_tlb(vcpu);
  555. #endif
  556. if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) {
  557. vcpu->run->exit_reason = KVM_EXIT_WATCHDOG;
  558. r = 0;
  559. }
  560. if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) {
  561. vcpu->run->epr.epr = 0;
  562. vcpu->arch.epr_needed = true;
  563. vcpu->run->exit_reason = KVM_EXIT_EPR;
  564. r = 0;
  565. }
  566. return r;
  567. }
  568. int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
  569. {
  570. int ret, s;
  571. #ifdef CONFIG_PPC_FPU
  572. unsigned int fpscr;
  573. int fpexc_mode;
  574. u64 fpr[32];
  575. #endif
  576. if (!vcpu->arch.sane) {
  577. kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
  578. return -EINVAL;
  579. }
  580. local_irq_disable();
  581. s = kvmppc_prepare_to_enter(vcpu);
  582. if (s <= 0) {
  583. local_irq_enable();
  584. ret = s;
  585. goto out;
  586. }
  587. kvmppc_lazy_ee_enable();
  588. kvm_guest_enter();
  589. #ifdef CONFIG_PPC_FPU
  590. /* Save userspace FPU state in stack */
  591. enable_kernel_fp();
  592. memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
  593. fpscr = current->thread.fpscr.val;
  594. fpexc_mode = current->thread.fpexc_mode;
  595. /* Restore guest FPU state to thread */
  596. memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr));
  597. current->thread.fpscr.val = vcpu->arch.fpscr;
  598. /*
  599. * Since we can't trap on MSR_FP in GS-mode, we consider the guest
  600. * as always using the FPU. Kernel usage of FP (via
  601. * enable_kernel_fp()) in this thread must not occur while
  602. * vcpu->fpu_active is set.
  603. */
  604. vcpu->fpu_active = 1;
  605. kvmppc_load_guest_fp(vcpu);
  606. #endif
  607. ret = __kvmppc_vcpu_run(kvm_run, vcpu);
  608. /* No need for kvm_guest_exit. It's done in handle_exit.
  609. We also get here with interrupts enabled. */
  610. #ifdef CONFIG_PPC_FPU
  611. kvmppc_save_guest_fp(vcpu);
  612. vcpu->fpu_active = 0;
  613. /* Save guest FPU state from thread */
  614. memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr));
  615. vcpu->arch.fpscr = current->thread.fpscr.val;
  616. /* Restore userspace FPU state from stack */
  617. memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
  618. current->thread.fpscr.val = fpscr;
  619. current->thread.fpexc_mode = fpexc_mode;
  620. #endif
  621. out:
  622. vcpu->mode = OUTSIDE_GUEST_MODE;
  623. return ret;
  624. }
  625. static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
  626. {
  627. enum emulation_result er;
  628. er = kvmppc_emulate_instruction(run, vcpu);
  629. switch (er) {
  630. case EMULATE_DONE:
  631. /* don't overwrite subtypes, just account kvm_stats */
  632. kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
  633. /* Future optimization: only reload non-volatiles if
  634. * they were actually modified by emulation. */
  635. return RESUME_GUEST_NV;
  636. case EMULATE_DO_DCR:
  637. run->exit_reason = KVM_EXIT_DCR;
  638. return RESUME_HOST;
  639. case EMULATE_FAIL:
  640. printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
  641. __func__, vcpu->arch.pc, vcpu->arch.last_inst);
  642. /* For debugging, encode the failing instruction and
  643. * report it to userspace. */
  644. run->hw.hardware_exit_reason = ~0ULL << 32;
  645. run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
  646. kvmppc_core_queue_program(vcpu, ESR_PIL);
  647. return RESUME_HOST;
  648. case EMULATE_EXIT_USER:
  649. return RESUME_HOST;
  650. default:
  651. BUG();
  652. }
  653. }
  654. static void kvmppc_fill_pt_regs(struct pt_regs *regs)
  655. {
  656. ulong r1, ip, msr, lr;
  657. asm("mr %0, 1" : "=r"(r1));
  658. asm("mflr %0" : "=r"(lr));
  659. asm("mfmsr %0" : "=r"(msr));
  660. asm("bl 1f; 1: mflr %0" : "=r"(ip));
  661. memset(regs, 0, sizeof(*regs));
  662. regs->gpr[1] = r1;
  663. regs->nip = ip;
  664. regs->msr = msr;
  665. regs->link = lr;
  666. }
  667. /*
  668. * For interrupts needed to be handled by host interrupt handlers,
  669. * corresponding host handler are called from here in similar way
  670. * (but not exact) as they are called from low level handler
  671. * (such as from arch/powerpc/kernel/head_fsl_booke.S).
  672. */
  673. static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
  674. unsigned int exit_nr)
  675. {
  676. struct pt_regs regs;
  677. switch (exit_nr) {
  678. case BOOKE_INTERRUPT_EXTERNAL:
  679. kvmppc_fill_pt_regs(&regs);
  680. do_IRQ(&regs);
  681. break;
  682. case BOOKE_INTERRUPT_DECREMENTER:
  683. kvmppc_fill_pt_regs(&regs);
  684. timer_interrupt(&regs);
  685. break;
  686. #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64)
  687. case BOOKE_INTERRUPT_DOORBELL:
  688. kvmppc_fill_pt_regs(&regs);
  689. doorbell_exception(&regs);
  690. break;
  691. #endif
  692. case BOOKE_INTERRUPT_MACHINE_CHECK:
  693. /* FIXME */
  694. break;
  695. case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
  696. kvmppc_fill_pt_regs(&regs);
  697. performance_monitor_exception(&regs);
  698. break;
  699. case BOOKE_INTERRUPT_WATCHDOG:
  700. kvmppc_fill_pt_regs(&regs);
  701. #ifdef CONFIG_BOOKE_WDT
  702. WatchdogException(&regs);
  703. #else
  704. unknown_exception(&regs);
  705. #endif
  706. break;
  707. case BOOKE_INTERRUPT_CRITICAL:
  708. unknown_exception(&regs);
  709. break;
  710. }
  711. }
  712. /**
  713. * kvmppc_handle_exit
  714. *
  715. * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
  716. */
  717. int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
  718. unsigned int exit_nr)
  719. {
  720. int r = RESUME_HOST;
  721. int s;
  722. /* update before a new last_exit_type is rewritten */
  723. kvmppc_update_timing_stats(vcpu);
  724. /* restart interrupts if they were meant for the host */
  725. kvmppc_restart_interrupt(vcpu, exit_nr);
  726. local_irq_enable();
  727. trace_kvm_exit(exit_nr, vcpu);
  728. kvm_guest_exit();
  729. run->exit_reason = KVM_EXIT_UNKNOWN;
  730. run->ready_for_interrupt_injection = 1;
  731. switch (exit_nr) {
  732. case BOOKE_INTERRUPT_MACHINE_CHECK:
  733. printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
  734. kvmppc_dump_vcpu(vcpu);
  735. /* For debugging, send invalid exit reason to user space */
  736. run->hw.hardware_exit_reason = ~1ULL << 32;
  737. run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
  738. r = RESUME_HOST;
  739. break;
  740. case BOOKE_INTERRUPT_EXTERNAL:
  741. kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
  742. r = RESUME_GUEST;
  743. break;
  744. case BOOKE_INTERRUPT_DECREMENTER:
  745. kvmppc_account_exit(vcpu, DEC_EXITS);
  746. r = RESUME_GUEST;
  747. break;
  748. case BOOKE_INTERRUPT_WATCHDOG:
  749. r = RESUME_GUEST;
  750. break;
  751. case BOOKE_INTERRUPT_DOORBELL:
  752. kvmppc_account_exit(vcpu, DBELL_EXITS);
  753. r = RESUME_GUEST;
  754. break;
  755. case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
  756. kvmppc_account_exit(vcpu, GDBELL_EXITS);
  757. /*
  758. * We are here because there is a pending guest interrupt
  759. * which could not be delivered as MSR_CE or MSR_ME was not
  760. * set. Once we break from here we will retry delivery.
  761. */
  762. r = RESUME_GUEST;
  763. break;
  764. case BOOKE_INTERRUPT_GUEST_DBELL:
  765. kvmppc_account_exit(vcpu, GDBELL_EXITS);
  766. /*
  767. * We are here because there is a pending guest interrupt
  768. * which could not be delivered as MSR_EE was not set. Once
  769. * we break from here we will retry delivery.
  770. */
  771. r = RESUME_GUEST;
  772. break;
  773. case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
  774. r = RESUME_GUEST;
  775. break;
  776. case BOOKE_INTERRUPT_HV_PRIV:
  777. r = emulation_exit(run, vcpu);
  778. break;
  779. case BOOKE_INTERRUPT_PROGRAM:
  780. if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
  781. /*
  782. * Program traps generated by user-level software must
  783. * be handled by the guest kernel.
  784. *
  785. * In GS mode, hypervisor privileged instructions trap
  786. * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
  787. * actual program interrupts, handled by the guest.
  788. */
  789. kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
  790. r = RESUME_GUEST;
  791. kvmppc_account_exit(vcpu, USR_PR_INST);
  792. break;
  793. }
  794. r = emulation_exit(run, vcpu);
  795. break;
  796. case BOOKE_INTERRUPT_FP_UNAVAIL:
  797. kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
  798. kvmppc_account_exit(vcpu, FP_UNAVAIL);
  799. r = RESUME_GUEST;
  800. break;
  801. #ifdef CONFIG_SPE
  802. case BOOKE_INTERRUPT_SPE_UNAVAIL: {
  803. if (vcpu->arch.shared->msr & MSR_SPE)
  804. kvmppc_vcpu_enable_spe(vcpu);
  805. else
  806. kvmppc_booke_queue_irqprio(vcpu,
  807. BOOKE_IRQPRIO_SPE_UNAVAIL);
  808. r = RESUME_GUEST;
  809. break;
  810. }
  811. case BOOKE_INTERRUPT_SPE_FP_DATA:
  812. kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
  813. r = RESUME_GUEST;
  814. break;
  815. case BOOKE_INTERRUPT_SPE_FP_ROUND:
  816. kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
  817. r = RESUME_GUEST;
  818. break;
  819. #else
  820. case BOOKE_INTERRUPT_SPE_UNAVAIL:
  821. /*
  822. * Guest wants SPE, but host kernel doesn't support it. Send
  823. * an "unimplemented operation" program check to the guest.
  824. */
  825. kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
  826. r = RESUME_GUEST;
  827. break;
  828. /*
  829. * These really should never happen without CONFIG_SPE,
  830. * as we should never enable the real MSR[SPE] in the guest.
  831. */
  832. case BOOKE_INTERRUPT_SPE_FP_DATA:
  833. case BOOKE_INTERRUPT_SPE_FP_ROUND:
  834. printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
  835. __func__, exit_nr, vcpu->arch.pc);
  836. run->hw.hardware_exit_reason = exit_nr;
  837. r = RESUME_HOST;
  838. break;
  839. #endif
  840. case BOOKE_INTERRUPT_DATA_STORAGE:
  841. kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
  842. vcpu->arch.fault_esr);
  843. kvmppc_account_exit(vcpu, DSI_EXITS);
  844. r = RESUME_GUEST;
  845. break;
  846. case BOOKE_INTERRUPT_INST_STORAGE:
  847. kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
  848. kvmppc_account_exit(vcpu, ISI_EXITS);
  849. r = RESUME_GUEST;
  850. break;
  851. case BOOKE_INTERRUPT_ALIGNMENT:
  852. kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
  853. vcpu->arch.fault_esr);
  854. r = RESUME_GUEST;
  855. break;
  856. #ifdef CONFIG_KVM_BOOKE_HV
  857. case BOOKE_INTERRUPT_HV_SYSCALL:
  858. if (!(vcpu->arch.shared->msr & MSR_PR)) {
  859. kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
  860. } else {
  861. /*
  862. * hcall from guest userspace -- send privileged
  863. * instruction program check.
  864. */
  865. kvmppc_core_queue_program(vcpu, ESR_PPR);
  866. }
  867. r = RESUME_GUEST;
  868. break;
  869. #else
  870. case BOOKE_INTERRUPT_SYSCALL:
  871. if (!(vcpu->arch.shared->msr & MSR_PR) &&
  872. (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
  873. /* KVM PV hypercalls */
  874. kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
  875. r = RESUME_GUEST;
  876. } else {
  877. /* Guest syscalls */
  878. kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
  879. }
  880. kvmppc_account_exit(vcpu, SYSCALL_EXITS);
  881. r = RESUME_GUEST;
  882. break;
  883. #endif
  884. case BOOKE_INTERRUPT_DTLB_MISS: {
  885. unsigned long eaddr = vcpu->arch.fault_dear;
  886. int gtlb_index;
  887. gpa_t gpaddr;
  888. gfn_t gfn;
  889. #ifdef CONFIG_KVM_E500V2
  890. if (!(vcpu->arch.shared->msr & MSR_PR) &&
  891. (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
  892. kvmppc_map_magic(vcpu);
  893. kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
  894. r = RESUME_GUEST;
  895. break;
  896. }
  897. #endif
  898. /* Check the guest TLB. */
  899. gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
  900. if (gtlb_index < 0) {
  901. /* The guest didn't have a mapping for it. */
  902. kvmppc_core_queue_dtlb_miss(vcpu,
  903. vcpu->arch.fault_dear,
  904. vcpu->arch.fault_esr);
  905. kvmppc_mmu_dtlb_miss(vcpu);
  906. kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
  907. r = RESUME_GUEST;
  908. break;
  909. }
  910. gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
  911. gfn = gpaddr >> PAGE_SHIFT;
  912. if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
  913. /* The guest TLB had a mapping, but the shadow TLB
  914. * didn't, and it is RAM. This could be because:
  915. * a) the entry is mapping the host kernel, or
  916. * b) the guest used a large mapping which we're faking
  917. * Either way, we need to satisfy the fault without
  918. * invoking the guest. */
  919. kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
  920. kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
  921. r = RESUME_GUEST;
  922. } else {
  923. /* Guest has mapped and accessed a page which is not
  924. * actually RAM. */
  925. vcpu->arch.paddr_accessed = gpaddr;
  926. vcpu->arch.vaddr_accessed = eaddr;
  927. r = kvmppc_emulate_mmio(run, vcpu);
  928. kvmppc_account_exit(vcpu, MMIO_EXITS);
  929. }
  930. break;
  931. }
  932. case BOOKE_INTERRUPT_ITLB_MISS: {
  933. unsigned long eaddr = vcpu->arch.pc;
  934. gpa_t gpaddr;
  935. gfn_t gfn;
  936. int gtlb_index;
  937. r = RESUME_GUEST;
  938. /* Check the guest TLB. */
  939. gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
  940. if (gtlb_index < 0) {
  941. /* The guest didn't have a mapping for it. */
  942. kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
  943. kvmppc_mmu_itlb_miss(vcpu);
  944. kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
  945. break;
  946. }
  947. kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
  948. gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
  949. gfn = gpaddr >> PAGE_SHIFT;
  950. if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
  951. /* The guest TLB had a mapping, but the shadow TLB
  952. * didn't. This could be because:
  953. * a) the entry is mapping the host kernel, or
  954. * b) the guest used a large mapping which we're faking
  955. * Either way, we need to satisfy the fault without
  956. * invoking the guest. */
  957. kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
  958. } else {
  959. /* Guest mapped and leaped at non-RAM! */
  960. kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
  961. }
  962. break;
  963. }
  964. case BOOKE_INTERRUPT_DEBUG: {
  965. u32 dbsr;
  966. vcpu->arch.pc = mfspr(SPRN_CSRR0);
  967. /* clear IAC events in DBSR register */
  968. dbsr = mfspr(SPRN_DBSR);
  969. dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
  970. mtspr(SPRN_DBSR, dbsr);
  971. run->exit_reason = KVM_EXIT_DEBUG;
  972. kvmppc_account_exit(vcpu, DEBUG_EXITS);
  973. r = RESUME_HOST;
  974. break;
  975. }
  976. default:
  977. printk(KERN_EMERG "exit_nr %d\n", exit_nr);
  978. BUG();
  979. }
  980. /*
  981. * To avoid clobbering exit_reason, only check for signals if we
  982. * aren't already exiting to userspace for some other reason.
  983. */
  984. if (!(r & RESUME_HOST)) {
  985. local_irq_disable();
  986. s = kvmppc_prepare_to_enter(vcpu);
  987. if (s <= 0) {
  988. local_irq_enable();
  989. r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
  990. } else {
  991. kvmppc_lazy_ee_enable();
  992. }
  993. }
  994. return r;
  995. }
  996. static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr)
  997. {
  998. u32 old_tsr = vcpu->arch.tsr;
  999. vcpu->arch.tsr = new_tsr;
  1000. if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
  1001. arm_next_watchdog(vcpu);
  1002. update_timer_ints(vcpu);
  1003. }
  1004. /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
  1005. int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
  1006. {
  1007. int i;
  1008. int r;
  1009. vcpu->arch.pc = 0;
  1010. vcpu->arch.shared->pir = vcpu->vcpu_id;
  1011. kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
  1012. kvmppc_set_msr(vcpu, 0);
  1013. #ifndef CONFIG_KVM_BOOKE_HV
  1014. vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
  1015. vcpu->arch.shadow_pid = 1;
  1016. vcpu->arch.shared->msr = 0;
  1017. #endif
  1018. /* Eye-catching numbers so we know if the guest takes an interrupt
  1019. * before it's programmed its own IVPR/IVORs. */
  1020. vcpu->arch.ivpr = 0x55550000;
  1021. for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
  1022. vcpu->arch.ivor[i] = 0x7700 | i * 4;
  1023. kvmppc_init_timing_stats(vcpu);
  1024. r = kvmppc_core_vcpu_setup(vcpu);
  1025. kvmppc_sanity_check(vcpu);
  1026. return r;
  1027. }
  1028. int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
  1029. {
  1030. /* setup watchdog timer once */
  1031. spin_lock_init(&vcpu->arch.wdt_lock);
  1032. setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func,
  1033. (unsigned long)vcpu);
  1034. return 0;
  1035. }
  1036. void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
  1037. {
  1038. del_timer_sync(&vcpu->arch.wdt_timer);
  1039. }
  1040. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  1041. {
  1042. int i;
  1043. regs->pc = vcpu->arch.pc;
  1044. regs->cr = kvmppc_get_cr(vcpu);
  1045. regs->ctr = vcpu->arch.ctr;
  1046. regs->lr = vcpu->arch.lr;
  1047. regs->xer = kvmppc_get_xer(vcpu);
  1048. regs->msr = vcpu->arch.shared->msr;
  1049. regs->srr0 = vcpu->arch.shared->srr0;
  1050. regs->srr1 = vcpu->arch.shared->srr1;
  1051. regs->pid = vcpu->arch.pid;
  1052. regs->sprg0 = vcpu->arch.shared->sprg0;
  1053. regs->sprg1 = vcpu->arch.shared->sprg1;
  1054. regs->sprg2 = vcpu->arch.shared->sprg2;
  1055. regs->sprg3 = vcpu->arch.shared->sprg3;
  1056. regs->sprg4 = vcpu->arch.shared->sprg4;
  1057. regs->sprg5 = vcpu->arch.shared->sprg5;
  1058. regs->sprg6 = vcpu->arch.shared->sprg6;
  1059. regs->sprg7 = vcpu->arch.shared->sprg7;
  1060. for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
  1061. regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
  1062. return 0;
  1063. }
  1064. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  1065. {
  1066. int i;
  1067. vcpu->arch.pc = regs->pc;
  1068. kvmppc_set_cr(vcpu, regs->cr);
  1069. vcpu->arch.ctr = regs->ctr;
  1070. vcpu->arch.lr = regs->lr;
  1071. kvmppc_set_xer(vcpu, regs->xer);
  1072. kvmppc_set_msr(vcpu, regs->msr);
  1073. vcpu->arch.shared->srr0 = regs->srr0;
  1074. vcpu->arch.shared->srr1 = regs->srr1;
  1075. kvmppc_set_pid(vcpu, regs->pid);
  1076. vcpu->arch.shared->sprg0 = regs->sprg0;
  1077. vcpu->arch.shared->sprg1 = regs->sprg1;
  1078. vcpu->arch.shared->sprg2 = regs->sprg2;
  1079. vcpu->arch.shared->sprg3 = regs->sprg3;
  1080. vcpu->arch.shared->sprg4 = regs->sprg4;
  1081. vcpu->arch.shared->sprg5 = regs->sprg5;
  1082. vcpu->arch.shared->sprg6 = regs->sprg6;
  1083. vcpu->arch.shared->sprg7 = regs->sprg7;
  1084. for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
  1085. kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
  1086. return 0;
  1087. }
  1088. static void get_sregs_base(struct kvm_vcpu *vcpu,
  1089. struct kvm_sregs *sregs)
  1090. {
  1091. u64 tb = get_tb();
  1092. sregs->u.e.features |= KVM_SREGS_E_BASE;
  1093. sregs->u.e.csrr0 = vcpu->arch.csrr0;
  1094. sregs->u.e.csrr1 = vcpu->arch.csrr1;
  1095. sregs->u.e.mcsr = vcpu->arch.mcsr;
  1096. sregs->u.e.esr = get_guest_esr(vcpu);
  1097. sregs->u.e.dear = get_guest_dear(vcpu);
  1098. sregs->u.e.tsr = vcpu->arch.tsr;
  1099. sregs->u.e.tcr = vcpu->arch.tcr;
  1100. sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
  1101. sregs->u.e.tb = tb;
  1102. sregs->u.e.vrsave = vcpu->arch.vrsave;
  1103. }
  1104. static int set_sregs_base(struct kvm_vcpu *vcpu,
  1105. struct kvm_sregs *sregs)
  1106. {
  1107. if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
  1108. return 0;
  1109. vcpu->arch.csrr0 = sregs->u.e.csrr0;
  1110. vcpu->arch.csrr1 = sregs->u.e.csrr1;
  1111. vcpu->arch.mcsr = sregs->u.e.mcsr;
  1112. set_guest_esr(vcpu, sregs->u.e.esr);
  1113. set_guest_dear(vcpu, sregs->u.e.dear);
  1114. vcpu->arch.vrsave = sregs->u.e.vrsave;
  1115. kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
  1116. if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
  1117. vcpu->arch.dec = sregs->u.e.dec;
  1118. kvmppc_emulate_dec(vcpu);
  1119. }
  1120. if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR)
  1121. kvmppc_set_tsr(vcpu, sregs->u.e.tsr);
  1122. return 0;
  1123. }
  1124. static void get_sregs_arch206(struct kvm_vcpu *vcpu,
  1125. struct kvm_sregs *sregs)
  1126. {
  1127. sregs->u.e.features |= KVM_SREGS_E_ARCH206;
  1128. sregs->u.e.pir = vcpu->vcpu_id;
  1129. sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
  1130. sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
  1131. sregs->u.e.decar = vcpu->arch.decar;
  1132. sregs->u.e.ivpr = vcpu->arch.ivpr;
  1133. }
  1134. static int set_sregs_arch206(struct kvm_vcpu *vcpu,
  1135. struct kvm_sregs *sregs)
  1136. {
  1137. if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
  1138. return 0;
  1139. if (sregs->u.e.pir != vcpu->vcpu_id)
  1140. return -EINVAL;
  1141. vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
  1142. vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
  1143. vcpu->arch.decar = sregs->u.e.decar;
  1144. vcpu->arch.ivpr = sregs->u.e.ivpr;
  1145. return 0;
  1146. }
  1147. void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
  1148. {
  1149. sregs->u.e.features |= KVM_SREGS_E_IVOR;
  1150. sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
  1151. sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
  1152. sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
  1153. sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
  1154. sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
  1155. sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
  1156. sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
  1157. sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
  1158. sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
  1159. sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
  1160. sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
  1161. sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
  1162. sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
  1163. sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
  1164. sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
  1165. sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
  1166. }
  1167. int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
  1168. {
  1169. if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
  1170. return 0;
  1171. vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
  1172. vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
  1173. vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
  1174. vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
  1175. vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
  1176. vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
  1177. vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
  1178. vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
  1179. vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
  1180. vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
  1181. vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
  1182. vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
  1183. vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
  1184. vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
  1185. vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
  1186. vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
  1187. return 0;
  1188. }
  1189. int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
  1190. struct kvm_sregs *sregs)
  1191. {
  1192. sregs->pvr = vcpu->arch.pvr;
  1193. get_sregs_base(vcpu, sregs);
  1194. get_sregs_arch206(vcpu, sregs);
  1195. kvmppc_core_get_sregs(vcpu, sregs);
  1196. return 0;
  1197. }
  1198. int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
  1199. struct kvm_sregs *sregs)
  1200. {
  1201. int ret;
  1202. if (vcpu->arch.pvr != sregs->pvr)
  1203. return -EINVAL;
  1204. ret = set_sregs_base(vcpu, sregs);
  1205. if (ret < 0)
  1206. return ret;
  1207. ret = set_sregs_arch206(vcpu, sregs);
  1208. if (ret < 0)
  1209. return ret;
  1210. return kvmppc_core_set_sregs(vcpu, sregs);
  1211. }
  1212. int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
  1213. {
  1214. int r = 0;
  1215. union kvmppc_one_reg val;
  1216. int size;
  1217. long int i;
  1218. size = one_reg_size(reg->id);
  1219. if (size > sizeof(val))
  1220. return -EINVAL;
  1221. switch (reg->id) {
  1222. case KVM_REG_PPC_IAC1:
  1223. case KVM_REG_PPC_IAC2:
  1224. case KVM_REG_PPC_IAC3:
  1225. case KVM_REG_PPC_IAC4:
  1226. i = reg->id - KVM_REG_PPC_IAC1;
  1227. val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac[i]);
  1228. break;
  1229. case KVM_REG_PPC_DAC1:
  1230. case KVM_REG_PPC_DAC2:
  1231. i = reg->id - KVM_REG_PPC_DAC1;
  1232. val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac[i]);
  1233. break;
  1234. case KVM_REG_PPC_EPR: {
  1235. u32 epr = get_guest_epr(vcpu);
  1236. val = get_reg_val(reg->id, epr);
  1237. break;
  1238. }
  1239. #if defined(CONFIG_64BIT)
  1240. case KVM_REG_PPC_EPCR:
  1241. val = get_reg_val(reg->id, vcpu->arch.epcr);
  1242. break;
  1243. #endif
  1244. case KVM_REG_PPC_TCR:
  1245. val = get_reg_val(reg->id, vcpu->arch.tcr);
  1246. break;
  1247. case KVM_REG_PPC_TSR:
  1248. val = get_reg_val(reg->id, vcpu->arch.tsr);
  1249. break;
  1250. case KVM_REG_PPC_DEBUG_INST:
  1251. val = get_reg_val(reg->id, KVMPPC_INST_EHPRIV);
  1252. break;
  1253. default:
  1254. r = kvmppc_get_one_reg(vcpu, reg->id, &val);
  1255. break;
  1256. }
  1257. if (r)
  1258. return r;
  1259. if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size))
  1260. r = -EFAULT;
  1261. return r;
  1262. }
  1263. int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
  1264. {
  1265. int r = 0;
  1266. union kvmppc_one_reg val;
  1267. int size;
  1268. long int i;
  1269. size = one_reg_size(reg->id);
  1270. if (size > sizeof(val))
  1271. return -EINVAL;
  1272. if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size))
  1273. return -EFAULT;
  1274. switch (reg->id) {
  1275. case KVM_REG_PPC_IAC1:
  1276. case KVM_REG_PPC_IAC2:
  1277. case KVM_REG_PPC_IAC3:
  1278. case KVM_REG_PPC_IAC4:
  1279. i = reg->id - KVM_REG_PPC_IAC1;
  1280. vcpu->arch.dbg_reg.iac[i] = set_reg_val(reg->id, val);
  1281. break;
  1282. case KVM_REG_PPC_DAC1:
  1283. case KVM_REG_PPC_DAC2:
  1284. i = reg->id - KVM_REG_PPC_DAC1;
  1285. vcpu->arch.dbg_reg.dac[i] = set_reg_val(reg->id, val);
  1286. break;
  1287. case KVM_REG_PPC_EPR: {
  1288. u32 new_epr = set_reg_val(reg->id, val);
  1289. kvmppc_set_epr(vcpu, new_epr);
  1290. break;
  1291. }
  1292. #if defined(CONFIG_64BIT)
  1293. case KVM_REG_PPC_EPCR: {
  1294. u32 new_epcr = set_reg_val(reg->id, val);
  1295. kvmppc_set_epcr(vcpu, new_epcr);
  1296. break;
  1297. }
  1298. #endif
  1299. case KVM_REG_PPC_OR_TSR: {
  1300. u32 tsr_bits = set_reg_val(reg->id, val);
  1301. kvmppc_set_tsr_bits(vcpu, tsr_bits);
  1302. break;
  1303. }
  1304. case KVM_REG_PPC_CLEAR_TSR: {
  1305. u32 tsr_bits = set_reg_val(reg->id, val);
  1306. kvmppc_clr_tsr_bits(vcpu, tsr_bits);
  1307. break;
  1308. }
  1309. case KVM_REG_PPC_TSR: {
  1310. u32 tsr = set_reg_val(reg->id, val);
  1311. kvmppc_set_tsr(vcpu, tsr);
  1312. break;
  1313. }
  1314. case KVM_REG_PPC_TCR: {
  1315. u32 tcr = set_reg_val(reg->id, val);
  1316. kvmppc_set_tcr(vcpu, tcr);
  1317. break;
  1318. }
  1319. default:
  1320. r = kvmppc_set_one_reg(vcpu, reg->id, &val);
  1321. break;
  1322. }
  1323. return r;
  1324. }
  1325. int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
  1326. struct kvm_guest_debug *dbg)
  1327. {
  1328. return -EINVAL;
  1329. }
  1330. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  1331. {
  1332. return -ENOTSUPP;
  1333. }
  1334. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  1335. {
  1336. return -ENOTSUPP;
  1337. }
  1338. int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
  1339. struct kvm_translation *tr)
  1340. {
  1341. int r;
  1342. r = kvmppc_core_vcpu_translate(vcpu, tr);
  1343. return r;
  1344. }
  1345. int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
  1346. {
  1347. return -ENOTSUPP;
  1348. }
  1349. void kvmppc_core_free_memslot(struct kvm_memory_slot *free,
  1350. struct kvm_memory_slot *dont)
  1351. {
  1352. }
  1353. int kvmppc_core_create_memslot(struct kvm_memory_slot *slot,
  1354. unsigned long npages)
  1355. {
  1356. return 0;
  1357. }
  1358. int kvmppc_core_prepare_memory_region(struct kvm *kvm,
  1359. struct kvm_memory_slot *memslot,
  1360. struct kvm_userspace_memory_region *mem)
  1361. {
  1362. return 0;
  1363. }
  1364. void kvmppc_core_commit_memory_region(struct kvm *kvm,
  1365. struct kvm_userspace_memory_region *mem,
  1366. const struct kvm_memory_slot *old)
  1367. {
  1368. }
  1369. void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
  1370. {
  1371. }
  1372. void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr)
  1373. {
  1374. #if defined(CONFIG_64BIT)
  1375. vcpu->arch.epcr = new_epcr;
  1376. #ifdef CONFIG_KVM_BOOKE_HV
  1377. vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
  1378. if (vcpu->arch.epcr & SPRN_EPCR_ICM)
  1379. vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
  1380. #endif
  1381. #endif
  1382. }
  1383. void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
  1384. {
  1385. vcpu->arch.tcr = new_tcr;
  1386. arm_next_watchdog(vcpu);
  1387. update_timer_ints(vcpu);
  1388. }
  1389. void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
  1390. {
  1391. set_bits(tsr_bits, &vcpu->arch.tsr);
  1392. smp_wmb();
  1393. kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
  1394. kvm_vcpu_kick(vcpu);
  1395. }
  1396. void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
  1397. {
  1398. clear_bits(tsr_bits, &vcpu->arch.tsr);
  1399. /*
  1400. * We may have stopped the watchdog due to
  1401. * being stuck on final expiration.
  1402. */
  1403. if (tsr_bits & (TSR_ENW | TSR_WIS))
  1404. arm_next_watchdog(vcpu);
  1405. update_timer_ints(vcpu);
  1406. }
  1407. void kvmppc_decrementer_func(unsigned long data)
  1408. {
  1409. struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
  1410. if (vcpu->arch.tcr & TCR_ARE) {
  1411. vcpu->arch.dec = vcpu->arch.decar;
  1412. kvmppc_emulate_dec(vcpu);
  1413. }
  1414. kvmppc_set_tsr_bits(vcpu, TSR_DIS);
  1415. }
  1416. void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  1417. {
  1418. vcpu->cpu = smp_processor_id();
  1419. current->thread.kvm_vcpu = vcpu;
  1420. }
  1421. void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
  1422. {
  1423. current->thread.kvm_vcpu = NULL;
  1424. vcpu->cpu = -1;
  1425. }
  1426. int __init kvmppc_booke_init(void)
  1427. {
  1428. #ifndef CONFIG_KVM_BOOKE_HV
  1429. unsigned long ivor[16];
  1430. unsigned long *handler = kvmppc_booke_handler_addr;
  1431. unsigned long max_ivor = 0;
  1432. unsigned long handler_len;
  1433. int i;
  1434. /* We install our own exception handlers by hijacking IVPR. IVPR must
  1435. * be 16-bit aligned, so we need a 64KB allocation. */
  1436. kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
  1437. VCPU_SIZE_ORDER);
  1438. if (!kvmppc_booke_handlers)
  1439. return -ENOMEM;
  1440. /* XXX make sure our handlers are smaller than Linux's */
  1441. /* Copy our interrupt handlers to match host IVORs. That way we don't
  1442. * have to swap the IVORs on every guest/host transition. */
  1443. ivor[0] = mfspr(SPRN_IVOR0);
  1444. ivor[1] = mfspr(SPRN_IVOR1);
  1445. ivor[2] = mfspr(SPRN_IVOR2);
  1446. ivor[3] = mfspr(SPRN_IVOR3);
  1447. ivor[4] = mfspr(SPRN_IVOR4);
  1448. ivor[5] = mfspr(SPRN_IVOR5);
  1449. ivor[6] = mfspr(SPRN_IVOR6);
  1450. ivor[7] = mfspr(SPRN_IVOR7);
  1451. ivor[8] = mfspr(SPRN_IVOR8);
  1452. ivor[9] = mfspr(SPRN_IVOR9);
  1453. ivor[10] = mfspr(SPRN_IVOR10);
  1454. ivor[11] = mfspr(SPRN_IVOR11);
  1455. ivor[12] = mfspr(SPRN_IVOR12);
  1456. ivor[13] = mfspr(SPRN_IVOR13);
  1457. ivor[14] = mfspr(SPRN_IVOR14);
  1458. ivor[15] = mfspr(SPRN_IVOR15);
  1459. for (i = 0; i < 16; i++) {
  1460. if (ivor[i] > max_ivor)
  1461. max_ivor = i;
  1462. handler_len = handler[i + 1] - handler[i];
  1463. memcpy((void *)kvmppc_booke_handlers + ivor[i],
  1464. (void *)handler[i], handler_len);
  1465. }
  1466. handler_len = handler[max_ivor + 1] - handler[max_ivor];
  1467. flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers +
  1468. ivor[max_ivor] + handler_len);
  1469. #endif /* !BOOKE_HV */
  1470. return 0;
  1471. }
  1472. void __exit kvmppc_booke_exit(void)
  1473. {
  1474. free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
  1475. kvm_exit();
  1476. }