hugetlb.h 4.9 KB

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  1. #ifndef _ASM_POWERPC_HUGETLB_H
  2. #define _ASM_POWERPC_HUGETLB_H
  3. #ifdef CONFIG_HUGETLB_PAGE
  4. #include <asm/page.h>
  5. #include <asm-generic/hugetlb.h>
  6. extern struct kmem_cache *hugepte_cache;
  7. #ifdef CONFIG_PPC_BOOK3S_64
  8. /*
  9. * This should work for other subarchs too. But right now we use the
  10. * new format only for 64bit book3s
  11. */
  12. static inline pte_t *hugepd_page(hugepd_t hpd)
  13. {
  14. BUG_ON(!hugepd_ok(hpd));
  15. /*
  16. * We have only four bits to encode, MMU page size
  17. */
  18. BUILD_BUG_ON((MMU_PAGE_COUNT - 1) > 0xf);
  19. return (pte_t *)(hpd.pd & ~HUGEPD_SHIFT_MASK);
  20. }
  21. static inline unsigned int hugepd_mmu_psize(hugepd_t hpd)
  22. {
  23. return (hpd.pd & HUGEPD_SHIFT_MASK) >> 2;
  24. }
  25. static inline unsigned int hugepd_shift(hugepd_t hpd)
  26. {
  27. return mmu_psize_to_shift(hugepd_mmu_psize(hpd));
  28. }
  29. #else
  30. static inline pte_t *hugepd_page(hugepd_t hpd)
  31. {
  32. BUG_ON(!hugepd_ok(hpd));
  33. return (pte_t *)((hpd.pd & ~HUGEPD_SHIFT_MASK) | PD_HUGE);
  34. }
  35. static inline unsigned int hugepd_shift(hugepd_t hpd)
  36. {
  37. return hpd.pd & HUGEPD_SHIFT_MASK;
  38. }
  39. #endif /* CONFIG_PPC_BOOK3S_64 */
  40. static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr,
  41. unsigned pdshift)
  42. {
  43. /*
  44. * On FSL BookE, we have multiple higher-level table entries that
  45. * point to the same hugepte. Just use the first one since they're all
  46. * identical. So for that case, idx=0.
  47. */
  48. unsigned long idx = 0;
  49. pte_t *dir = hugepd_page(*hpdp);
  50. #ifndef CONFIG_PPC_FSL_BOOK3E
  51. idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(*hpdp);
  52. #endif
  53. return dir + idx;
  54. }
  55. pte_t *huge_pte_offset_and_shift(struct mm_struct *mm,
  56. unsigned long addr, unsigned *shift);
  57. void flush_dcache_icache_hugepage(struct page *page);
  58. #if defined(CONFIG_PPC_MM_SLICES) || defined(CONFIG_PPC_SUBPAGE_PROT)
  59. int is_hugepage_only_range(struct mm_struct *mm, unsigned long addr,
  60. unsigned long len);
  61. #else
  62. static inline int is_hugepage_only_range(struct mm_struct *mm,
  63. unsigned long addr,
  64. unsigned long len)
  65. {
  66. return 0;
  67. }
  68. #endif
  69. void book3e_hugetlb_preload(struct vm_area_struct *vma, unsigned long ea,
  70. pte_t pte);
  71. void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
  72. void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr,
  73. unsigned long end, unsigned long floor,
  74. unsigned long ceiling);
  75. /*
  76. * The version of vma_mmu_pagesize() in arch/powerpc/mm/hugetlbpage.c needs
  77. * to override the version in mm/hugetlb.c
  78. */
  79. #define vma_mmu_pagesize vma_mmu_pagesize
  80. /*
  81. * If the arch doesn't supply something else, assume that hugepage
  82. * size aligned regions are ok without further preparation.
  83. */
  84. static inline int prepare_hugepage_range(struct file *file,
  85. unsigned long addr, unsigned long len)
  86. {
  87. struct hstate *h = hstate_file(file);
  88. if (len & ~huge_page_mask(h))
  89. return -EINVAL;
  90. if (addr & ~huge_page_mask(h))
  91. return -EINVAL;
  92. return 0;
  93. }
  94. static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm)
  95. {
  96. }
  97. static inline void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
  98. pte_t *ptep, pte_t pte)
  99. {
  100. set_pte_at(mm, addr, ptep, pte);
  101. }
  102. static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
  103. unsigned long addr, pte_t *ptep)
  104. {
  105. #ifdef CONFIG_PPC64
  106. return __pte(pte_update(mm, addr, ptep, ~0UL, 1));
  107. #else
  108. return __pte(pte_update(ptep, ~0UL, 0));
  109. #endif
  110. }
  111. static inline void huge_ptep_clear_flush(struct vm_area_struct *vma,
  112. unsigned long addr, pte_t *ptep)
  113. {
  114. pte_t pte;
  115. pte = huge_ptep_get_and_clear(vma->vm_mm, addr, ptep);
  116. flush_tlb_page(vma, addr);
  117. }
  118. static inline int huge_pte_none(pte_t pte)
  119. {
  120. return pte_none(pte);
  121. }
  122. static inline pte_t huge_pte_wrprotect(pte_t pte)
  123. {
  124. return pte_wrprotect(pte);
  125. }
  126. static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma,
  127. unsigned long addr, pte_t *ptep,
  128. pte_t pte, int dirty)
  129. {
  130. #ifdef HUGETLB_NEED_PRELOAD
  131. /*
  132. * The "return 1" forces a call of update_mmu_cache, which will write a
  133. * TLB entry. Without this, platforms that don't do a write of the TLB
  134. * entry in the TLB miss handler asm will fault ad infinitum.
  135. */
  136. ptep_set_access_flags(vma, addr, ptep, pte, dirty);
  137. return 1;
  138. #else
  139. return ptep_set_access_flags(vma, addr, ptep, pte, dirty);
  140. #endif
  141. }
  142. static inline pte_t huge_ptep_get(pte_t *ptep)
  143. {
  144. return *ptep;
  145. }
  146. static inline int arch_prepare_hugepage(struct page *page)
  147. {
  148. return 0;
  149. }
  150. static inline void arch_release_hugepage(struct page *page)
  151. {
  152. }
  153. static inline void arch_clear_hugepage_flags(struct page *page)
  154. {
  155. }
  156. #else /* ! CONFIG_HUGETLB_PAGE */
  157. static inline void flush_hugetlb_page(struct vm_area_struct *vma,
  158. unsigned long vmaddr)
  159. {
  160. }
  161. #endif /* CONFIG_HUGETLB_PAGE */
  162. /*
  163. * FSL Book3E platforms require special gpage handling - the gpages
  164. * are reserved early in the boot process by memblock instead of via
  165. * the .dts as on IBM platforms.
  166. */
  167. #if defined(CONFIG_HUGETLB_PAGE) && defined(CONFIG_PPC_FSL_BOOK3E)
  168. extern void __init reserve_hugetlb_gpages(void);
  169. #else
  170. static inline void reserve_hugetlb_gpages(void)
  171. {
  172. }
  173. #endif
  174. #endif /* _ASM_POWERPC_HUGETLB_H */