board-mop500-sdi.c 6.2 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * Author: Hanumath Prasad <hanumath.prasad@stericsson.com>
  5. * License terms: GNU General Public License (GPL) version 2
  6. */
  7. #include <linux/kernel.h>
  8. #include <linux/gpio.h>
  9. #include <linux/amba/bus.h>
  10. #include <linux/amba/mmci.h>
  11. #include <linux/mmc/host.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/platform_data/dma-ste-dma40.h>
  14. #include <asm/mach-types.h>
  15. #include "devices.h"
  16. #include "db8500-regs.h"
  17. #include "devices-db8500.h"
  18. #include "board-mop500.h"
  19. #include "ste-dma40-db8500.h"
  20. /*
  21. * v2 has a new version of this block that need to be forced, the number found
  22. * in hardware is incorrect
  23. */
  24. #define U8500_SDI_V2_PERIPHID 0x10480180
  25. /*
  26. * SDI 0 (MicroSD slot)
  27. */
  28. #ifdef CONFIG_STE_DMA40
  29. struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = {
  30. .mode = STEDMA40_MODE_LOGICAL,
  31. .dir = STEDMA40_PERIPH_TO_MEM,
  32. .src_dev_type = DB8500_DMA_DEV29_SD_MM0_RX,
  33. .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
  34. .src_info.data_width = STEDMA40_WORD_WIDTH,
  35. .dst_info.data_width = STEDMA40_WORD_WIDTH,
  36. };
  37. static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = {
  38. .mode = STEDMA40_MODE_LOGICAL,
  39. .dir = STEDMA40_MEM_TO_PERIPH,
  40. .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
  41. .dst_dev_type = DB8500_DMA_DEV29_SD_MM0_TX,
  42. .src_info.data_width = STEDMA40_WORD_WIDTH,
  43. .dst_info.data_width = STEDMA40_WORD_WIDTH,
  44. };
  45. #endif
  46. struct mmci_platform_data mop500_sdi0_data = {
  47. .ocr_mask = MMC_VDD_29_30,
  48. .f_max = 50000000,
  49. .capabilities = MMC_CAP_4_BIT_DATA |
  50. MMC_CAP_SD_HIGHSPEED |
  51. MMC_CAP_MMC_HIGHSPEED,
  52. .gpio_wp = -1,
  53. .sigdir = MCI_ST_FBCLKEN |
  54. MCI_ST_CMDDIREN |
  55. MCI_ST_DATA0DIREN |
  56. MCI_ST_DATA2DIREN,
  57. #ifdef CONFIG_STE_DMA40
  58. .dma_filter = stedma40_filter,
  59. .dma_rx_param = &mop500_sdi0_dma_cfg_rx,
  60. .dma_tx_param = &mop500_sdi0_dma_cfg_tx,
  61. #endif
  62. };
  63. static void sdi0_configure(struct device *parent)
  64. {
  65. /* Add the device, force v2 to subrevision 1 */
  66. db8500_add_sdi0(parent, &mop500_sdi0_data, U8500_SDI_V2_PERIPHID);
  67. }
  68. void mop500_sdi_tc35892_init(struct device *parent)
  69. {
  70. mop500_sdi0_data.gpio_cd = GPIO_SDMMC_CD;
  71. sdi0_configure(parent);
  72. }
  73. /*
  74. * SDI1 (SDIO WLAN)
  75. */
  76. #ifdef CONFIG_STE_DMA40
  77. static struct stedma40_chan_cfg sdi1_dma_cfg_rx = {
  78. .mode = STEDMA40_MODE_LOGICAL,
  79. .dir = STEDMA40_PERIPH_TO_MEM,
  80. .src_dev_type = DB8500_DMA_DEV32_SD_MM1_RX,
  81. .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
  82. .src_info.data_width = STEDMA40_WORD_WIDTH,
  83. .dst_info.data_width = STEDMA40_WORD_WIDTH,
  84. };
  85. static struct stedma40_chan_cfg sdi1_dma_cfg_tx = {
  86. .mode = STEDMA40_MODE_LOGICAL,
  87. .dir = STEDMA40_MEM_TO_PERIPH,
  88. .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
  89. .dst_dev_type = DB8500_DMA_DEV32_SD_MM1_TX,
  90. .src_info.data_width = STEDMA40_WORD_WIDTH,
  91. .dst_info.data_width = STEDMA40_WORD_WIDTH,
  92. };
  93. #endif
  94. struct mmci_platform_data mop500_sdi1_data = {
  95. .ocr_mask = MMC_VDD_29_30,
  96. .f_max = 50000000,
  97. .capabilities = MMC_CAP_4_BIT_DATA,
  98. .gpio_cd = -1,
  99. .gpio_wp = -1,
  100. #ifdef CONFIG_STE_DMA40
  101. .dma_filter = stedma40_filter,
  102. .dma_rx_param = &sdi1_dma_cfg_rx,
  103. .dma_tx_param = &sdi1_dma_cfg_tx,
  104. #endif
  105. };
  106. /*
  107. * SDI 2 (POP eMMC, not on DB8500ed)
  108. */
  109. #ifdef CONFIG_STE_DMA40
  110. struct stedma40_chan_cfg mop500_sdi2_dma_cfg_rx = {
  111. .mode = STEDMA40_MODE_LOGICAL,
  112. .dir = STEDMA40_PERIPH_TO_MEM,
  113. .src_dev_type = DB8500_DMA_DEV28_SD_MM2_RX,
  114. .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
  115. .src_info.data_width = STEDMA40_WORD_WIDTH,
  116. .dst_info.data_width = STEDMA40_WORD_WIDTH,
  117. };
  118. static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = {
  119. .mode = STEDMA40_MODE_LOGICAL,
  120. .dir = STEDMA40_MEM_TO_PERIPH,
  121. .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
  122. .dst_dev_type = DB8500_DMA_DEV28_SD_MM2_TX,
  123. .src_info.data_width = STEDMA40_WORD_WIDTH,
  124. .dst_info.data_width = STEDMA40_WORD_WIDTH,
  125. };
  126. #endif
  127. struct mmci_platform_data mop500_sdi2_data = {
  128. .ocr_mask = MMC_VDD_165_195,
  129. .f_max = 50000000,
  130. .capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
  131. MMC_CAP_MMC_HIGHSPEED,
  132. .gpio_cd = -1,
  133. .gpio_wp = -1,
  134. #ifdef CONFIG_STE_DMA40
  135. .dma_filter = stedma40_filter,
  136. .dma_rx_param = &mop500_sdi2_dma_cfg_rx,
  137. .dma_tx_param = &mop500_sdi2_dma_cfg_tx,
  138. #endif
  139. };
  140. /*
  141. * SDI 4 (on-board eMMC)
  142. */
  143. #ifdef CONFIG_STE_DMA40
  144. struct stedma40_chan_cfg mop500_sdi4_dma_cfg_rx = {
  145. .mode = STEDMA40_MODE_LOGICAL,
  146. .dir = STEDMA40_PERIPH_TO_MEM,
  147. .src_dev_type = DB8500_DMA_DEV42_SD_MM4_RX,
  148. .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
  149. .src_info.data_width = STEDMA40_WORD_WIDTH,
  150. .dst_info.data_width = STEDMA40_WORD_WIDTH,
  151. };
  152. static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx = {
  153. .mode = STEDMA40_MODE_LOGICAL,
  154. .dir = STEDMA40_MEM_TO_PERIPH,
  155. .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
  156. .dst_dev_type = DB8500_DMA_DEV42_SD_MM4_TX,
  157. .src_info.data_width = STEDMA40_WORD_WIDTH,
  158. .dst_info.data_width = STEDMA40_WORD_WIDTH,
  159. };
  160. #endif
  161. struct mmci_platform_data mop500_sdi4_data = {
  162. .ocr_mask = MMC_VDD_29_30,
  163. .f_max = 50000000,
  164. .capabilities = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
  165. MMC_CAP_MMC_HIGHSPEED,
  166. .gpio_cd = -1,
  167. .gpio_wp = -1,
  168. #ifdef CONFIG_STE_DMA40
  169. .dma_filter = stedma40_filter,
  170. .dma_rx_param = &mop500_sdi4_dma_cfg_rx,
  171. .dma_tx_param = &mop500_sdi4_dma_cfg_tx,
  172. #endif
  173. };
  174. void __init mop500_sdi_init(struct device *parent)
  175. {
  176. /* PoP:ed eMMC */
  177. db8500_add_sdi2(parent, &mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
  178. /* On-board eMMC */
  179. db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
  180. /*
  181. * On boards with the TC35892 GPIO expander, sdi0 will finally
  182. * be added when the TC35892 initializes and calls
  183. * mop500_sdi_tc35892_init() above.
  184. */
  185. }
  186. void __init snowball_sdi_init(struct device *parent)
  187. {
  188. /* On Snowball MMC_CAP_SD_HIGHSPEED isn't supported (Hardware issue?) */
  189. mop500_sdi0_data.capabilities &= ~MMC_CAP_SD_HIGHSPEED;
  190. /* On-board eMMC */
  191. db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
  192. /* External Micro SD slot */
  193. mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO;
  194. mop500_sdi0_data.cd_invert = true;
  195. sdi0_configure(parent);
  196. }
  197. void __init hrefv60_sdi_init(struct device *parent)
  198. {
  199. /* PoP:ed eMMC */
  200. db8500_add_sdi2(parent, &mop500_sdi2_data, U8500_SDI_V2_PERIPHID);
  201. /* On-board eMMC */
  202. db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
  203. /* External Micro SD slot */
  204. mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
  205. sdi0_configure(parent);
  206. /* WLAN SDIO channel */
  207. db8500_add_sdi1(parent, &mop500_sdi1_data, U8500_SDI_V2_PERIPHID);
  208. }