setup-r8a7779.c 12 KB

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  1. /*
  2. * r8a7779 processor support
  3. *
  4. * Copyright (C) 2011, 2013 Renesas Solutions Corp.
  5. * Copyright (C) 2011 Magnus Damm
  6. * Copyright (C) 2013 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/of_platform.h>
  26. #include <linux/platform_data/gpio-rcar.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/delay.h>
  29. #include <linux/input.h>
  30. #include <linux/io.h>
  31. #include <linux/serial_sci.h>
  32. #include <linux/sh_intc.h>
  33. #include <linux/sh_timer.h>
  34. #include <linux/dma-mapping.h>
  35. #include <mach/hardware.h>
  36. #include <mach/irqs.h>
  37. #include <mach/r8a7779.h>
  38. #include <mach/common.h>
  39. #include <asm/mach-types.h>
  40. #include <asm/mach/arch.h>
  41. #include <asm/mach/time.h>
  42. #include <asm/mach/map.h>
  43. #include <asm/hardware/cache-l2x0.h>
  44. static struct map_desc r8a7779_io_desc[] __initdata = {
  45. /* 2M entity map for 0xf0000000 (MPCORE) */
  46. {
  47. .virtual = 0xf0000000,
  48. .pfn = __phys_to_pfn(0xf0000000),
  49. .length = SZ_2M,
  50. .type = MT_DEVICE_NONSHARED
  51. },
  52. /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
  53. {
  54. .virtual = 0xfe000000,
  55. .pfn = __phys_to_pfn(0xfe000000),
  56. .length = SZ_16M,
  57. .type = MT_DEVICE_NONSHARED
  58. },
  59. };
  60. void __init r8a7779_map_io(void)
  61. {
  62. iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
  63. }
  64. static struct resource r8a7779_pfc_resources[] = {
  65. [0] = {
  66. .start = 0xfffc0000,
  67. .end = 0xfffc023b,
  68. .flags = IORESOURCE_MEM,
  69. },
  70. };
  71. static struct platform_device r8a7779_pfc_device = {
  72. .name = "pfc-r8a7779",
  73. .id = -1,
  74. .resource = r8a7779_pfc_resources,
  75. .num_resources = ARRAY_SIZE(r8a7779_pfc_resources),
  76. };
  77. #define R8A7779_GPIO(idx, npins) \
  78. static struct resource r8a7779_gpio##idx##_resources[] = { \
  79. [0] = { \
  80. .start = 0xffc40000 + 0x1000 * (idx), \
  81. .end = 0xffc4002b + 0x1000 * (idx), \
  82. .flags = IORESOURCE_MEM, \
  83. }, \
  84. [1] = { \
  85. .start = gic_iid(0xad + (idx)), \
  86. .flags = IORESOURCE_IRQ, \
  87. } \
  88. }; \
  89. \
  90. static struct gpio_rcar_config r8a7779_gpio##idx##_platform_data = { \
  91. .gpio_base = 32 * (idx), \
  92. .irq_base = 0, \
  93. .number_of_pins = npins, \
  94. .pctl_name = "pfc-r8a7779", \
  95. }; \
  96. \
  97. static struct platform_device r8a7779_gpio##idx##_device = { \
  98. .name = "gpio_rcar", \
  99. .id = idx, \
  100. .resource = r8a7779_gpio##idx##_resources, \
  101. .num_resources = ARRAY_SIZE(r8a7779_gpio##idx##_resources), \
  102. .dev = { \
  103. .platform_data = &r8a7779_gpio##idx##_platform_data, \
  104. }, \
  105. }
  106. R8A7779_GPIO(0, 32);
  107. R8A7779_GPIO(1, 32);
  108. R8A7779_GPIO(2, 32);
  109. R8A7779_GPIO(3, 32);
  110. R8A7779_GPIO(4, 32);
  111. R8A7779_GPIO(5, 32);
  112. R8A7779_GPIO(6, 9);
  113. static struct platform_device *r8a7779_pinctrl_devices[] __initdata = {
  114. &r8a7779_pfc_device,
  115. &r8a7779_gpio0_device,
  116. &r8a7779_gpio1_device,
  117. &r8a7779_gpio2_device,
  118. &r8a7779_gpio3_device,
  119. &r8a7779_gpio4_device,
  120. &r8a7779_gpio5_device,
  121. &r8a7779_gpio6_device,
  122. };
  123. void __init r8a7779_pinmux_init(void)
  124. {
  125. platform_add_devices(r8a7779_pinctrl_devices,
  126. ARRAY_SIZE(r8a7779_pinctrl_devices));
  127. }
  128. static struct plat_sci_port scif0_platform_data = {
  129. .mapbase = 0xffe40000,
  130. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  131. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  132. .scbrr_algo_id = SCBRR_ALGO_2,
  133. .type = PORT_SCIF,
  134. .irqs = SCIx_IRQ_MUXED(gic_iid(0x78)),
  135. };
  136. static struct platform_device scif0_device = {
  137. .name = "sh-sci",
  138. .id = 0,
  139. .dev = {
  140. .platform_data = &scif0_platform_data,
  141. },
  142. };
  143. static struct plat_sci_port scif1_platform_data = {
  144. .mapbase = 0xffe41000,
  145. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  146. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  147. .scbrr_algo_id = SCBRR_ALGO_2,
  148. .type = PORT_SCIF,
  149. .irqs = SCIx_IRQ_MUXED(gic_iid(0x79)),
  150. };
  151. static struct platform_device scif1_device = {
  152. .name = "sh-sci",
  153. .id = 1,
  154. .dev = {
  155. .platform_data = &scif1_platform_data,
  156. },
  157. };
  158. static struct plat_sci_port scif2_platform_data = {
  159. .mapbase = 0xffe42000,
  160. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  161. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  162. .scbrr_algo_id = SCBRR_ALGO_2,
  163. .type = PORT_SCIF,
  164. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7a)),
  165. };
  166. static struct platform_device scif2_device = {
  167. .name = "sh-sci",
  168. .id = 2,
  169. .dev = {
  170. .platform_data = &scif2_platform_data,
  171. },
  172. };
  173. static struct plat_sci_port scif3_platform_data = {
  174. .mapbase = 0xffe43000,
  175. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  176. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  177. .scbrr_algo_id = SCBRR_ALGO_2,
  178. .type = PORT_SCIF,
  179. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7b)),
  180. };
  181. static struct platform_device scif3_device = {
  182. .name = "sh-sci",
  183. .id = 3,
  184. .dev = {
  185. .platform_data = &scif3_platform_data,
  186. },
  187. };
  188. static struct plat_sci_port scif4_platform_data = {
  189. .mapbase = 0xffe44000,
  190. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  191. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  192. .scbrr_algo_id = SCBRR_ALGO_2,
  193. .type = PORT_SCIF,
  194. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7c)),
  195. };
  196. static struct platform_device scif4_device = {
  197. .name = "sh-sci",
  198. .id = 4,
  199. .dev = {
  200. .platform_data = &scif4_platform_data,
  201. },
  202. };
  203. static struct plat_sci_port scif5_platform_data = {
  204. .mapbase = 0xffe45000,
  205. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  206. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  207. .scbrr_algo_id = SCBRR_ALGO_2,
  208. .type = PORT_SCIF,
  209. .irqs = SCIx_IRQ_MUXED(gic_iid(0x7d)),
  210. };
  211. static struct platform_device scif5_device = {
  212. .name = "sh-sci",
  213. .id = 5,
  214. .dev = {
  215. .platform_data = &scif5_platform_data,
  216. },
  217. };
  218. /* TMU */
  219. static struct sh_timer_config tmu00_platform_data = {
  220. .name = "TMU00",
  221. .channel_offset = 0x4,
  222. .timer_bit = 0,
  223. .clockevent_rating = 200,
  224. };
  225. static struct resource tmu00_resources[] = {
  226. [0] = {
  227. .name = "TMU00",
  228. .start = 0xffd80008,
  229. .end = 0xffd80013,
  230. .flags = IORESOURCE_MEM,
  231. },
  232. [1] = {
  233. .start = gic_iid(0x40),
  234. .flags = IORESOURCE_IRQ,
  235. },
  236. };
  237. static struct platform_device tmu00_device = {
  238. .name = "sh_tmu",
  239. .id = 0,
  240. .dev = {
  241. .platform_data = &tmu00_platform_data,
  242. },
  243. .resource = tmu00_resources,
  244. .num_resources = ARRAY_SIZE(tmu00_resources),
  245. };
  246. static struct sh_timer_config tmu01_platform_data = {
  247. .name = "TMU01",
  248. .channel_offset = 0x10,
  249. .timer_bit = 1,
  250. .clocksource_rating = 200,
  251. };
  252. static struct resource tmu01_resources[] = {
  253. [0] = {
  254. .name = "TMU01",
  255. .start = 0xffd80014,
  256. .end = 0xffd8001f,
  257. .flags = IORESOURCE_MEM,
  258. },
  259. [1] = {
  260. .start = gic_iid(0x41),
  261. .flags = IORESOURCE_IRQ,
  262. },
  263. };
  264. static struct platform_device tmu01_device = {
  265. .name = "sh_tmu",
  266. .id = 1,
  267. .dev = {
  268. .platform_data = &tmu01_platform_data,
  269. },
  270. .resource = tmu01_resources,
  271. .num_resources = ARRAY_SIZE(tmu01_resources),
  272. };
  273. /* I2C */
  274. static struct resource rcar_i2c0_res[] = {
  275. {
  276. .start = 0xffc70000,
  277. .end = 0xffc70fff,
  278. .flags = IORESOURCE_MEM,
  279. }, {
  280. .start = gic_iid(0x6f),
  281. .flags = IORESOURCE_IRQ,
  282. },
  283. };
  284. static struct platform_device i2c0_device = {
  285. .name = "i2c-rcar",
  286. .id = 0,
  287. .resource = rcar_i2c0_res,
  288. .num_resources = ARRAY_SIZE(rcar_i2c0_res),
  289. };
  290. static struct resource rcar_i2c1_res[] = {
  291. {
  292. .start = 0xffc71000,
  293. .end = 0xffc71fff,
  294. .flags = IORESOURCE_MEM,
  295. }, {
  296. .start = gic_iid(0x72),
  297. .flags = IORESOURCE_IRQ,
  298. },
  299. };
  300. static struct platform_device i2c1_device = {
  301. .name = "i2c-rcar",
  302. .id = 1,
  303. .resource = rcar_i2c1_res,
  304. .num_resources = ARRAY_SIZE(rcar_i2c1_res),
  305. };
  306. static struct resource rcar_i2c2_res[] = {
  307. {
  308. .start = 0xffc72000,
  309. .end = 0xffc72fff,
  310. .flags = IORESOURCE_MEM,
  311. }, {
  312. .start = gic_iid(0x70),
  313. .flags = IORESOURCE_IRQ,
  314. },
  315. };
  316. static struct platform_device i2c2_device = {
  317. .name = "i2c-rcar",
  318. .id = 2,
  319. .resource = rcar_i2c2_res,
  320. .num_resources = ARRAY_SIZE(rcar_i2c2_res),
  321. };
  322. static struct resource rcar_i2c3_res[] = {
  323. {
  324. .start = 0xffc73000,
  325. .end = 0xffc73fff,
  326. .flags = IORESOURCE_MEM,
  327. }, {
  328. .start = gic_iid(0x71),
  329. .flags = IORESOURCE_IRQ,
  330. },
  331. };
  332. static struct platform_device i2c3_device = {
  333. .name = "i2c-rcar",
  334. .id = 3,
  335. .resource = rcar_i2c3_res,
  336. .num_resources = ARRAY_SIZE(rcar_i2c3_res),
  337. };
  338. static struct resource sata_resources[] = {
  339. [0] = {
  340. .name = "rcar-sata",
  341. .start = 0xfc600000,
  342. .end = 0xfc601fff,
  343. .flags = IORESOURCE_MEM,
  344. },
  345. [1] = {
  346. .start = gic_iid(0x84),
  347. .flags = IORESOURCE_IRQ,
  348. },
  349. };
  350. static struct platform_device sata_device = {
  351. .name = "sata_rcar",
  352. .id = -1,
  353. .resource = sata_resources,
  354. .num_resources = ARRAY_SIZE(sata_resources),
  355. .dev = {
  356. .dma_mask = &sata_device.dev.coherent_dma_mask,
  357. .coherent_dma_mask = DMA_BIT_MASK(32),
  358. },
  359. };
  360. /* Ether */
  361. static struct resource ether_resources[] = {
  362. {
  363. .start = 0xfde00000,
  364. .end = 0xfde003ff,
  365. .flags = IORESOURCE_MEM,
  366. }, {
  367. .start = gic_iid(0xb4),
  368. .flags = IORESOURCE_IRQ,
  369. },
  370. };
  371. static struct platform_device *r8a7779_devices_dt[] __initdata = {
  372. &scif0_device,
  373. &scif1_device,
  374. &scif2_device,
  375. &scif3_device,
  376. &scif4_device,
  377. &scif5_device,
  378. &tmu00_device,
  379. &tmu01_device,
  380. };
  381. static struct platform_device *r8a7779_late_devices[] __initdata = {
  382. &i2c0_device,
  383. &i2c1_device,
  384. &i2c2_device,
  385. &i2c3_device,
  386. &sata_device,
  387. };
  388. void __init r8a7779_add_standard_devices(void)
  389. {
  390. #ifdef CONFIG_CACHE_L2X0
  391. /* Early BRESP enable, Shared attribute override enable, 64K*16way */
  392. l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff);
  393. #endif
  394. r8a7779_pm_init();
  395. r8a7779_init_pm_domains();
  396. platform_add_devices(r8a7779_devices_dt,
  397. ARRAY_SIZE(r8a7779_devices_dt));
  398. platform_add_devices(r8a7779_late_devices,
  399. ARRAY_SIZE(r8a7779_late_devices));
  400. }
  401. void __init r8a7779_add_ether_device(struct sh_eth_plat_data *pdata)
  402. {
  403. platform_device_register_resndata(&platform_bus, "sh_eth", -1,
  404. ether_resources,
  405. ARRAY_SIZE(ether_resources),
  406. pdata, sizeof(*pdata));
  407. }
  408. /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
  409. void __init __weak r8a7779_register_twd(void) { }
  410. void __init r8a7779_earlytimer_init(void)
  411. {
  412. r8a7779_clock_init();
  413. shmobile_earlytimer_init();
  414. r8a7779_register_twd();
  415. }
  416. void __init r8a7779_add_early_devices(void)
  417. {
  418. early_platform_add_devices(r8a7779_devices_dt,
  419. ARRAY_SIZE(r8a7779_devices_dt));
  420. /* Early serial console setup is not included here due to
  421. * memory map collisions. The SCIF serial ports in r8a7779
  422. * are difficult to entity map 1:1 due to collision with the
  423. * virtual memory range used by the coherent DMA code on ARM.
  424. *
  425. * Anyone wanting to debug early can remove UPF_IOREMAP from
  426. * the sh-sci serial console platform data, adjust mapbase
  427. * to a static M:N virt:phys mapping that needs to be added to
  428. * the mappings passed with iotable_init() above.
  429. *
  430. * Then add a call to shmobile_setup_console() from this function.
  431. *
  432. * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
  433. * command line in case of the marzen board.
  434. */
  435. }
  436. #ifdef CONFIG_USE_OF
  437. void __init r8a7779_init_delay(void)
  438. {
  439. shmobile_setup_delay(1000, 2, 4); /* Cortex-A9 @ 1000MHz */
  440. }
  441. static const struct of_dev_auxdata r8a7779_auxdata_lookup[] __initconst = {
  442. {},
  443. };
  444. void __init r8a7779_add_standard_devices_dt(void)
  445. {
  446. /* clocks are setup late during boot in the case of DT */
  447. r8a7779_clock_init();
  448. platform_add_devices(r8a7779_devices_dt,
  449. ARRAY_SIZE(r8a7779_devices_dt));
  450. of_platform_populate(NULL, of_default_bus_match_table,
  451. r8a7779_auxdata_lookup, NULL);
  452. }
  453. static const char *r8a7779_compat_dt[] __initdata = {
  454. "renesas,r8a7779",
  455. NULL,
  456. };
  457. DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
  458. .map_io = r8a7779_map_io,
  459. .init_early = r8a7779_init_delay,
  460. .nr_irqs = NR_IRQS_LEGACY,
  461. .init_irq = r8a7779_init_irq_dt,
  462. .init_machine = r8a7779_add_standard_devices_dt,
  463. .init_time = shmobile_timer_init,
  464. .dt_compat = r8a7779_compat_dt,
  465. MACHINE_END
  466. #endif /* CONFIG_USE_OF */