intc-r8a7740.c 2.0 KB

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  1. /*
  2. * R8A7740 processor support
  3. *
  4. * Copyright (C) 2011 Renesas Solutions Corp.
  5. * Copyright (C) 2011 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/init.h>
  21. #include <linux/io.h>
  22. #include <linux/irqchip/arm-gic.h>
  23. void __init r8a7740_init_irq(void)
  24. {
  25. void __iomem *gic_dist_base = ioremap_nocache(0xc2800000, 0x1000);
  26. void __iomem *gic_cpu_base = ioremap_nocache(0xc2000000, 0x1000);
  27. void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
  28. void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10);
  29. void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4);
  30. /* initialize the Generic Interrupt Controller PL390 r0p0 */
  31. gic_init(0, 29, gic_dist_base, gic_cpu_base);
  32. /* route signals to GIC */
  33. iowrite32(0x0, pfc_inta_ctrl);
  34. /*
  35. * To mask the shared interrupt to SPI 149 we must ensure to set
  36. * PRIO *and* MASK. Else we run into IRQ floods when registering
  37. * the intc_irqpin devices
  38. */
  39. iowrite32(0x0, intc_prio_base + 0x0);
  40. iowrite32(0x0, intc_prio_base + 0x4);
  41. iowrite32(0x0, intc_prio_base + 0x8);
  42. iowrite32(0x0, intc_prio_base + 0xc);
  43. iowrite8(0xff, intc_msk_base + 0x0);
  44. iowrite8(0xff, intc_msk_base + 0x4);
  45. iowrite8(0xff, intc_msk_base + 0x8);
  46. iowrite8(0xff, intc_msk_base + 0xc);
  47. iounmap(intc_prio_base);
  48. iounmap(intc_msk_base);
  49. iounmap(pfc_inta_ctrl);
  50. }