clock-r8a7778.c 3.3 KB

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  1. /*
  2. * r8a7778 clock framework support
  3. *
  4. * Copyright (C) 2013 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. *
  7. * based on r8a7779
  8. *
  9. * Copyright (C) 2011 Renesas Solutions Corp.
  10. * Copyright (C) 2011 Magnus Damm
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. */
  25. #include <linux/io.h>
  26. #include <linux/sh_clk.h>
  27. #include <linux/clkdev.h>
  28. #include <mach/common.h>
  29. #define MSTPCR0 IOMEM(0xffc80030)
  30. #define MSTPCR1 IOMEM(0xffc80034)
  31. #define MSTPCR3 IOMEM(0xffc8003c)
  32. #define MSTPSR1 IOMEM(0xffc80044)
  33. #define MSTPSR4 IOMEM(0xffc80048)
  34. #define MSTPSR6 IOMEM(0xffc8004c)
  35. #define MSTPCR4 IOMEM(0xffc80050)
  36. #define MSTPCR5 IOMEM(0xffc80054)
  37. #define MSTPCR6 IOMEM(0xffc80058)
  38. /* ioremap() through clock mapping mandatory to avoid
  39. * collision with ARM coherent DMA virtual memory range.
  40. */
  41. static struct clk_mapping cpg_mapping = {
  42. .phys = 0xffc80000,
  43. .len = 0x80,
  44. };
  45. static struct clk clkp = {
  46. .rate = 62500000, /* FIXME: shortcut */
  47. .flags = CLK_ENABLE_ON_INIT,
  48. .mapping = &cpg_mapping,
  49. };
  50. static struct clk *main_clks[] = {
  51. &clkp,
  52. };
  53. enum {
  54. MSTP114,
  55. MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
  56. MSTP016, MSTP015,
  57. MSTP_NR };
  58. static struct clk mstp_clks[MSTP_NR] = {
  59. [MSTP114] = SH_CLK_MSTP32(&clkp, MSTPCR1, 14, 0), /* Ether */
  60. [MSTP026] = SH_CLK_MSTP32(&clkp, MSTPCR0, 26, 0), /* SCIF0 */
  61. [MSTP025] = SH_CLK_MSTP32(&clkp, MSTPCR0, 25, 0), /* SCIF1 */
  62. [MSTP024] = SH_CLK_MSTP32(&clkp, MSTPCR0, 24, 0), /* SCIF2 */
  63. [MSTP023] = SH_CLK_MSTP32(&clkp, MSTPCR0, 23, 0), /* SCIF3 */
  64. [MSTP022] = SH_CLK_MSTP32(&clkp, MSTPCR0, 22, 0), /* SCIF4 */
  65. [MSTP021] = SH_CLK_MSTP32(&clkp, MSTPCR0, 21, 0), /* SCIF5 */
  66. [MSTP016] = SH_CLK_MSTP32(&clkp, MSTPCR0, 16, 0), /* TMU0 */
  67. [MSTP015] = SH_CLK_MSTP32(&clkp, MSTPCR0, 15, 0), /* TMU1 */
  68. };
  69. static struct clk_lookup lookups[] = {
  70. /* MSTP32 clocks */
  71. CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP114]), /* Ether */
  72. CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
  73. CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
  74. CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
  75. CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */
  76. CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
  77. CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
  78. CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
  79. CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
  80. };
  81. void __init r8a7778_clock_init(void)
  82. {
  83. int k, ret = 0;
  84. for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
  85. ret = clk_register(main_clks[k]);
  86. if (!ret)
  87. ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
  88. clkdev_add_table(lookups, ARRAY_SIZE(lookups));
  89. if (!ret)
  90. shmobile_clk_init();
  91. else
  92. panic("failed to setup r8a7778 clocks\n");
  93. }