clk.h 3.0 KB

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  1. #ifndef __MACH_IMX_CLK_H
  2. #define __MACH_IMX_CLK_H
  3. #include <linux/spinlock.h>
  4. #include <linux/clk-provider.h>
  5. extern spinlock_t imx_ccm_lock;
  6. struct clk *imx_clk_pllv1(const char *name, const char *parent,
  7. void __iomem *base);
  8. struct clk *imx_clk_pllv2(const char *name, const char *parent,
  9. void __iomem *base);
  10. enum imx_pllv3_type {
  11. IMX_PLLV3_GENERIC,
  12. IMX_PLLV3_SYS,
  13. IMX_PLLV3_USB,
  14. IMX_PLLV3_AV,
  15. IMX_PLLV3_ENET,
  16. IMX_PLLV3_MLB,
  17. };
  18. struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
  19. const char *parent_name, void __iomem *base, u32 div_mask);
  20. struct clk *clk_register_gate2(struct device *dev, const char *name,
  21. const char *parent_name, unsigned long flags,
  22. void __iomem *reg, u8 bit_idx,
  23. u8 clk_gate_flags, spinlock_t *lock);
  24. static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
  25. void __iomem *reg, u8 shift)
  26. {
  27. return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
  28. shift, 0, &imx_ccm_lock);
  29. }
  30. struct clk *imx_clk_pfd(const char *name, const char *parent_name,
  31. void __iomem *reg, u8 idx);
  32. struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
  33. void __iomem *reg, u8 shift, u8 width,
  34. void __iomem *busy_reg, u8 busy_shift);
  35. struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
  36. u8 width, void __iomem *busy_reg, u8 busy_shift,
  37. const char **parent_names, int num_parents);
  38. static inline struct clk *imx_clk_fixed(const char *name, int rate)
  39. {
  40. return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
  41. }
  42. static inline struct clk *imx_clk_divider(const char *name, const char *parent,
  43. void __iomem *reg, u8 shift, u8 width)
  44. {
  45. return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
  46. reg, shift, width, 0, &imx_ccm_lock);
  47. }
  48. static inline struct clk *imx_clk_divider_flags(const char *name,
  49. const char *parent, void __iomem *reg, u8 shift, u8 width,
  50. unsigned long flags)
  51. {
  52. return clk_register_divider(NULL, name, parent, flags,
  53. reg, shift, width, 0, &imx_ccm_lock);
  54. }
  55. static inline struct clk *imx_clk_gate(const char *name, const char *parent,
  56. void __iomem *reg, u8 shift)
  57. {
  58. return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
  59. shift, 0, &imx_ccm_lock);
  60. }
  61. static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
  62. u8 shift, u8 width, const char **parents, int num_parents)
  63. {
  64. return clk_register_mux(NULL, name, parents, num_parents, 0, reg, shift,
  65. width, 0, &imx_ccm_lock);
  66. }
  67. static inline struct clk *imx_clk_mux_flags(const char *name,
  68. void __iomem *reg, u8 shift, u8 width, const char **parents,
  69. int num_parents, unsigned long flags)
  70. {
  71. return clk_register_mux(NULL, name, parents, num_parents,
  72. flags, reg, shift, width, 0,
  73. &imx_ccm_lock);
  74. }
  75. static inline struct clk *imx_clk_fixed_factor(const char *name,
  76. const char *parent, unsigned int mult, unsigned int div)
  77. {
  78. return clk_register_fixed_factor(NULL, name, parent,
  79. CLK_SET_RATE_PARENT, mult, div);
  80. }
  81. #endif