highbank.c 4.5 KB

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  1. /*
  2. * Copyright 2010-2011 Calxeda, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program. If not, see <http://www.gnu.org/licenses/>.
  15. */
  16. #include <linux/clk.h>
  17. #include <linux/clkdev.h>
  18. #include <linux/clocksource.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/io.h>
  21. #include <linux/irq.h>
  22. #include <linux/irqchip.h>
  23. #include <linux/irqdomain.h>
  24. #include <linux/of.h>
  25. #include <linux/of_irq.h>
  26. #include <linux/of_platform.h>
  27. #include <linux/of_address.h>
  28. #include <linux/smp.h>
  29. #include <linux/amba/bus.h>
  30. #include <linux/clk-provider.h>
  31. #include <asm/cacheflush.h>
  32. #include <asm/cputype.h>
  33. #include <asm/smp_plat.h>
  34. #include <asm/hardware/cache-l2x0.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach/map.h>
  37. #include <asm/mach/time.h>
  38. #include "core.h"
  39. #include "sysregs.h"
  40. void __iomem *sregs_base;
  41. void __iomem *scu_base_addr;
  42. static void __init highbank_scu_map_io(void)
  43. {
  44. unsigned long base;
  45. /* Get SCU base */
  46. asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
  47. scu_base_addr = ioremap(base, SZ_4K);
  48. }
  49. #define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu)))
  50. #define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
  51. void highbank_set_cpu_jump(int cpu, void *jump_addr)
  52. {
  53. cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(cpu), 0);
  54. writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu));
  55. __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
  56. outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
  57. HB_JUMP_TABLE_PHYS(cpu) + 15);
  58. }
  59. #ifdef CONFIG_CACHE_L2X0
  60. static void highbank_l2x0_disable(void)
  61. {
  62. /* Disable PL310 L2 Cache controller */
  63. highbank_smc1(0x102, 0x0);
  64. }
  65. #endif
  66. static void __init highbank_init_irq(void)
  67. {
  68. irqchip_init();
  69. if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
  70. highbank_scu_map_io();
  71. #ifdef CONFIG_CACHE_L2X0
  72. /* Enable PL310 L2 Cache controller */
  73. highbank_smc1(0x102, 0x1);
  74. l2x0_of_init(0, ~0UL);
  75. outer_cache.disable = highbank_l2x0_disable;
  76. #endif
  77. }
  78. static void __init highbank_timer_init(void)
  79. {
  80. struct device_node *np;
  81. /* Map system registers */
  82. np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
  83. sregs_base = of_iomap(np, 0);
  84. WARN_ON(!sregs_base);
  85. of_clk_init(NULL);
  86. clocksource_of_init();
  87. }
  88. static void highbank_power_off(void)
  89. {
  90. highbank_set_pwr_shutdown();
  91. while (1)
  92. cpu_do_idle();
  93. }
  94. static int highbank_platform_notifier(struct notifier_block *nb,
  95. unsigned long event, void *__dev)
  96. {
  97. struct resource *res;
  98. int reg = -1;
  99. struct device *dev = __dev;
  100. if (event != BUS_NOTIFY_ADD_DEVICE)
  101. return NOTIFY_DONE;
  102. if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci"))
  103. reg = 0xc;
  104. else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci"))
  105. reg = 0x18;
  106. else if (of_device_is_compatible(dev->of_node, "arm,pl330"))
  107. reg = 0x20;
  108. else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) {
  109. res = platform_get_resource(to_platform_device(dev),
  110. IORESOURCE_MEM, 0);
  111. if (res) {
  112. if (res->start == 0xfff50000)
  113. reg = 0;
  114. else if (res->start == 0xfff51000)
  115. reg = 4;
  116. }
  117. }
  118. if (reg < 0)
  119. return NOTIFY_DONE;
  120. if (of_property_read_bool(dev->of_node, "dma-coherent")) {
  121. writel(0xff31, sregs_base + reg);
  122. set_dma_ops(dev, &arm_coherent_dma_ops);
  123. } else
  124. writel(0, sregs_base + reg);
  125. return NOTIFY_OK;
  126. }
  127. static struct notifier_block highbank_amba_nb = {
  128. .notifier_call = highbank_platform_notifier,
  129. };
  130. static struct notifier_block highbank_platform_nb = {
  131. .notifier_call = highbank_platform_notifier,
  132. };
  133. static void __init highbank_init(void)
  134. {
  135. pm_power_off = highbank_power_off;
  136. highbank_pm_init();
  137. bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
  138. bus_register_notifier(&amba_bustype, &highbank_amba_nb);
  139. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  140. }
  141. static const char *highbank_match[] __initconst = {
  142. "calxeda,highbank",
  143. "calxeda,ecx-2000",
  144. NULL,
  145. };
  146. DT_MACHINE_START(HIGHBANK, "Highbank")
  147. .smp = smp_ops(highbank_smp_ops),
  148. .map_io = debug_ll_io_init,
  149. .init_irq = highbank_init_irq,
  150. .init_time = highbank_timer_init,
  151. .init_machine = highbank_init,
  152. .dt_compat = highbank_match,
  153. .restart = highbank_restart,
  154. MACHINE_END