vt8500.dtsi 2.8 KB

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  1. /*
  2. * vt8500.dtsi - Device tree file for VIA VT8500 SoC
  3. *
  4. * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
  5. *
  6. * Licensed under GPLv2 or later
  7. */
  8. /include/ "skeleton.dtsi"
  9. / {
  10. compatible = "via,vt8500";
  11. soc {
  12. #address-cells = <1>;
  13. #size-cells = <1>;
  14. compatible = "simple-bus";
  15. ranges;
  16. interrupt-parent = <&intc>;
  17. intc: interrupt-controller@d8140000 {
  18. compatible = "via,vt8500-intc";
  19. interrupt-controller;
  20. reg = <0xd8140000 0x10000>;
  21. #interrupt-cells = <1>;
  22. };
  23. pinctrl: pinctrl@d8110000 {
  24. compatible = "via,vt8500-pinctrl";
  25. reg = <0xd8110000 0x10000>;
  26. interrupt-controller;
  27. #interrupt-cells = <2>;
  28. gpio-controller;
  29. #gpio-cells = <2>;
  30. };
  31. pmc@d8130000 {
  32. compatible = "via,vt8500-pmc";
  33. reg = <0xd8130000 0x1000>;
  34. clocks {
  35. #address-cells = <1>;
  36. #size-cells = <0>;
  37. ref24: ref24M {
  38. #clock-cells = <0>;
  39. compatible = "fixed-clock";
  40. clock-frequency = <24000000>;
  41. };
  42. clkuart0: uart0 {
  43. #clock-cells = <0>;
  44. compatible = "via,vt8500-device-clock";
  45. clocks = <&ref24>;
  46. enable-reg = <0x250>;
  47. enable-bit = <1>;
  48. };
  49. clkuart1: uart1 {
  50. #clock-cells = <0>;
  51. compatible = "via,vt8500-device-clock";
  52. clocks = <&ref24>;
  53. enable-reg = <0x250>;
  54. enable-bit = <2>;
  55. };
  56. clkuart2: uart2 {
  57. #clock-cells = <0>;
  58. compatible = "via,vt8500-device-clock";
  59. clocks = <&ref24>;
  60. enable-reg = <0x250>;
  61. enable-bit = <3>;
  62. };
  63. clkuart3: uart3 {
  64. #clock-cells = <0>;
  65. compatible = "via,vt8500-device-clock";
  66. clocks = <&ref24>;
  67. enable-reg = <0x250>;
  68. enable-bit = <4>;
  69. };
  70. };
  71. };
  72. timer@d8130100 {
  73. compatible = "via,vt8500-timer";
  74. reg = <0xd8130100 0x28>;
  75. interrupts = <36>;
  76. };
  77. ehci@d8007900 {
  78. compatible = "via,vt8500-ehci";
  79. reg = <0xd8007900 0x200>;
  80. interrupts = <43>;
  81. };
  82. uhci@d8007b00 {
  83. compatible = "platform-uhci";
  84. reg = <0xd8007b00 0x200>;
  85. interrupts = <43>;
  86. };
  87. fb: fb@d8050800 {
  88. compatible = "via,vt8500-fb";
  89. reg = <0xd800e400 0x400>;
  90. interrupts = <12>;
  91. };
  92. ge_rops@d8050400 {
  93. compatible = "wm,prizm-ge-rops";
  94. reg = <0xd8050400 0x100>;
  95. };
  96. uart@d8200000 {
  97. compatible = "via,vt8500-uart";
  98. reg = <0xd8200000 0x1040>;
  99. interrupts = <32>;
  100. clocks = <&clkuart0>;
  101. };
  102. uart@d82b0000 {
  103. compatible = "via,vt8500-uart";
  104. reg = <0xd82b0000 0x1040>;
  105. interrupts = <33>;
  106. clocks = <&clkuart1>;
  107. };
  108. uart@d8210000 {
  109. compatible = "via,vt8500-uart";
  110. reg = <0xd8210000 0x1040>;
  111. interrupts = <47>;
  112. clocks = <&clkuart2>;
  113. };
  114. uart@d82c0000 {
  115. compatible = "via,vt8500-uart";
  116. reg = <0xd82c0000 0x1040>;
  117. interrupts = <50>;
  118. clocks = <&clkuart3>;
  119. };
  120. rtc@d8100000 {
  121. compatible = "via,vt8500-rtc";
  122. reg = <0xd8100000 0x10000>;
  123. interrupts = <48>;
  124. };
  125. };
  126. };