spear13xx.dtsi 7.2 KB

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  1. /*
  2. * DTS file for all SPEAr13xx SoCs
  3. *
  4. * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
  5. *
  6. * The code contained herein is licensed under the GNU General Public
  7. * License. You may obtain a copy of the GNU General Public License
  8. * Version 2 or later at the following locations:
  9. *
  10. * http://www.opensource.org/licenses/gpl-license.html
  11. * http://www.gnu.org/copyleft/gpl.html
  12. */
  13. /include/ "skeleton.dtsi"
  14. / {
  15. interrupt-parent = <&gic>;
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. cpu@0 {
  20. compatible = "arm,cortex-a9";
  21. reg = <0>;
  22. next-level-cache = <&L2>;
  23. };
  24. cpu@1 {
  25. compatible = "arm,cortex-a9";
  26. reg = <1>;
  27. next-level-cache = <&L2>;
  28. };
  29. };
  30. gic: interrupt-controller@ec801000 {
  31. compatible = "arm,cortex-a9-gic";
  32. interrupt-controller;
  33. #interrupt-cells = <3>;
  34. reg = < 0xec801000 0x1000 >,
  35. < 0xec800100 0x0100 >;
  36. };
  37. pmu {
  38. compatible = "arm,cortex-a9-pmu";
  39. interrupts = <0 6 0x04
  40. 0 7 0x04>;
  41. };
  42. L2: l2-cache {
  43. compatible = "arm,pl310-cache";
  44. reg = <0xed000000 0x1000>;
  45. cache-unified;
  46. cache-level = <2>;
  47. };
  48. memory {
  49. name = "memory";
  50. device_type = "memory";
  51. reg = <0 0x40000000>;
  52. };
  53. chosen {
  54. bootargs = "console=ttyAMA0,115200";
  55. };
  56. cpufreq {
  57. compatible = "st,cpufreq-spear";
  58. cpufreq_tbl = < 166000
  59. 200000
  60. 250000
  61. 300000
  62. 400000
  63. 500000
  64. 600000 >;
  65. status = "disabled";
  66. };
  67. ahb {
  68. #address-cells = <1>;
  69. #size-cells = <1>;
  70. compatible = "simple-bus";
  71. ranges = <0x50000000 0x50000000 0x10000000
  72. 0xb0000000 0xb0000000 0x10000000
  73. 0xd0000000 0xd0000000 0x02000000
  74. 0xd8000000 0xd8000000 0x01000000
  75. 0xe0000000 0xe0000000 0x10000000>;
  76. sdhci@b3000000 {
  77. compatible = "st,sdhci-spear";
  78. reg = <0xb3000000 0x100>;
  79. interrupts = <0 28 0x4>;
  80. status = "disabled";
  81. };
  82. cf@b2800000 {
  83. compatible = "arasan,cf-spear1340";
  84. reg = <0xb2800000 0x1000>;
  85. interrupts = <0 29 0x4>;
  86. status = "disabled";
  87. dmas = <&dwdma0 0 0 0 0>;
  88. dma-names = "data";
  89. };
  90. dwdma0: dma@ea800000 {
  91. compatible = "snps,dma-spear1340";
  92. reg = <0xea800000 0x1000>;
  93. interrupts = <0 19 0x4>;
  94. status = "disabled";
  95. dma-channels = <8>;
  96. #dma-cells = <3>;
  97. dma-requests = <32>;
  98. chan_allocation_order = <1>;
  99. chan_priority = <1>;
  100. block_size = <0xfff>;
  101. dma-masters = <2>;
  102. data_width = <3 3 0 0>;
  103. };
  104. dma@eb000000 {
  105. compatible = "snps,dma-spear1340";
  106. reg = <0xeb000000 0x1000>;
  107. interrupts = <0 59 0x4>;
  108. status = "disabled";
  109. dma-requests = <32>;
  110. dma-channels = <8>;
  111. dma-masters = <2>;
  112. #dma-cells = <3>;
  113. chan_allocation_order = <1>;
  114. chan_priority = <1>;
  115. block_size = <0xfff>;
  116. data_width = <3 3 0 0>;
  117. };
  118. fsmc: flash@b0000000 {
  119. compatible = "st,spear600-fsmc-nand";
  120. #address-cells = <1>;
  121. #size-cells = <1>;
  122. reg = <0xb0000000 0x1000 /* FSMC Register*/
  123. 0xb0800000 0x0010 /* NAND Base DATA */
  124. 0xb0820000 0x0010 /* NAND Base ADDR */
  125. 0xb0810000 0x0010>; /* NAND Base CMD */
  126. reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
  127. interrupts = <0 20 0x4
  128. 0 21 0x4
  129. 0 22 0x4
  130. 0 23 0x4>;
  131. st,mode = <2>;
  132. status = "disabled";
  133. };
  134. gmac0: eth@e2000000 {
  135. compatible = "st,spear600-gmac";
  136. reg = <0xe2000000 0x8000>;
  137. interrupts = <0 33 0x4
  138. 0 34 0x4>;
  139. interrupt-names = "macirq", "eth_wake_irq";
  140. status = "disabled";
  141. };
  142. pcm {
  143. compatible = "st,pcm-audio";
  144. #address-cells = <0>;
  145. #size-cells = <0>;
  146. status = "disabled";
  147. };
  148. smi: flash@ea000000 {
  149. compatible = "st,spear600-smi";
  150. #address-cells = <1>;
  151. #size-cells = <1>;
  152. reg = <0xea000000 0x1000>;
  153. interrupts = <0 30 0x4>;
  154. status = "disabled";
  155. };
  156. ehci@e4800000 {
  157. compatible = "st,spear600-ehci", "usb-ehci";
  158. reg = <0xe4800000 0x1000>;
  159. interrupts = <0 64 0x4>;
  160. usbh0_id = <0>;
  161. status = "disabled";
  162. };
  163. ehci@e5800000 {
  164. compatible = "st,spear600-ehci", "usb-ehci";
  165. reg = <0xe5800000 0x1000>;
  166. interrupts = <0 66 0x4>;
  167. usbh1_id = <1>;
  168. status = "disabled";
  169. };
  170. ohci@e4000000 {
  171. compatible = "st,spear600-ohci", "usb-ohci";
  172. reg = <0xe4000000 0x1000>;
  173. interrupts = <0 65 0x4>;
  174. usbh0_id = <0>;
  175. status = "disabled";
  176. };
  177. ohci@e5000000 {
  178. compatible = "st,spear600-ohci", "usb-ohci";
  179. reg = <0xe5000000 0x1000>;
  180. interrupts = <0 67 0x4>;
  181. usbh1_id = <1>;
  182. status = "disabled";
  183. };
  184. apb {
  185. #address-cells = <1>;
  186. #size-cells = <1>;
  187. compatible = "simple-bus";
  188. ranges = <0x50000000 0x50000000 0x10000000
  189. 0xb0000000 0xb0000000 0x10000000
  190. 0xd0000000 0xd0000000 0x02000000
  191. 0xd8000000 0xd8000000 0x01000000
  192. 0xe0000000 0xe0000000 0x10000000>;
  193. gpio0: gpio@e0600000 {
  194. compatible = "arm,pl061", "arm,primecell";
  195. reg = <0xe0600000 0x1000>;
  196. interrupts = <0 24 0x4>;
  197. gpio-controller;
  198. #gpio-cells = <2>;
  199. interrupt-controller;
  200. #interrupt-cells = <2>;
  201. status = "disabled";
  202. };
  203. gpio1: gpio@e0680000 {
  204. compatible = "arm,pl061", "arm,primecell";
  205. reg = <0xe0680000 0x1000>;
  206. interrupts = <0 25 0x4>;
  207. gpio-controller;
  208. #gpio-cells = <2>;
  209. interrupt-controller;
  210. #interrupt-cells = <2>;
  211. status = "disabled";
  212. };
  213. kbd@e0300000 {
  214. compatible = "st,spear300-kbd";
  215. reg = <0xe0300000 0x1000>;
  216. interrupts = <0 52 0x4>;
  217. status = "disabled";
  218. };
  219. i2c0: i2c@e0280000 {
  220. #address-cells = <1>;
  221. #size-cells = <0>;
  222. compatible = "snps,designware-i2c";
  223. reg = <0xe0280000 0x1000>;
  224. interrupts = <0 41 0x4>;
  225. status = "disabled";
  226. };
  227. i2s@e0180000 {
  228. compatible = "st,designware-i2s";
  229. reg = <0xe0180000 0x1000>;
  230. interrupt-names = "play_irq", "record_irq";
  231. interrupts = <0 10 0x4
  232. 0 11 0x4 >;
  233. status = "disabled";
  234. };
  235. i2s@e0200000 {
  236. compatible = "st,designware-i2s";
  237. reg = <0xe0200000 0x1000>;
  238. interrupt-names = "play_irq", "record_irq";
  239. interrupts = <0 26 0x4
  240. 0 53 0x4>;
  241. status = "disabled";
  242. };
  243. spi0: spi@e0100000 {
  244. compatible = "arm,pl022", "arm,primecell";
  245. reg = <0xe0100000 0x1000>;
  246. #address-cells = <1>;
  247. #size-cells = <0>;
  248. interrupts = <0 31 0x4>;
  249. status = "disabled";
  250. dmas = <&dwdma0 0x2000 0 0 0>, /* 0x4 << 11 */
  251. <&dwdma0 0x0280 0 0 0>; /* 0x5 << 7 */
  252. dma-names = "tx", "rx";
  253. };
  254. rtc@e0580000 {
  255. compatible = "st,spear600-rtc";
  256. reg = <0xe0580000 0x1000>;
  257. interrupts = <0 36 0x4>;
  258. status = "disabled";
  259. };
  260. serial@e0000000 {
  261. compatible = "arm,pl011", "arm,primecell";
  262. reg = <0xe0000000 0x1000>;
  263. interrupts = <0 35 0x4>;
  264. status = "disabled";
  265. };
  266. adc@e0080000 {
  267. compatible = "st,spear600-adc";
  268. reg = <0xe0080000 0x1000>;
  269. interrupts = <0 12 0x4>;
  270. status = "disabled";
  271. };
  272. timer@e0380000 {
  273. compatible = "st,spear-timer";
  274. reg = <0xe0380000 0x400>;
  275. interrupts = <0 37 0x4>;
  276. };
  277. timer@ec800600 {
  278. compatible = "arm,cortex-a9-twd-timer";
  279. reg = <0xec800600 0x20>;
  280. interrupts = <1 13 0x4>;
  281. status = "disabled";
  282. };
  283. wdt@ec800620 {
  284. compatible = "arm,cortex-a9-twd-wdt";
  285. reg = <0xec800620 0x20>;
  286. status = "disabled";
  287. };
  288. thermal@e07008c4 {
  289. compatible = "st,thermal-spear1340";
  290. reg = <0xe07008c4 0x4>;
  291. thermal_flags = <0x7000>;
  292. };
  293. };
  294. };
  295. };