omap3-igep.dtsi 2.7 KB

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  1. /*
  2. * Device Tree Source for IGEP Technology devices
  3. *
  4. * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
  5. * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. /dts-v1/;
  12. /include/ "omap34xx.dtsi"
  13. / {
  14. memory {
  15. device_type = "memory";
  16. reg = <0x80000000 0x20000000>; /* 512 MB */
  17. };
  18. sound {
  19. compatible = "ti,omap-twl4030";
  20. ti,model = "igep2";
  21. ti,mcbsp = <&mcbsp2>;
  22. ti,codec = <&twl_audio>;
  23. };
  24. };
  25. &omap3_pmx_core {
  26. uart1_pins: pinmux_uart1_pins {
  27. pinctrl-single,pins = <
  28. 0x152 0x100 /* uart1_rx.uart1_rx INPUT | MODE0 */
  29. 0x14c 0 /* uart1_tx.uart1_tx OUTPUT | MODE0 */
  30. >;
  31. };
  32. uart2_pins: pinmux_uart2_pins {
  33. pinctrl-single,pins = <
  34. 0x14a 0x100 /* uart2_rx.uart2_rx INPUT | MODE0 */
  35. 0x148 0 /* uart2_tx.uart2_tx OUTPUT | MODE0 */
  36. >;
  37. };
  38. uart3_pins: pinmux_uart3_pins {
  39. pinctrl-single,pins = <
  40. 0x16e 0x100 /* uart3_rx.uart3_rx INPUT | MODE0 */
  41. 0x170 0 /* uart3_tx.uart3_tx OUTPUT | MODE0 */
  42. >;
  43. };
  44. mmc1_pins: pinmux_mmc1_pins {
  45. pinctrl-single,pins = <
  46. 0x114 0x0118 /* sdmmc1_clk.sdmmc1_clk INPUT PULLUP | MODE 0 */
  47. 0x116 0x0118 /* sdmmc1_cmd.sdmmc1_cmd INPUT PULLUP | MODE 0 */
  48. 0x118 0x0118 /* sdmmc1_dat0.sdmmc1_dat0 INPUT PULLUP | MODE 0 */
  49. 0x11a 0x0118 /* sdmmc1_dat1.sdmmc1_dat1 INPUT PULLUP | MODE 0 */
  50. 0x11c 0x0118 /* sdmmc1_dat2.sdmmc1_dat2 INPUT PULLUP | MODE 0 */
  51. 0x11e 0x0118 /* sdmmc1_dat3.sdmmc1_dat3 INPUT PULLUP | MODE 0 */
  52. 0x120 0x0100 /* sdmmc1_dat4.sdmmc1_dat4 INPUT | MODE 0 */
  53. 0x122 0x0100 /* sdmmc1_dat5.sdmmc1_dat5 INPUT | MODE 0 */
  54. 0x124 0x0100 /* sdmmc1_dat6.sdmmc1_dat6 INPUT | MODE 0 */
  55. 0x126 0x0100 /* sdmmc1_dat7.sdmmc1_dat7 INPUT | MODE 0 */
  56. >;
  57. };
  58. };
  59. &i2c1 {
  60. clock-frequency = <2600000>;
  61. twl: twl@48 {
  62. reg = <0x48>;
  63. interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  64. interrupt-parent = <&intc>;
  65. twl_audio: audio {
  66. compatible = "ti,twl4030-audio";
  67. codec {
  68. };
  69. };
  70. };
  71. };
  72. /include/ "twl4030.dtsi"
  73. &i2c2 {
  74. clock-frequency = <400000>;
  75. };
  76. &mmc1 {
  77. pinctrl-names = "default";
  78. pinctrl-0 = <&mmc1_pins>;
  79. vmmc-supply = <&vmmc1>;
  80. vmmc_aux-supply = <&vsim>;
  81. bus-width = <8>;
  82. };
  83. &mmc2 {
  84. status = "disabled";
  85. };
  86. &mmc3 {
  87. status = "disabled";
  88. };
  89. &uart1 {
  90. pinctrl-names = "default";
  91. pinctrl-0 = <&uart1_pins>;
  92. };
  93. &uart2 {
  94. pinctrl-names = "default";
  95. pinctrl-0 = <&uart2_pins>;
  96. };
  97. &uart3 {
  98. pinctrl-names = "default";
  99. pinctrl-0 = <&uart3_pins>;
  100. };
  101. &twl_gpio {
  102. ti,use-leds;
  103. };