exynos5440.dtsi 4.5 KB

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  1. /*
  2. * SAMSUNG EXYNOS5440 SoC device tree source
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. compatible = "samsung,exynos5440";
  14. interrupt-parent = <&gic>;
  15. clock: clock-controller@0x160000 {
  16. compatible = "samsung,exynos5440-clock";
  17. reg = <0x160000 0x1000>;
  18. #clock-cells = <1>;
  19. };
  20. gic:interrupt-controller@2E0000 {
  21. compatible = "arm,cortex-a15-gic";
  22. #interrupt-cells = <3>;
  23. interrupt-controller;
  24. reg = <0x2E1000 0x1000>,
  25. <0x2E2000 0x1000>,
  26. <0x2E4000 0x2000>,
  27. <0x2E6000 0x2000>;
  28. interrupts = <1 9 0xf04>;
  29. };
  30. cpus {
  31. #address-cells = <1>;
  32. #size-cells = <0>;
  33. cpu@0 {
  34. compatible = "arm,cortex-a15";
  35. reg = <0>;
  36. };
  37. cpu@1 {
  38. compatible = "arm,cortex-a15";
  39. reg = <1>;
  40. };
  41. cpu@2 {
  42. compatible = "arm,cortex-a15";
  43. reg = <2>;
  44. };
  45. cpu@3 {
  46. compatible = "arm,cortex-a15";
  47. reg = <3>;
  48. };
  49. };
  50. arm-pmu {
  51. compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
  52. interrupts = <0 52 4>,
  53. <0 53 4>,
  54. <0 54 4>,
  55. <0 55 4>;
  56. };
  57. timer {
  58. compatible = "arm,cortex-a15-timer",
  59. "arm,armv7-timer";
  60. interrupts = <1 13 0xf08>,
  61. <1 14 0xf08>,
  62. <1 11 0xf08>,
  63. <1 10 0xf08>;
  64. clock-frequency = <50000000>;
  65. };
  66. cpufreq@160000 {
  67. compatible = "samsung,exynos5440-cpufreq";
  68. reg = <0x160000 0x1000>;
  69. interrupts = <0 57 0>;
  70. operating-points = <
  71. /* KHz uV */
  72. 1200000 1025000
  73. 1000000 975000
  74. 800000 925000
  75. >;
  76. };
  77. serial@B0000 {
  78. compatible = "samsung,exynos4210-uart";
  79. reg = <0xB0000 0x1000>;
  80. interrupts = <0 2 0>;
  81. clocks = <&clock 21>, <&clock 21>;
  82. clock-names = "uart", "clk_uart_baud0";
  83. };
  84. serial@C0000 {
  85. compatible = "samsung,exynos4210-uart";
  86. reg = <0xC0000 0x1000>;
  87. interrupts = <0 3 0>;
  88. clocks = <&clock 21>, <&clock 21>;
  89. clock-names = "uart", "clk_uart_baud0";
  90. };
  91. spi {
  92. compatible = "samsung,exynos4210-spi";
  93. reg = <0xD0000 0x1000>;
  94. interrupts = <0 4 0>;
  95. tx-dma-channel = <&pdma0 5>; /* preliminary */
  96. rx-dma-channel = <&pdma0 4>; /* preliminary */
  97. #address-cells = <1>;
  98. #size-cells = <0>;
  99. clocks = <&clock 21>, <&clock 16>;
  100. clock-names = "spi", "spi_busclk0";
  101. };
  102. pinctrl {
  103. compatible = "samsung,exynos5440-pinctrl";
  104. reg = <0xE0000 0x1000>;
  105. interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>,
  106. <0 41 0>, <0 42 0>, <0 43 0>, <0 44 0>;
  107. interrupt-controller;
  108. #interrupt-cells = <2>;
  109. #gpio-cells = <2>;
  110. fan: fan {
  111. samsung,exynos5440-pin-function = <1>;
  112. };
  113. hdd_led0: hdd_led0 {
  114. samsung,exynos5440-pin-function = <2>;
  115. };
  116. hdd_led1: hdd_led1 {
  117. samsung,exynos5440-pin-function = <3>;
  118. };
  119. uart1: uart1 {
  120. samsung,exynos5440-pin-function = <4>;
  121. };
  122. };
  123. i2c@F0000 {
  124. compatible = "samsung,exynos5440-i2c";
  125. reg = <0xF0000 0x1000>;
  126. interrupts = <0 5 0>;
  127. #address-cells = <1>;
  128. #size-cells = <0>;
  129. clocks = <&clock 21>;
  130. clock-names = "i2c";
  131. };
  132. i2c@100000 {
  133. compatible = "samsung,exynos5440-i2c";
  134. reg = <0x100000 0x1000>;
  135. interrupts = <0 6 0>;
  136. #address-cells = <1>;
  137. #size-cells = <0>;
  138. clocks = <&clock 21>;
  139. clock-names = "i2c";
  140. };
  141. watchdog {
  142. compatible = "samsung,s3c2410-wdt";
  143. reg = <0x110000 0x1000>;
  144. interrupts = <0 1 0>;
  145. clocks = <&clock 21>;
  146. clock-names = "watchdog";
  147. };
  148. gmac: ethernet@00230000 {
  149. compatible = "snps,dwmac-3.70a";
  150. reg = <0x00230000 0x8000>;
  151. interrupt-parent = <&gic>;
  152. interrupts = <0 31 4>;
  153. interrupt-names = "macirq";
  154. phy-mode = "sgmii";
  155. clocks = <&clock 25>;
  156. clock-names = "stmmaceth";
  157. };
  158. amba {
  159. #address-cells = <1>;
  160. #size-cells = <1>;
  161. compatible = "arm,amba-bus";
  162. interrupt-parent = <&gic>;
  163. ranges;
  164. pdma0: pdma@00121000 {
  165. compatible = "arm,pl330", "arm,primecell";
  166. reg = <0x121000 0x1000>;
  167. interrupts = <0 46 0>;
  168. clocks = <&clock 8>;
  169. clock-names = "apb_pclk";
  170. #dma-cells = <1>;
  171. #dma-channels = <8>;
  172. #dma-requests = <32>;
  173. };
  174. pdma1: pdma@00120000 {
  175. compatible = "arm,pl330", "arm,primecell";
  176. reg = <0x120000 0x1000>;
  177. interrupts = <0 47 0>;
  178. clocks = <&clock 8>;
  179. clock-names = "apb_pclk";
  180. #dma-cells = <1>;
  181. #dma-channels = <8>;
  182. #dma-requests = <32>;
  183. };
  184. };
  185. rtc {
  186. compatible = "samsung,s3c6410-rtc";
  187. reg = <0x130000 0x1000>;
  188. interrupts = <0 17 0>, <0 16 0>;
  189. clocks = <&clock 21>;
  190. clock-names = "rtc";
  191. status = "disabled";
  192. };
  193. };